VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmdev.h@ 44897

Last change on this file since 44897 was 44897, checked in by vboxsync, 12 years ago

Cleanups related to pci bus master memory access (#1871).

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File size: 197.2 KB
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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2013 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.215389.xyz. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmdev_h
27#define ___VBox_vmm_pdmdev_h
28
29#include <VBox/vmm/pdmqueue.h>
30#include <VBox/vmm/pdmcritsect.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/pdmifs.h>
33#include <VBox/vmm/pdmins.h>
34#include <VBox/vmm/pdmcommon.h>
35#include <VBox/vmm/iom.h>
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/ssm.h>
38#include <VBox/vmm/cfgm.h>
39#include <VBox/vmm/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <iprt/stdarg.h>
43
44
45RT_C_DECLS_BEGIN
46
47/** @defgroup grp_pdm_device The PDM Devices API
48 * @ingroup grp_pdm
49 * @{
50 */
51
52/**
53 * Construct a device instance for a VM.
54 *
55 * @returns VBox status.
56 * @param pDevIns The device instance data. If the registration structure
57 * is needed, it can be accessed thru pDevIns->pReg.
58 * @param iInstance Instance number. Use this to figure out which registers
59 * and such to use. The instance number is also found in
60 * pDevIns->iInstance, but since it's likely to be
61 * frequently used PDM passes it as parameter.
62 * @param pCfg Configuration node handle for the driver. This is
63 * expected to be in high demand in the constructor and is
64 * therefore passed as an argument. When using it at other
65 * times, it can be found in pDrvIns->pCfg.
66 */
67typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
68/** Pointer to a FNPDMDEVCONSTRUCT() function. */
69typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
70
71/**
72 * Destruct a device instance.
73 *
74 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
75 * resources can be freed correctly.
76 *
77 * @returns VBox status.
78 * @param pDevIns The device instance data.
79 *
80 * @remarks The device critical section is not entered. The routine may delete
81 * the critical section, so the caller cannot exit it.
82 */
83typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
84/** Pointer to a FNPDMDEVDESTRUCT() function. */
85typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
86
87/**
88 * Device relocation callback.
89 *
90 * This is called when the instance data has been relocated in raw-mode context
91 * (RC). It is also called when the RC hypervisor selects changes. The device
92 * must fixup all necessary pointers and re-query all interfaces to other RC
93 * devices and drivers.
94 *
95 * Before the RC code is executed the first time, this function will be called
96 * with a 0 delta so RC pointer calculations can be one in one place.
97 *
98 * @param pDevIns Pointer to the device instance.
99 * @param offDelta The relocation delta relative to the old location.
100 *
101 * @remarks A relocation CANNOT fail.
102 *
103 * @remarks The device critical section is not entered. The relocations should
104 * not normally require any locking.
105 */
106typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
107/** Pointer to a FNPDMDEVRELOCATE() function. */
108typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
109
110/**
111 * Power On notification.
112 *
113 * @returns VBox status.
114 * @param pDevIns The device instance data.
115 *
116 * @remarks Caller enters the device critical section.
117 */
118typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
119/** Pointer to a FNPDMDEVPOWERON() function. */
120typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
121
122/**
123 * Reset notification.
124 *
125 * @returns VBox status.
126 * @param pDevIns The device instance data.
127 *
128 * @remarks Caller enters the device critical section.
129 */
130typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
131/** Pointer to a FNPDMDEVRESET() function. */
132typedef FNPDMDEVRESET *PFNPDMDEVRESET;
133
134/**
135 * Suspend notification.
136 *
137 * @returns VBox status.
138 * @param pDevIns The device instance data.
139 * @thread EMT(0)
140 *
141 * @remarks Caller enters the device critical section.
142 */
143typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
144/** Pointer to a FNPDMDEVSUSPEND() function. */
145typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
146
147/**
148 * Resume notification.
149 *
150 * @returns VBox status.
151 * @param pDevIns The device instance data.
152 *
153 * @remarks Caller enters the device critical section.
154 */
155typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
156/** Pointer to a FNPDMDEVRESUME() function. */
157typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
158
159/**
160 * Power Off notification.
161 *
162 * This is only called when the VMR3PowerOff call is made on a running VM. This
163 * means that there is no notification if the VM was suspended before being
164 * powered off. There will also be no callback when hot plugging devices.
165 *
166 * @param pDevIns The device instance data.
167 * @thread EMT(0)
168 *
169 * @remarks Caller enters the device critical section.
170 */
171typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
172/** Pointer to a FNPDMDEVPOWEROFF() function. */
173typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
174
175/**
176 * Attach command.
177 *
178 * This is called to let the device attach to a driver for a specified LUN
179 * at runtime. This is not called during VM construction, the device
180 * constructor have to attach to all the available drivers.
181 *
182 * This is like plugging in the keyboard or mouse after turning on the PC.
183 *
184 * @returns VBox status code.
185 * @param pDevIns The device instance.
186 * @param iLUN The logical unit which is being detached.
187 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
188 *
189 * @remarks Caller enters the device critical section.
190 */
191typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
192/** Pointer to a FNPDMDEVATTACH() function. */
193typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
194
195/**
196 * Detach notification.
197 *
198 * This is called when a driver is detaching itself from a LUN of the device.
199 * The device should adjust it's state to reflect this.
200 *
201 * This is like unplugging the network cable to use it for the laptop or
202 * something while the PC is still running.
203 *
204 * @param pDevIns The device instance.
205 * @param iLUN The logical unit which is being detached.
206 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
207 *
208 * @remarks Caller enters the device critical section.
209 */
210typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
211/** Pointer to a FNPDMDEVDETACH() function. */
212typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
213
214/**
215 * Query the base interface of a logical unit.
216 *
217 * @returns VBOX status code.
218 * @param pDevIns The device instance.
219 * @param iLUN The logicial unit to query.
220 * @param ppBase Where to store the pointer to the base interface of the LUN.
221 *
222 * @remarks The device critical section is not entered.
223 */
224typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
225/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
226typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
227
228/**
229 * Init complete notification.
230 * This can be done to do communication with other devices and other
231 * initialization which requires everything to be in place.
232 *
233 * @returns VBOX status code.
234 * @param pDevIns The device instance.
235 *
236 * @remarks Caller enters the device critical section.
237 */
238typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
239/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
240typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
241
242
243
244/**
245 * PDM Device Registration Structure.
246 *
247 * This structure is used when registering a device from VBoxInitDevices() in HC
248 * Ring-3. PDM will continue use till the VM is terminated.
249 */
250typedef struct PDMDEVREG
251{
252 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
253 uint32_t u32Version;
254 /** Device name. */
255 char szName[32];
256 /** Name of the raw-mode context module (no path).
257 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
258 char szRCMod[32];
259 /** Name of the ring-0 module (no path).
260 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
261 char szR0Mod[32];
262 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
263 * remain unchanged from registration till VM destruction. */
264 const char *pszDescription;
265
266 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
267 uint32_t fFlags;
268 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
269 uint32_t fClass;
270 /** Maximum number of instances (per VM). */
271 uint32_t cMaxInstances;
272 /** Size of the instance data. */
273 uint32_t cbInstance;
274
275 /** Construct instance - required. */
276 PFNPDMDEVCONSTRUCT pfnConstruct;
277 /** Destruct instance - optional.
278 * Critical section NOT entered (will be destroyed). */
279 PFNPDMDEVDESTRUCT pfnDestruct;
280 /** Relocation command - optional.
281 * Critical section NOT entered. */
282 PFNPDMDEVRELOCATE pfnRelocate;
283 /** Unused member. (Was pfnIOCtl.) */
284 PFNRT pfnUnused;
285 /** Power on notification - optional.
286 * Critical section is entered. */
287 PFNPDMDEVPOWERON pfnPowerOn;
288 /** Reset notification - optional.
289 * Critical section is entered. */
290 PFNPDMDEVRESET pfnReset;
291 /** Suspend notification - optional.
292 * Critical section is entered. */
293 PFNPDMDEVSUSPEND pfnSuspend;
294 /** Resume notification - optional.
295 * Critical section is entered. */
296 PFNPDMDEVRESUME pfnResume;
297 /** Attach command - optional.
298 * Critical section is entered. */
299 PFNPDMDEVATTACH pfnAttach;
300 /** Detach notification - optional.
301 * Critical section is entered. */
302 PFNPDMDEVDETACH pfnDetach;
303 /** Query a LUN base interface - optional.
304 * Critical section is NOT entered. */
305 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
306 /** Init complete notification - optional.
307 * Critical section is entered. */
308 PFNPDMDEVINITCOMPLETE pfnInitComplete;
309 /** Power off notification - optional.
310 * Critical section is entered. */
311 PFNPDMDEVPOWEROFF pfnPowerOff;
312 /** @todo */
313 PFNRT pfnSoftReset;
314 /** Initialization safty marker. */
315 uint32_t u32VersionEnd;
316} PDMDEVREG;
317/** Pointer to a PDM Device Structure. */
318typedef PDMDEVREG *PPDMDEVREG;
319/** Const pointer to a PDM Device Structure. */
320typedef PDMDEVREG const *PCPDMDEVREG;
321
322/** Current DEVREG version number. */
323#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 1, 0)
324
325/** PDM Device Flags.
326 * @{ */
327/** This flag is used to indicate that the device has a RC component. */
328#define PDM_DEVREG_FLAGS_RC 0x00000001
329/** This flag is used to indicate that the device has a R0 component. */
330#define PDM_DEVREG_FLAGS_R0 0x00000002
331
332/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
333 * The bit count for the current host. */
334#if HC_ARCH_BITS == 32
335# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
336#elif HC_ARCH_BITS == 64
337# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
338#else
339# error Unsupported HC_ARCH_BITS value.
340#endif
341/** The host bit count mask. */
342#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
343
344/** The device support only 32-bit guests. */
345#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
346/** The device support only 64-bit guests. */
347#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
348/** The device support both 32-bit & 64-bit guests. */
349#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
350/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
351 * The guest bit count for the current compilation. */
352#if GC_ARCH_BITS == 32
353# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
354#elif GC_ARCH_BITS == 64
355# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
356#else
357# error Unsupported GC_ARCH_BITS value.
358#endif
359/** The guest bit count mask. */
360#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
361
362/** A convenience. */
363#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
364
365/** Indicates that the devices support PAE36 on a 32-bit guest. */
366#define PDM_DEVREG_FLAGS_PAE36 0x00001000
367
368/** Indicates that the device needs to be notified before the drivers when suspending. */
369#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
370
371/** Indicates that the device needs to be notified before the drivers when powering off. */
372#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
373
374/** Indicates that the device needs to be notified before the drivers when resetting. */
375#define PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION 0x00008000
376/** @} */
377
378
379/** PDM Device Classes.
380 * The order is important, lower bit earlier instantiation.
381 * @{ */
382/** Architecture device. */
383#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
384/** Architecture BIOS device. */
385#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
386/** PCI bus brigde. */
387#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
388/** ISA bus brigde. */
389#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
390/** Input device (mouse, keyboard, joystick, HID, ...). */
391#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
392/** Interrupt controller (PIC). */
393#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
394/** Interval controoler (PIT). */
395#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
396/** RTC/CMOS. */
397#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
398/** DMA controller. */
399#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
400/** VMM Device. */
401#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
402/** Graphics device, like VGA. */
403#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
404/** Storage controller device. */
405#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
406/** Network interface controller. */
407#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
408/** Audio. */
409#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
410/** USB HIC. */
411#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
412/** ACPI. */
413#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
414/** Serial controller device. */
415#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
416/** Parallel controller device */
417#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
418/** Host PCI pass-through device */
419#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
420/** Misc devices (always last). */
421#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
422/** @} */
423
424
425/** @name IRQ Level for use with the *SetIrq APIs.
426 * @{
427 */
428/** Assert the IRQ (can assume value 1). */
429#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
430/** Deassert the IRQ (can assume value 0). */
431#define PDM_IRQ_LEVEL_LOW 0
432/** flip-flop - deassert and then assert the IRQ again immediately. */
433#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
434/** @} */
435
436/**
437 * Registration record for MSI.
438 */
439typedef struct PDMMSIREG
440{
441 /** Number of MSI interrupt vectors, 0 if MSI not supported */
442 uint16_t cMsiVectors;
443 /** Offset of MSI capability */
444 uint8_t iMsiCapOffset;
445 /** Offset of next capability to MSI */
446 uint8_t iMsiNextOffset;
447 /** If we support 64-bit MSI addressing */
448 bool fMsi64bit;
449
450 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
451 uint16_t cMsixVectors;
452 /** Offset of MSI-X capability */
453 uint8_t iMsixCapOffset;
454 /** Offset of next capability to MSI-X */
455 uint8_t iMsixNextOffset;
456 /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
457 uint8_t iMsixBar;
458} PDMMSIREG;
459typedef PDMMSIREG *PPDMMSIREG;
460
461/**
462 * PCI Bus registration structure.
463 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
464 */
465typedef struct PDMPCIBUSREG
466{
467 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
468 uint32_t u32Version;
469
470 /**
471 * Registers the device with the default PCI bus.
472 *
473 * @returns VBox status code.
474 * @param pDevIns Device instance of the PCI Bus.
475 * @param pPciDev The PCI device structure.
476 * Any PCI enabled device must keep this in it's instance data!
477 * Fill in the PCI data config before registration, please.
478 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
479 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
480 * If negative, the pci bus device will assign one.
481 * @remarks Caller enters the PDM critical section.
482 */
483 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
484
485 /**
486 * Initialize MSI support in a PCI device.
487 *
488 * @returns VBox status code.
489 * @param pDevIns Device instance of the PCI Bus.
490 * @param pPciDev The PCI device structure.
491 * @param pMsiReg MSI registration structure
492 * @remarks Caller enters the PDM critical section.
493 */
494 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
495
496 /**
497 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
498 *
499 * @returns VBox status code.
500 * @param pDevIns Device instance of the PCI Bus.
501 * @param pPciDev The PCI device structure.
502 * @param iRegion The region number.
503 * @param cbRegion Size of the region.
504 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
505 * @param pfnCallback Callback for doing the mapping.
506 * @remarks Caller enters the PDM critical section.
507 */
508 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
509
510 /**
511 * Register PCI configuration space read/write callbacks.
512 *
513 * @param pDevIns Device instance of the PCI Bus.
514 * @param pPciDev The PCI device structure.
515 * @param pfnRead Pointer to the user defined PCI config read function.
516 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
517 * PCI config read function. This way, user can decide when (and if)
518 * to call default PCI config read function. Can be NULL.
519 * @param pfnWrite Pointer to the user defined PCI config write function.
520 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
521 * PCI config write function. This way, user can decide when (and if)
522 * to call default PCI config write function. Can be NULL.
523 * @remarks Caller enters the PDM critical section.
524 * @thread EMT
525 */
526 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
527 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
528
529 /**
530 * Set the IRQ for a PCI device.
531 *
532 * @param pDevIns Device instance of the PCI Bus.
533 * @param pPciDev The PCI device structure.
534 * @param iIrq IRQ number to set.
535 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
536 * @param uTagSrc The IRQ tag and source (for tracing).
537 * @remarks Caller enters the PDM critical section.
538 */
539 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
540
541 /**
542 * Called to perform the job of the bios.
543 * This is only called for the first PCI Bus - it is expected to
544 * service all the PCI buses.
545 *
546 * @returns VBox status.
547 * @param pDevIns Device instance of the first bus.
548 * @remarks Caller enters the PDM critical section.
549 */
550 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
551
552 /** The name of the SetIrq RC entry point. */
553 const char *pszSetIrqRC;
554
555 /** The name of the SetIrq R0 entry point. */
556 const char *pszSetIrqR0;
557
558} PDMPCIBUSREG;
559/** Pointer to a PCI bus registration structure. */
560typedef PDMPCIBUSREG *PPDMPCIBUSREG;
561
562/** Current PDMPCIBUSREG version number. */
563#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 4, 0)
564
565/**
566 * PCI Bus RC helpers.
567 */
568typedef struct PDMPCIHLPRC
569{
570 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
571 uint32_t u32Version;
572
573 /**
574 * Set an ISA IRQ.
575 *
576 * @param pDevIns PCI device instance.
577 * @param iIrq IRQ number to set.
578 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
579 * @param uTagSrc The IRQ tag and source (for tracing).
580 * @thread EMT only.
581 */
582 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
583
584 /**
585 * Set an I/O-APIC IRQ.
586 *
587 * @param pDevIns PCI device instance.
588 * @param iIrq IRQ number to set.
589 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
590 * @param uTagSrc The IRQ tag and source (for tracing).
591 * @thread EMT only.
592 */
593 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
594
595 /**
596 * Send an MSI.
597 *
598 * @param pDevIns PCI device instance.
599 * @param GCPhys Physical address MSI request was written.
600 * @param uValue Value written.
601 * @param uTagSrc The IRQ tag and source (for tracing).
602 * @thread EMT only.
603 */
604 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
605
606
607 /**
608 * Acquires the PDM lock.
609 *
610 * @returns VINF_SUCCESS on success.
611 * @returns rc if we failed to acquire the lock.
612 * @param pDevIns The PCI device instance.
613 * @param rc What to return if we fail to acquire the lock.
614 */
615 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
616
617 /**
618 * Releases the PDM lock.
619 *
620 * @param pDevIns The PCI device instance.
621 */
622 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
623
624 /** Just a safety precaution. */
625 uint32_t u32TheEnd;
626} PDMPCIHLPRC;
627/** Pointer to PCI helpers. */
628typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
629/** Pointer to const PCI helpers. */
630typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
631
632/** Current PDMPCIHLPRC version number. */
633#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0)
634
635
636/**
637 * PCI Bus R0 helpers.
638 */
639typedef struct PDMPCIHLPR0
640{
641 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
642 uint32_t u32Version;
643
644 /**
645 * Set an ISA IRQ.
646 *
647 * @param pDevIns PCI device instance.
648 * @param iIrq IRQ number to set.
649 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
650 * @param uTagSrc The IRQ tag and source (for tracing).
651 * @thread EMT only.
652 */
653 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
654
655 /**
656 * Set an I/O-APIC IRQ.
657 *
658 * @param pDevIns PCI device instance.
659 * @param iIrq IRQ number to set.
660 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
661 * @param uTagSrc The IRQ tag and source (for tracing).
662 * @thread EMT only.
663 */
664 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
665
666 /**
667 * Send an MSI.
668 *
669 * @param pDevIns PCI device instance.
670 * @param GCPhys Physical address MSI request was written.
671 * @param uValue Value written.
672 * @param uTagSrc The IRQ tag and source (for tracing).
673 * @thread EMT only.
674 */
675 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
676
677
678 /**
679 * Acquires the PDM lock.
680 *
681 * @returns VINF_SUCCESS on success.
682 * @returns rc if we failed to acquire the lock.
683 * @param pDevIns The PCI device instance.
684 * @param rc What to return if we fail to acquire the lock.
685 */
686 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
687
688 /**
689 * Releases the PDM lock.
690 *
691 * @param pDevIns The PCI device instance.
692 */
693 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
694
695 /** Just a safety precaution. */
696 uint32_t u32TheEnd;
697} PDMPCIHLPR0;
698/** Pointer to PCI helpers. */
699typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
700/** Pointer to const PCI helpers. */
701typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
702
703/** Current PDMPCIHLPR0 version number. */
704#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0)
705
706/**
707 * PCI device helpers.
708 */
709typedef struct PDMPCIHLPR3
710{
711 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
712 uint32_t u32Version;
713
714 /**
715 * Set an ISA IRQ.
716 *
717 * @param pDevIns The PCI device instance.
718 * @param iIrq IRQ number to set.
719 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
720 * @param uTagSrc The IRQ tag and source (for tracing).
721 */
722 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
723
724 /**
725 * Set an I/O-APIC IRQ.
726 *
727 * @param pDevIns The PCI device instance.
728 * @param iIrq IRQ number to set.
729 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
730 * @param uTagSrc The IRQ tag and source (for tracing).
731 */
732 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
733
734 /**
735 * Send an MSI.
736 *
737 * @param pDevIns PCI device instance.
738 * @param GCPhys Physical address MSI request was written.
739 * @param uValue Value written.
740 * @param uTagSrc The IRQ tag and source (for tracing).
741 */
742 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
743
744 /**
745 * Checks if the given address is an MMIO2 base address or not.
746 *
747 * @returns true/false accordingly.
748 * @param pDevIns The PCI device instance.
749 * @param pOwner The owner of the memory, optional.
750 * @param GCPhys The address to check.
751 */
752 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
753
754 /**
755 * Gets the address of the RC PCI Bus helpers.
756 *
757 * This should be called at both construction and relocation time
758 * to obtain the correct address of the RC helpers.
759 *
760 * @returns RC pointer to the PCI Bus helpers.
761 * @param pDevIns Device instance of the PCI Bus.
762 * @thread EMT only.
763 */
764 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
765
766 /**
767 * Gets the address of the R0 PCI Bus helpers.
768 *
769 * This should be called at both construction and relocation time
770 * to obtain the correct address of the R0 helpers.
771 *
772 * @returns R0 pointer to the PCI Bus helpers.
773 * @param pDevIns Device instance of the PCI Bus.
774 * @thread EMT only.
775 */
776 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
777
778 /**
779 * Acquires the PDM lock.
780 *
781 * @returns VINF_SUCCESS on success.
782 * @returns Fatal error on failure.
783 * @param pDevIns The PCI device instance.
784 * @param rc Dummy for making the interface identical to the RC and R0 versions.
785 */
786 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
787
788 /**
789 * Releases the PDM lock.
790 *
791 * @param pDevIns The PCI device instance.
792 */
793 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
794
795 /** Just a safety precaution. */
796 uint32_t u32TheEnd;
797} PDMPCIHLPR3;
798/** Pointer to PCI helpers. */
799typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
800/** Pointer to const PCI helpers. */
801typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
802
803/** Current PDMPCIHLPR3 version number. */
804#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 0)
805
806
807/**
808 * Programmable Interrupt Controller registration structure.
809 */
810typedef struct PDMPICREG
811{
812 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
813 uint32_t u32Version;
814
815 /**
816 * Set the an IRQ.
817 *
818 * @param pDevIns Device instance of the PIC.
819 * @param iIrq IRQ number to set.
820 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
821 * @param uTagSrc The IRQ tag and source (for tracing).
822 * @remarks Caller enters the PDM critical section.
823 */
824 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
825
826 /**
827 * Get a pending interrupt.
828 *
829 * @returns Pending interrupt number.
830 * @param pDevIns Device instance of the PIC.
831 * @param puTagSrc Where to return the IRQ tag and source.
832 * @remarks Caller enters the PDM critical section.
833 */
834 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
835
836 /** The name of the RC SetIrq entry point. */
837 const char *pszSetIrqRC;
838 /** The name of the RC GetInterrupt entry point. */
839 const char *pszGetInterruptRC;
840
841 /** The name of the R0 SetIrq entry point. */
842 const char *pszSetIrqR0;
843 /** The name of the R0 GetInterrupt entry point. */
844 const char *pszGetInterruptR0;
845} PDMPICREG;
846/** Pointer to a PIC registration structure. */
847typedef PDMPICREG *PPDMPICREG;
848
849/** Current PDMPICREG version number. */
850#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0)
851
852/**
853 * PIC RC helpers.
854 */
855typedef struct PDMPICHLPRC
856{
857 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
858 uint32_t u32Version;
859
860 /**
861 * Set the interrupt force action flag.
862 *
863 * @param pDevIns Device instance of the PIC.
864 */
865 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
866
867 /**
868 * Clear the interrupt force action flag.
869 *
870 * @param pDevIns Device instance of the PIC.
871 */
872 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
873
874 /**
875 * Acquires the PDM lock.
876 *
877 * @returns VINF_SUCCESS on success.
878 * @returns rc if we failed to acquire the lock.
879 * @param pDevIns The PIC device instance.
880 * @param rc What to return if we fail to acquire the lock.
881 */
882 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
883
884 /**
885 * Releases the PDM lock.
886 *
887 * @param pDevIns The PIC device instance.
888 */
889 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
890
891 /** Just a safety precaution. */
892 uint32_t u32TheEnd;
893} PDMPICHLPRC;
894
895/** Pointer to PIC RC helpers. */
896typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
897/** Pointer to const PIC RC helpers. */
898typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
899
900/** Current PDMPICHLPRC version number. */
901#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0)
902
903
904/**
905 * PIC R0 helpers.
906 */
907typedef struct PDMPICHLPR0
908{
909 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
910 uint32_t u32Version;
911
912 /**
913 * Set the interrupt force action flag.
914 *
915 * @param pDevIns Device instance of the PIC.
916 */
917 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
918
919 /**
920 * Clear the interrupt force action flag.
921 *
922 * @param pDevIns Device instance of the PIC.
923 */
924 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
925
926 /**
927 * Acquires the PDM lock.
928 *
929 * @returns VINF_SUCCESS on success.
930 * @returns rc if we failed to acquire the lock.
931 * @param pDevIns The PIC device instance.
932 * @param rc What to return if we fail to acquire the lock.
933 */
934 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
935
936 /**
937 * Releases the PDM lock.
938 *
939 * @param pDevIns The PCI device instance.
940 */
941 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
942
943 /** Just a safety precaution. */
944 uint32_t u32TheEnd;
945} PDMPICHLPR0;
946
947/** Pointer to PIC R0 helpers. */
948typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
949/** Pointer to const PIC R0 helpers. */
950typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
951
952/** Current PDMPICHLPR0 version number. */
953#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
954
955/**
956 * PIC R3 helpers.
957 */
958typedef struct PDMPICHLPR3
959{
960 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
961 uint32_t u32Version;
962
963 /**
964 * Set the interrupt force action flag.
965 *
966 * @param pDevIns Device instance of the PIC.
967 */
968 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
969
970 /**
971 * Clear the interrupt force action flag.
972 *
973 * @param pDevIns Device instance of the PIC.
974 */
975 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
976
977 /**
978 * Acquires the PDM lock.
979 *
980 * @returns VINF_SUCCESS on success.
981 * @returns Fatal error on failure.
982 * @param pDevIns The PIC device instance.
983 * @param rc Dummy for making the interface identical to the RC and R0 versions.
984 */
985 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
986
987 /**
988 * Releases the PDM lock.
989 *
990 * @param pDevIns The PIC device instance.
991 */
992 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
993
994 /**
995 * Gets the address of the RC PIC helpers.
996 *
997 * This should be called at both construction and relocation time
998 * to obtain the correct address of the RC helpers.
999 *
1000 * @returns RC pointer to the PIC helpers.
1001 * @param pDevIns Device instance of the PIC.
1002 */
1003 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1004
1005 /**
1006 * Gets the address of the R0 PIC helpers.
1007 *
1008 * This should be called at both construction and relocation time
1009 * to obtain the correct address of the R0 helpers.
1010 *
1011 * @returns R0 pointer to the PIC helpers.
1012 * @param pDevIns Device instance of the PIC.
1013 */
1014 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1015
1016 /** Just a safety precaution. */
1017 uint32_t u32TheEnd;
1018} PDMPICHLPR3;
1019
1020/** Pointer to PIC R3 helpers. */
1021typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
1022/** Pointer to const PIC R3 helpers. */
1023typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1024
1025/** Current PDMPICHLPR3 version number. */
1026#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1027
1028
1029
1030/**
1031 * Advanced Programmable Interrupt Controller registration structure.
1032 */
1033typedef struct PDMAPICREG
1034{
1035 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
1036 uint32_t u32Version;
1037
1038 /**
1039 * Get a pending interrupt.
1040 *
1041 * @returns Pending interrupt number.
1042 * @param pDevIns Device instance of the APIC.
1043 * @param idCpu The VCPU Id.
1044 * @param puTagSrc Where to return the tag source.
1045 * @remarks Caller enters the PDM critical section
1046 */
1047 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t *puTagSrc));
1048
1049 /**
1050 * Check if the APIC has a pending interrupt/if a TPR change would active one
1051 *
1052 * @returns Pending interrupt yes/no
1053 * @param pDevIns Device instance of the APIC.
1054 * @param idCpu The VCPU Id.
1055 * @remarks Unlike the other callbacks, the PDM lock may not always be entered
1056 * prior to calling this method.
1057 */
1058 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1059
1060 /**
1061 * Set the APIC base.
1062 *
1063 * @param pDevIns Device instance of the APIC.
1064 * @param idCpu The VCPU Id.
1065 * @param u64Base The new base.
1066 * @remarks Caller enters the PDM critical section.
1067 */
1068 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint64_t u64Base));
1069
1070 /**
1071 * Get the APIC base.
1072 *
1073 * @returns Current base.
1074 * @param pDevIns Device instance of the APIC.
1075 * @param idCpu The VCPU Id.
1076 * @remarks Caller enters the PDM critical section.
1077 */
1078 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1079
1080 /**
1081 * Set the TPR (task priority register).
1082 *
1083 * @param pDevIns Device instance of the APIC.
1084 * @param idCpu The VCPU id.
1085 * @param u8TPR The new TPR.
1086 * @remarks Caller enters the PDM critical section.
1087 */
1088 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
1089
1090 /**
1091 * Get the TPR (task priority register).
1092 *
1093 * @returns The current TPR.
1094 * @param pDevIns Device instance of the APIC.
1095 * @param idCpu VCPU id
1096 * @remarks Caller enters the PDM critical section.
1097 */
1098 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1099
1100 /**
1101 * Write to a MSR in APIC range.
1102 *
1103 * @returns VBox status code.
1104 * @param pDevIns Device instance of the APIC.
1105 * @param idCpu Target CPU.
1106 * @param u32Reg The MSR begin written to.
1107 * @param u64Value The value to write.
1108 *
1109 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1110 * calling this method.
1111 */
1112 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1113
1114 /**
1115 * Read from a MSR in APIC range.
1116 *
1117 * @returns VBox status code.
1118 * @param pDevIns Device instance of the APIC.
1119 * @param idCpu Target CPU.
1120 * @param u32Reg MSR to read.
1121 * @param pu64Value Where to return the read value.
1122 *
1123 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1124 * calling this method.
1125 */
1126 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1127
1128 /**
1129 * Private interface between the IOAPIC and APIC.
1130 *
1131 * This is a low-level, APIC/IOAPIC implementation specific interface which
1132 * is registered with PDM only because it makes life so much simpler right
1133 * now (GC bits). This is a bad bad hack! The correct way of doing this
1134 * would involve some way of querying GC interfaces and relocating them.
1135 * Perhaps doing some kind of device init in GC...
1136 *
1137 * @returns status code.
1138 * @param pDevIns Device instance of the APIC.
1139 * @param u8Dest See APIC implementation.
1140 * @param u8DestMode See APIC implementation.
1141 * @param u8DeliveryMode See APIC implementation.
1142 * @param iVector See APIC implementation.
1143 * @param u8Polarity See APIC implementation.
1144 * @param u8TriggerMode See APIC implementation.
1145 * @param uTagSrc The IRQ tag and source (for tracing).
1146 * @remarks Caller enters the PDM critical section
1147 */
1148 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1149 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1150
1151 /**
1152 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1).
1153 *
1154 * Used for virtual wire mode when interrupts from the PIC are passed through
1155 * LAPIC.
1156 *
1157 * @returns status code.
1158 * @param pDevIns Device instance of the APIC.
1159 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1160 * @param u8Level The level.
1161 * @param uTagSrc The IRQ tag and source (for tracing).
1162 * @remarks Caller enters the PDM critical section
1163 */
1164 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1165
1166 /** The name of the RC GetInterrupt entry point. */
1167 const char *pszGetInterruptRC;
1168 /** The name of the RC HasPendingIrq entry point. */
1169 const char *pszHasPendingIrqRC;
1170 /** The name of the RC SetBase entry point. */
1171 const char *pszSetBaseRC;
1172 /** The name of the RC GetBase entry point. */
1173 const char *pszGetBaseRC;
1174 /** The name of the RC SetTPR entry point. */
1175 const char *pszSetTPRRC;
1176 /** The name of the RC GetTPR entry point. */
1177 const char *pszGetTPRRC;
1178 /** The name of the RC WriteMSR entry point. */
1179 const char *pszWriteMSRRC;
1180 /** The name of the RC ReadMSR entry point. */
1181 const char *pszReadMSRRC;
1182 /** The name of the RC BusDeliver entry point. */
1183 const char *pszBusDeliverRC;
1184 /** The name of the RC LocalInterrupt entry point. */
1185 const char *pszLocalInterruptRC;
1186
1187 /** The name of the R0 GetInterrupt entry point. */
1188 const char *pszGetInterruptR0;
1189 /** The name of the R0 HasPendingIrq entry point. */
1190 const char *pszHasPendingIrqR0;
1191 /** The name of the R0 SetBase entry point. */
1192 const char *pszSetBaseR0;
1193 /** The name of the R0 GetBase entry point. */
1194 const char *pszGetBaseR0;
1195 /** The name of the R0 SetTPR entry point. */
1196 const char *pszSetTPRR0;
1197 /** The name of the R0 GetTPR entry point. */
1198 const char *pszGetTPRR0;
1199 /** The name of the R0 WriteMSR entry point. */
1200 const char *pszWriteMSRR0;
1201 /** The name of the R0 ReadMSR entry point. */
1202 const char *pszReadMSRR0;
1203 /** The name of the R0 BusDeliver entry point. */
1204 const char *pszBusDeliverR0;
1205 /** The name of the R0 LocalInterrupt entry point. */
1206 const char *pszLocalInterruptR0;
1207
1208} PDMAPICREG;
1209/** Pointer to an APIC registration structure. */
1210typedef PDMAPICREG *PPDMAPICREG;
1211
1212/** Current PDMAPICREG version number. */
1213#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 2, 0)
1214
1215
1216/**
1217 * APIC version argument for pfnChangeFeature.
1218 */
1219typedef enum PDMAPICVERSION
1220{
1221 /** Invalid 0 entry. */
1222 PDMAPICVERSION_INVALID = 0,
1223 /** No APIC. */
1224 PDMAPICVERSION_NONE,
1225 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1226 PDMAPICVERSION_APIC,
1227 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1228 PDMAPICVERSION_X2APIC,
1229 /** The usual 32-bit paranoia. */
1230 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1231} PDMAPICVERSION;
1232
1233/**
1234 * APIC irq argument for SetInterruptFF.
1235 */
1236typedef enum PDMAPICIRQ
1237{
1238 /** Invalid 0 entry. */
1239 PDMAPICIRQ_INVALID = 0,
1240 /** Normal hardware interrupt. */
1241 PDMAPICIRQ_HARDWARE,
1242 /** NMI. */
1243 PDMAPICIRQ_NMI,
1244 /** SMI. */
1245 PDMAPICIRQ_SMI,
1246 /** ExtINT (HW interrupt via PIC). */
1247 PDMAPICIRQ_EXTINT,
1248 /** The usual 32-bit paranoia. */
1249 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1250} PDMAPICIRQ;
1251
1252
1253/**
1254 * APIC RC helpers.
1255 */
1256typedef struct PDMAPICHLPRC
1257{
1258 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1259 uint32_t u32Version;
1260
1261 /**
1262 * Set the interrupt force action flag.
1263 *
1264 * @param pDevIns Device instance of the APIC.
1265 * @param enmType IRQ type.
1266 * @param idCpu Virtual CPU to set flag upon.
1267 */
1268 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1269
1270 /**
1271 * Clear the interrupt force action flag.
1272 *
1273 * @param pDevIns Device instance of the APIC.
1274 * @param enmType IRQ type.
1275 * @param idCpu Virtual CPU to clear flag upon.
1276 */
1277 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1278
1279 /**
1280 * Calculates an IRQ tag for a timer, IPI or similar event.
1281 *
1282 * @returns The IRQ tag.
1283 * @param pDevIns Device instance of the APIC.
1284 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1285 */
1286 DECLRCCALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1287
1288 /**
1289 * Modifies APIC-related bits in the CPUID feature mask.
1290 *
1291 * @param pDevIns Device instance of the APIC.
1292 * @param enmVersion Supported APIC version.
1293 */
1294 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1295
1296 /**
1297 * Acquires the PDM lock.
1298 *
1299 * @returns VINF_SUCCESS on success.
1300 * @returns rc if we failed to acquire the lock.
1301 * @param pDevIns The APIC device instance.
1302 * @param rc What to return if we fail to acquire the lock.
1303 */
1304 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1305
1306 /**
1307 * Releases the PDM lock.
1308 *
1309 * @param pDevIns The APIC device instance.
1310 */
1311 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1312
1313 /**
1314 * Get the virtual CPU id corresponding to the current EMT.
1315 *
1316 * @param pDevIns The APIC device instance.
1317 */
1318 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1319
1320 /** Just a safety precaution. */
1321 uint32_t u32TheEnd;
1322} PDMAPICHLPRC;
1323/** Pointer to APIC GC helpers. */
1324typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1325/** Pointer to const APIC helpers. */
1326typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1327
1328/** Current PDMAPICHLPRC version number. */
1329#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 2, 0)
1330
1331
1332/**
1333 * APIC R0 helpers.
1334 */
1335typedef struct PDMAPICHLPR0
1336{
1337 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1338 uint32_t u32Version;
1339
1340 /**
1341 * Set the interrupt force action flag.
1342 *
1343 * @param pDevIns Device instance of the APIC.
1344 * @param enmType IRQ type.
1345 * @param idCpu Virtual CPU to set flag upon.
1346 */
1347 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1348
1349 /**
1350 * Clear the interrupt force action flag.
1351 *
1352 * @param pDevIns Device instance of the APIC.
1353 * @param enmType IRQ type.
1354 * @param idCpu Virtual CPU to clear flag upon.
1355 */
1356 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1357
1358 /**
1359 * Calculates an IRQ tag for a timer, IPI or similar event.
1360 *
1361 * @returns The IRQ tag.
1362 * @param pDevIns Device instance of the APIC.
1363 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1364 */
1365 DECLR0CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1366
1367 /**
1368 * Modifies APIC-related bits in the CPUID feature mask.
1369 *
1370 * @param pDevIns Device instance of the APIC.
1371 * @param enmVersion Supported APIC version.
1372 */
1373 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1374
1375 /**
1376 * Acquires the PDM lock.
1377 *
1378 * @returns VINF_SUCCESS on success.
1379 * @returns rc if we failed to acquire the lock.
1380 * @param pDevIns The APIC device instance.
1381 * @param rc What to return if we fail to acquire the lock.
1382 */
1383 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1384
1385 /**
1386 * Releases the PDM lock.
1387 *
1388 * @param pDevIns The APIC device instance.
1389 */
1390 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1391
1392 /**
1393 * Get the virtual CPU id corresponding to the current EMT.
1394 *
1395 * @param pDevIns The APIC device instance.
1396 */
1397 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1398
1399 /** Just a safety precaution. */
1400 uint32_t u32TheEnd;
1401} PDMAPICHLPR0;
1402/** Pointer to APIC GC helpers. */
1403typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1404/** Pointer to const APIC helpers. */
1405typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1406
1407/** Current PDMAPICHLPR0 version number. */
1408#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 2, 0)
1409
1410/**
1411 * APIC R3 helpers.
1412 */
1413typedef struct PDMAPICHLPR3
1414{
1415 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1416 uint32_t u32Version;
1417
1418 /**
1419 * Set the interrupt force action flag.
1420 *
1421 * @param pDevIns Device instance of the APIC.
1422 * @param enmType IRQ type.
1423 * @param idCpu Virtual CPU to set flag upon.
1424 */
1425 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1426
1427 /**
1428 * Clear the interrupt force action flag.
1429 *
1430 * @param pDevIns Device instance of the APIC.
1431 * @param enmType IRQ type.
1432 * @param idCpu Virtual CPU to clear flag upon.
1433 */
1434 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1435
1436 /**
1437 * Calculates an IRQ tag for a timer, IPI or similar event.
1438 *
1439 * @returns The IRQ tag.
1440 * @param pDevIns Device instance of the APIC.
1441 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1442 */
1443 DECLR3CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1444
1445 /**
1446 * Modifies APIC-related bits in the CPUID feature mask.
1447 *
1448 * @param pDevIns Device instance of the APIC.
1449 * @param enmVersion Supported APIC version.
1450 */
1451 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1452
1453 /**
1454 * Get the virtual CPU id corresponding to the current EMT.
1455 *
1456 * @param pDevIns The APIC device instance.
1457 */
1458 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1459
1460 /**
1461 * Sends SIPI to given virtual CPU.
1462 *
1463 * @param pDevIns The APIC device instance.
1464 * @param idCpu Virtual CPU to perform SIPI on
1465 * @param iVector SIPI vector
1466 */
1467 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1468
1469 /**
1470 * Sends init IPI to given virtual CPU, should result in reset and
1471 * halting till SIPI.
1472 *
1473 * @param pDevIns The APIC device instance.
1474 * @param idCpu Virtual CPU to perform SIPI on
1475 */
1476 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1477
1478 /**
1479 * Gets the address of the RC APIC helpers.
1480 *
1481 * This should be called at both construction and relocation time
1482 * to obtain the correct address of the RC helpers.
1483 *
1484 * @returns GC pointer to the APIC helpers.
1485 * @param pDevIns Device instance of the APIC.
1486 */
1487 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1488
1489 /**
1490 * Gets the address of the R0 APIC helpers.
1491 *
1492 * This should be called at both construction and relocation time
1493 * to obtain the correct address of the R0 helpers.
1494 *
1495 * @returns R0 pointer to the APIC helpers.
1496 * @param pDevIns Device instance of the APIC.
1497 */
1498 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1499
1500 /**
1501 * Get the critical section used to synchronize the PICs, PCI and stuff.
1502 *
1503 * @returns Ring-3 pointer to the critical section.
1504 * @param pDevIns The APIC device instance.
1505 */
1506 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1507
1508 /**
1509 * Get the critical section used to synchronize the PICs, PCI and stuff.
1510 *
1511 * @returns Raw-mode context pointer to the critical section.
1512 * @param pDevIns The APIC device instance.
1513 */
1514 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1515
1516 /**
1517 * Get the critical section used to synchronize the PICs, PCI and stuff.
1518 *
1519 * @returns Ring-0 pointer to the critical section.
1520 * @param pDevIns The APIC device instance.
1521 */
1522 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1523
1524 /** Just a safety precaution. */
1525 uint32_t u32TheEnd;
1526} PDMAPICHLPR3;
1527/** Pointer to APIC helpers. */
1528typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1529/** Pointer to const APIC helpers. */
1530typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1531
1532/** Current PDMAPICHLP version number. */
1533#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 2, 0)
1534
1535
1536/**
1537 * I/O APIC registration structure.
1538 */
1539typedef struct PDMIOAPICREG
1540{
1541 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1542 uint32_t u32Version;
1543
1544 /**
1545 * Set the an IRQ.
1546 *
1547 * @param pDevIns Device instance of the I/O APIC.
1548 * @param iIrq IRQ number to set.
1549 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1550 * @param uTagSrc The IRQ tag and source (for tracing).
1551 * @remarks Caller enters the PDM critical section
1552 */
1553 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
1554
1555 /** The name of the RC SetIrq entry point. */
1556 const char *pszSetIrqRC;
1557
1558 /** The name of the R0 SetIrq entry point. */
1559 const char *pszSetIrqR0;
1560
1561 /**
1562 * Send a MSI.
1563 *
1564 * @param pDevIns Device instance of the I/O APIC.
1565 * @param GCPhys Request address.
1566 * @param uValue Request value.
1567 * @param uTagSrc The IRQ tag and source (for tracing).
1568 * @remarks Caller enters the PDM critical section
1569 */
1570 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
1571
1572 /** The name of the RC SendMsi entry point. */
1573 const char *pszSendMsiRC;
1574
1575 /** The name of the R0 SendMsi entry point. */
1576 const char *pszSendMsiR0;
1577} PDMIOAPICREG;
1578/** Pointer to an APIC registration structure. */
1579typedef PDMIOAPICREG *PPDMIOAPICREG;
1580
1581/** Current PDMAPICREG version number. */
1582#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 3, 0)
1583
1584
1585/**
1586 * IOAPIC RC helpers.
1587 */
1588typedef struct PDMIOAPICHLPRC
1589{
1590 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1591 uint32_t u32Version;
1592
1593 /**
1594 * Private interface between the IOAPIC and APIC.
1595 *
1596 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1597 *
1598 * @returns status code.
1599 * @param pDevIns Device instance of the IOAPIC.
1600 * @param u8Dest See APIC implementation.
1601 * @param u8DestMode See APIC implementation.
1602 * @param u8DeliveryMode See APIC implementation.
1603 * @param iVector See APIC implementation.
1604 * @param u8Polarity See APIC implementation.
1605 * @param u8TriggerMode See APIC implementation.
1606 * @param uTagSrc The IRQ tag and source (for tracing).
1607 */
1608 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1609 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1610
1611 /**
1612 * Acquires the PDM lock.
1613 *
1614 * @returns VINF_SUCCESS on success.
1615 * @returns rc if we failed to acquire the lock.
1616 * @param pDevIns The IOAPIC device instance.
1617 * @param rc What to return if we fail to acquire the lock.
1618 */
1619 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1620
1621 /**
1622 * Releases the PDM lock.
1623 *
1624 * @param pDevIns The IOAPIC device instance.
1625 */
1626 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1627
1628 /** Just a safety precaution. */
1629 uint32_t u32TheEnd;
1630} PDMIOAPICHLPRC;
1631/** Pointer to IOAPIC RC helpers. */
1632typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1633/** Pointer to const IOAPIC helpers. */
1634typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1635
1636/** Current PDMIOAPICHLPRC version number. */
1637#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 2, 0)
1638
1639
1640/**
1641 * IOAPIC R0 helpers.
1642 */
1643typedef struct PDMIOAPICHLPR0
1644{
1645 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1646 uint32_t u32Version;
1647
1648 /**
1649 * Private interface between the IOAPIC and APIC.
1650 *
1651 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1652 *
1653 * @returns status code.
1654 * @param pDevIns Device instance of the IOAPIC.
1655 * @param u8Dest See APIC implementation.
1656 * @param u8DestMode See APIC implementation.
1657 * @param u8DeliveryMode See APIC implementation.
1658 * @param iVector See APIC implementation.
1659 * @param u8Polarity See APIC implementation.
1660 * @param u8TriggerMode See APIC implementation.
1661 * @param uTagSrc The IRQ tag and source (for tracing).
1662 */
1663 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1664 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1665
1666 /**
1667 * Acquires the PDM lock.
1668 *
1669 * @returns VINF_SUCCESS on success.
1670 * @returns rc if we failed to acquire the lock.
1671 * @param pDevIns The IOAPIC device instance.
1672 * @param rc What to return if we fail to acquire the lock.
1673 */
1674 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1675
1676 /**
1677 * Releases the PDM lock.
1678 *
1679 * @param pDevIns The IOAPIC device instance.
1680 */
1681 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1682
1683 /** Just a safety precaution. */
1684 uint32_t u32TheEnd;
1685} PDMIOAPICHLPR0;
1686/** Pointer to IOAPIC R0 helpers. */
1687typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1688/** Pointer to const IOAPIC helpers. */
1689typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1690
1691/** Current PDMIOAPICHLPR0 version number. */
1692#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 2, 0)
1693
1694/**
1695 * IOAPIC R3 helpers.
1696 */
1697typedef struct PDMIOAPICHLPR3
1698{
1699 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1700 uint32_t u32Version;
1701
1702 /**
1703 * Private interface between the IOAPIC and APIC.
1704 *
1705 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1706 *
1707 * @returns status code
1708 * @param pDevIns Device instance of the IOAPIC.
1709 * @param u8Dest See APIC implementation.
1710 * @param u8DestMode See APIC implementation.
1711 * @param u8DeliveryMode See APIC implementation.
1712 * @param iVector See APIC implementation.
1713 * @param u8Polarity See APIC implementation.
1714 * @param u8TriggerMode See APIC implementation.
1715 * @param uTagSrc The IRQ tag and source (for tracing).
1716 */
1717 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1718 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1719
1720 /**
1721 * Acquires the PDM lock.
1722 *
1723 * @returns VINF_SUCCESS on success.
1724 * @returns Fatal error on failure.
1725 * @param pDevIns The IOAPIC device instance.
1726 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1727 */
1728 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1729
1730 /**
1731 * Releases the PDM lock.
1732 *
1733 * @param pDevIns The IOAPIC device instance.
1734 */
1735 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1736
1737 /**
1738 * Gets the address of the RC IOAPIC helpers.
1739 *
1740 * This should be called at both construction and relocation time
1741 * to obtain the correct address of the RC helpers.
1742 *
1743 * @returns RC pointer to the IOAPIC helpers.
1744 * @param pDevIns Device instance of the IOAPIC.
1745 */
1746 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1747
1748 /**
1749 * Gets the address of the R0 IOAPIC helpers.
1750 *
1751 * This should be called at both construction and relocation time
1752 * to obtain the correct address of the R0 helpers.
1753 *
1754 * @returns R0 pointer to the IOAPIC helpers.
1755 * @param pDevIns Device instance of the IOAPIC.
1756 */
1757 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1758
1759 /** Just a safety precaution. */
1760 uint32_t u32TheEnd;
1761} PDMIOAPICHLPR3;
1762/** Pointer to IOAPIC R3 helpers. */
1763typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1764/** Pointer to const IOAPIC helpers. */
1765typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1766
1767/** Current PDMIOAPICHLPR3 version number. */
1768#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 2, 0)
1769
1770
1771/**
1772 * HPET registration structure.
1773 */
1774typedef struct PDMHPETREG
1775{
1776 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1777 uint32_t u32Version;
1778
1779} PDMHPETREG;
1780/** Pointer to an HPET registration structure. */
1781typedef PDMHPETREG *PPDMHPETREG;
1782
1783/** Current PDMHPETREG version number. */
1784#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1785
1786/**
1787 * HPET RC helpers.
1788 *
1789 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1790 * at some later point.
1791 */
1792typedef struct PDMHPETHLPRC
1793{
1794 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1795 uint32_t u32Version;
1796
1797 /** Just a safety precaution. */
1798 uint32_t u32TheEnd;
1799} PDMHPETHLPRC;
1800
1801/** Pointer to HPET RC helpers. */
1802typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1803/** Pointer to const HPET RC helpers. */
1804typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1805
1806/** Current PDMHPETHLPRC version number. */
1807#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1808
1809
1810/**
1811 * HPET R0 helpers.
1812 *
1813 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1814 * at some later point.
1815 */
1816typedef struct PDMHPETHLPR0
1817{
1818 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1819 uint32_t u32Version;
1820
1821 /** Just a safety precaution. */
1822 uint32_t u32TheEnd;
1823} PDMHPETHLPR0;
1824
1825/** Pointer to HPET R0 helpers. */
1826typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1827/** Pointer to const HPET R0 helpers. */
1828typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1829
1830/** Current PDMHPETHLPR0 version number. */
1831#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1832
1833/**
1834 * HPET R3 helpers.
1835 */
1836typedef struct PDMHPETHLPR3
1837{
1838 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1839 uint32_t u32Version;
1840
1841 /**
1842 * Gets the address of the RC HPET helpers.
1843 *
1844 * This should be called at both construction and relocation time
1845 * to obtain the correct address of the RC helpers.
1846 *
1847 * @returns RC pointer to the HPET helpers.
1848 * @param pDevIns Device instance of the HPET.
1849 */
1850 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1851
1852 /**
1853 * Gets the address of the R0 HPET helpers.
1854 *
1855 * This should be called at both construction and relocation time
1856 * to obtain the correct address of the R0 helpers.
1857 *
1858 * @returns R0 pointer to the HPET helpers.
1859 * @param pDevIns Device instance of the HPET.
1860 */
1861 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1862
1863 /**
1864 * Set legacy mode on PIT and RTC.
1865 *
1866 * @returns VINF_SUCCESS on success.
1867 * @returns rc if we failed to set legacy mode.
1868 * @param pDevIns Device instance of the HPET.
1869 * @param fActivated Whether legacy mode is activated or deactivated.
1870 */
1871 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1872
1873
1874 /**
1875 * Set IRQ, bypassing ISA bus override rules.
1876 *
1877 * @returns VINF_SUCCESS on success.
1878 * @returns rc if we failed to set legacy mode.
1879 * @param pDevIns Device instance of the HPET.
1880 * @param fActivate Activate or deactivate legacy mode.
1881 */
1882 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1883
1884 /** Just a safety precaution. */
1885 uint32_t u32TheEnd;
1886} PDMHPETHLPR3;
1887
1888/** Pointer to HPET R3 helpers. */
1889typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1890/** Pointer to const HPET R3 helpers. */
1891typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1892
1893/** Current PDMHPETHLPR3 version number. */
1894#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1895
1896
1897/**
1898 * Raw PCI device registration structure.
1899 */
1900typedef struct PDMPCIRAWREG
1901{
1902 /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
1903 uint32_t u32Version;
1904 /** Just a safety precaution. */
1905 uint32_t u32TheEnd;
1906} PDMPCIRAWREG;
1907/** Pointer to a raw PCI registration structure. */
1908typedef PDMPCIRAWREG *PPDMPCIRAWREG;
1909
1910/** Current PDMPCIRAWREG version number. */
1911#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe1, 1, 0)
1912
1913/**
1914 * Raw PCI device raw-mode context helpers.
1915 */
1916typedef struct PDMPCIRAWHLPRC
1917{
1918 /** Structure version and magic number (PDM_PCIRAWHLPRC_VERSION). */
1919 uint32_t u32Version;
1920 /** Just a safety precaution. */
1921 uint32_t u32TheEnd;
1922} PDMPCIRAWHLPRC;
1923/** Pointer to a raw PCI deviec raw-mode context helper structure. */
1924typedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
1925/** Pointer to a const raw PCI deviec raw-mode context helper structure. */
1926typedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
1927
1928/** Current PDMPCIRAWHLPRC version number. */
1929#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xffe0, 1, 0)
1930
1931/**
1932 * Raw PCI device ring-0 context helpers.
1933 */
1934typedef struct PDMPCIRAWHLPR0
1935{
1936 /** Structure version and magic number (PDM_PCIRAWHLPR0_VERSION). */
1937 uint32_t u32Version;
1938 /** Just a safety precaution. */
1939 uint32_t u32TheEnd;
1940} PDMPCIRAWHLPR0;
1941/** Pointer to a raw PCI deviec ring-0 context helper structure. */
1942typedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
1943/** Pointer to a const raw PCI deviec ring-0 context helper structure. */
1944typedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
1945
1946/** Current PDMPCIRAWHLPR0 version number. */
1947#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xffdf, 1, 0)
1948
1949
1950/**
1951 * Raw PCI device ring-3 context helpers.
1952 */
1953typedef struct PDMPCIRAWHLPR3
1954{
1955 /** Undefined structure version and magic number. */
1956 uint32_t u32Version;
1957
1958 /**
1959 * Gets the address of the RC raw PCI device helpers.
1960 *
1961 * This should be called at both construction and relocation time to obtain
1962 * the correct address of the RC helpers.
1963 *
1964 * @returns RC pointer to the raw PCI device helpers.
1965 * @param pDevIns Device instance of the raw PCI device.
1966 */
1967 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1968
1969 /**
1970 * Gets the address of the R0 raw PCI device helpers.
1971 *
1972 * This should be called at both construction and relocation time to obtain
1973 * the correct address of the R0 helpers.
1974 *
1975 * @returns R0 pointer to the raw PCI device helpers.
1976 * @param pDevIns Device instance of the raw PCI device.
1977 */
1978 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1979
1980 /** Just a safety precaution. */
1981 uint32_t u32TheEnd;
1982} PDMPCIRAWHLPR3;
1983/** Pointer to raw PCI R3 helpers. */
1984typedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
1985/** Pointer to const raw PCI R3 helpers. */
1986typedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
1987
1988/** Current PDMPCIRAWHLPR3 version number. */
1989#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xffde, 1, 0)
1990
1991
1992#ifdef IN_RING3
1993
1994/**
1995 * DMA Transfer Handler.
1996 *
1997 * @returns Number of bytes transferred.
1998 * @param pDevIns Device instance of the DMA.
1999 * @param pvUser User pointer.
2000 * @param uChannel Channel number.
2001 * @param off DMA position.
2002 * @param cb Block size.
2003 * @remarks The device lock is not taken, however, the DMA device lock is held.
2004 */
2005typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
2006/** Pointer to a FNDMATRANSFERHANDLER(). */
2007typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
2008
2009/**
2010 * DMA Controller registration structure.
2011 */
2012typedef struct PDMDMAREG
2013{
2014 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
2015 uint32_t u32Version;
2016
2017 /**
2018 * Execute pending transfers.
2019 *
2020 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
2021 * @param pDevIns Device instance of the DMAC.
2022 * @remarks No locks held, called on EMT(0) as a form of serialization.
2023 */
2024 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
2025
2026 /**
2027 * Register transfer function for DMA channel.
2028 *
2029 * @param pDevIns Device instance of the DMAC.
2030 * @param uChannel Channel number.
2031 * @param pfnTransferHandler Device specific transfer function.
2032 * @param pvUSer User pointer to be passed to the callback.
2033 * @remarks No locks held, called on an EMT.
2034 */
2035 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2036
2037 /**
2038 * Read memory
2039 *
2040 * @returns Number of bytes read.
2041 * @param pDevIns Device instance of the DMAC.
2042 * @param pvBuffer Pointer to target buffer.
2043 * @param off DMA position.
2044 * @param cbBlock Block size.
2045 * @remarks No locks held, called on an EMT.
2046 */
2047 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
2048
2049 /**
2050 * Write memory
2051 *
2052 * @returns Number of bytes written.
2053 * @param pDevIns Device instance of the DMAC.
2054 * @param pvBuffer Memory to write.
2055 * @param off DMA position.
2056 * @param cbBlock Block size.
2057 * @remarks No locks held, called on an EMT.
2058 */
2059 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
2060
2061 /**
2062 * Set the DREQ line.
2063 *
2064 * @param pDevIns Device instance of the DMAC.
2065 * @param uChannel Channel number.
2066 * @param uLevel Level of the line.
2067 * @remarks No locks held, called on an EMT.
2068 */
2069 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2070
2071 /**
2072 * Get channel mode
2073 *
2074 * @returns Channel mode.
2075 * @param pDevIns Device instance of the DMAC.
2076 * @param uChannel Channel number.
2077 * @remarks No locks held, called on an EMT.
2078 */
2079 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2080
2081} PDMDMACREG;
2082/** Pointer to a DMAC registration structure. */
2083typedef PDMDMACREG *PPDMDMACREG;
2084
2085/** Current PDMDMACREG version number. */
2086#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
2087
2088
2089/**
2090 * DMA Controller device helpers.
2091 */
2092typedef struct PDMDMACHLP
2093{
2094 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
2095 uint32_t u32Version;
2096
2097 /* to-be-defined */
2098
2099} PDMDMACHLP;
2100/** Pointer to DMAC helpers. */
2101typedef PDMDMACHLP *PPDMDMACHLP;
2102/** Pointer to const DMAC helpers. */
2103typedef const PDMDMACHLP *PCPDMDMACHLP;
2104
2105/** Current PDMDMACHLP version number. */
2106#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
2107
2108#endif /* IN_RING3 */
2109
2110
2111
2112/**
2113 * RTC registration structure.
2114 */
2115typedef struct PDMRTCREG
2116{
2117 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
2118 uint32_t u32Version;
2119 uint32_t u32Alignment; /**< structure size alignment. */
2120
2121 /**
2122 * Write to a CMOS register and update the checksum if necessary.
2123 *
2124 * @returns VBox status code.
2125 * @param pDevIns Device instance of the RTC.
2126 * @param iReg The CMOS register index.
2127 * @param u8Value The CMOS register value.
2128 * @remarks Caller enters the device critical section.
2129 */
2130 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2131
2132 /**
2133 * Read a CMOS register.
2134 *
2135 * @returns VBox status code.
2136 * @param pDevIns Device instance of the RTC.
2137 * @param iReg The CMOS register index.
2138 * @param pu8Value Where to store the CMOS register value.
2139 * @remarks Caller enters the device critical section.
2140 */
2141 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2142
2143} PDMRTCREG;
2144/** Pointer to a RTC registration structure. */
2145typedef PDMRTCREG *PPDMRTCREG;
2146/** Pointer to a const RTC registration structure. */
2147typedef const PDMRTCREG *PCPDMRTCREG;
2148
2149/** Current PDMRTCREG version number. */
2150#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 2, 0)
2151
2152
2153/**
2154 * RTC device helpers.
2155 */
2156typedef struct PDMRTCHLP
2157{
2158 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
2159 uint32_t u32Version;
2160
2161 /* to-be-defined */
2162
2163} PDMRTCHLP;
2164/** Pointer to RTC helpers. */
2165typedef PDMRTCHLP *PPDMRTCHLP;
2166/** Pointer to const RTC helpers. */
2167typedef const PDMRTCHLP *PCPDMRTCHLP;
2168
2169/** Current PDMRTCHLP version number. */
2170#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
2171
2172
2173
2174#ifdef IN_RING3
2175
2176/**
2177 * PDM Device API.
2178 */
2179typedef struct PDMDEVHLPR3
2180{
2181 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */
2182 uint32_t u32Version;
2183
2184 /**
2185 * Register a number of I/O ports with a device.
2186 *
2187 * These callbacks are of course for the host context (HC).
2188 * Register HC handlers before guest context (GC) handlers! There must be a
2189 * HC handler for every GC handler!
2190 *
2191 * @returns VBox status.
2192 * @param pDevIns The device instance to register the ports with.
2193 * @param Port First port number in the range.
2194 * @param cPorts Number of ports to register.
2195 * @param pvUser User argument.
2196 * @param pfnOut Pointer to function which is gonna handle OUT operations.
2197 * @param pfnIn Pointer to function which is gonna handle IN operations.
2198 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2199 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2200 * @param pszDesc Pointer to description string. This must not be freed.
2201 * @remarks Caller enters the device critical section prior to invoking the
2202 * registered callback methods.
2203 */
2204 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
2205 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2206 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2207
2208 /**
2209 * Register a number of I/O ports with a device for RC.
2210 *
2211 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2212 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2213 * for every RC handler!
2214 *
2215 * @returns VBox status.
2216 * @param pDevIns The device instance to register the ports with
2217 * and which RC module to resolve the names
2218 * against.
2219 * @param Port First port number in the range.
2220 * @param cPorts Number of ports to register.
2221 * @param pvUser User argument.
2222 * @param pszOut Name of the RC function which is gonna handle OUT operations.
2223 * @param pszIn Name of the RC function which is gonna handle IN operations.
2224 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
2225 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
2226 * @param pszDesc Pointer to description string. This must not be freed.
2227 * @remarks Caller enters the device critical section prior to invoking the
2228 * registered callback methods.
2229 */
2230 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
2231 const char *pszOut, const char *pszIn,
2232 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2233
2234 /**
2235 * Register a number of I/O ports with a device.
2236 *
2237 * These callbacks are of course for the ring-0 host context (R0).
2238 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2239 *
2240 * @returns VBox status.
2241 * @param pDevIns The device instance to register the ports with.
2242 * @param Port First port number in the range.
2243 * @param cPorts Number of ports to register.
2244 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2245 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2246 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2247 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2248 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2249 * @param pszDesc Pointer to description string. This must not be freed.
2250 * @remarks Caller enters the device critical section prior to invoking the
2251 * registered callback methods.
2252 */
2253 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
2254 const char *pszOut, const char *pszIn,
2255 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2256
2257 /**
2258 * Deregister I/O ports.
2259 *
2260 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2261 *
2262 * @returns VBox status.
2263 * @param pDevIns The device instance owning the ports.
2264 * @param Port First port number in the range.
2265 * @param cPorts Number of ports to deregister.
2266 */
2267 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts));
2268
2269 /**
2270 * Register a Memory Mapped I/O (MMIO) region.
2271 *
2272 * These callbacks are of course for the ring-3 context (R3). Register HC
2273 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2274 * must be a R3 handler for every RC and R0 handler!
2275 *
2276 * @returns VBox status.
2277 * @param pDevIns The device instance to register the MMIO with.
2278 * @param GCPhysStart First physical address in the range.
2279 * @param cbRange The size of the range (in bytes).
2280 * @param pvUser User argument.
2281 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2282 * @param pfnRead Pointer to function which is gonna handle Read operations.
2283 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2284 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
2285 * @param pszDesc Pointer to description string. This must not be freed.
2286 * @remarks Caller enters the device critical section prior to invoking the
2287 * registered callback methods.
2288 */
2289 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
2290 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2291 uint32_t fFlags, const char *pszDesc));
2292
2293 /**
2294 * Register a Memory Mapped I/O (MMIO) region for GC.
2295 *
2296 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2297 * (R3) handlers before guest context handlers! There must be a R3 handler for
2298 * every RC handler!
2299 *
2300 * @returns VBox status.
2301 * @param pDevIns The device instance to register the MMIO with.
2302 * @param GCPhysStart First physical address in the range.
2303 * @param cbRange The size of the range (in bytes).
2304 * @param pvUser User argument.
2305 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2306 * @param pszRead Name of the RC function which is gonna handle Read operations.
2307 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2308 * @remarks Caller enters the device critical section prior to invoking the
2309 * registered callback methods.
2310 */
2311 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
2312 const char *pszWrite, const char *pszRead, const char *pszFill));
2313
2314 /**
2315 * Register a Memory Mapped I/O (MMIO) region for R0.
2316 *
2317 * These callbacks are for the ring-0 host context (R0). Register ring-3
2318 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2319 * every R0 handler!
2320 *
2321 * @returns VBox status.
2322 * @param pDevIns The device instance to register the MMIO with.
2323 * @param GCPhysStart First physical address in the range.
2324 * @param cbRange The size of the range (in bytes).
2325 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2326 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2327 * @param pszRead Name of the RC function which is gonna handle Read operations.
2328 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2329 * @param pszDesc Obsolete. NULL is fine.
2330 * @remarks Caller enters the device critical section prior to invoking the
2331 * registered callback methods.
2332 */
2333 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
2334 const char *pszWrite, const char *pszRead, const char *pszFill));
2335
2336 /**
2337 * Deregister a Memory Mapped I/O (MMIO) region.
2338 *
2339 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2340 *
2341 * @returns VBox status.
2342 * @param pDevIns The device instance owning the MMIO region(s).
2343 * @param GCPhysStart First physical address in the range.
2344 * @param cbRange The size of the range (in bytes).
2345 */
2346 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange));
2347
2348 /**
2349 * Allocate and register a MMIO2 region.
2350 *
2351 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2352 * RAM associated with a device. It is also non-shared memory with a
2353 * permanent ring-3 mapping and page backing (presently).
2354 *
2355 * @returns VBox status.
2356 * @param pDevIns The device instance.
2357 * @param iRegion The region number. Use the PCI region number as
2358 * this must be known to the PCI bus device too. If
2359 * it's not associated with the PCI device, then
2360 * any number up to UINT8_MAX is fine.
2361 * @param cb The size (in bytes) of the region.
2362 * @param fFlags Reserved for future use, must be zero.
2363 * @param ppv Where to store the address of the ring-3 mapping
2364 * of the memory.
2365 * @param pszDesc Pointer to description string. This must not be
2366 * freed.
2367 * @thread EMT.
2368 */
2369 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2370
2371 /**
2372 * Deregisters and frees a MMIO2 region.
2373 *
2374 * Any physical (and virtual) access handlers registered for the region must
2375 * be deregistered before calling this function.
2376 *
2377 * @returns VBox status code.
2378 * @param pDevIns The device instance.
2379 * @param iRegion The region number used during registration.
2380 * @thread EMT.
2381 */
2382 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2383
2384 /**
2385 * Maps a MMIO2 region into the physical memory space.
2386 *
2387 * A MMIO2 range may overlap with base memory if a lot of RAM
2388 * is configured for the VM, in which case we'll drop the base
2389 * memory pages. Presently we will make no attempt to preserve
2390 * anything that happens to be present in the base memory that
2391 * is replaced, this is of course incorrectly but it's too much
2392 * effort.
2393 *
2394 * @returns VBox status code.
2395 * @param pDevIns The device instance.
2396 * @param iRegion The region number used during registration.
2397 * @param GCPhys The physical address to map it at.
2398 * @thread EMT.
2399 */
2400 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2401
2402 /**
2403 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2404 *
2405 * @returns VBox status code.
2406 * @param pDevIns The device instance.
2407 * @param iRegion The region number used during registration.
2408 * @param GCPhys The physical address it's currently mapped at.
2409 * @thread EMT.
2410 */
2411 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2412
2413 /**
2414 * Maps a portion of an MMIO2 region into the hypervisor region.
2415 *
2416 * Callers of this API must never deregister the MMIO2 region before the
2417 * VM is powered off.
2418 *
2419 * @return VBox status code.
2420 * @param pDevIns The device owning the MMIO2 memory.
2421 * @param iRegion The region.
2422 * @param off The offset into the region. Will be rounded down
2423 * to closest page boundary.
2424 * @param cb The number of bytes to map. Will be rounded up
2425 * to the closest page boundary.
2426 * @param pszDesc Mapping description.
2427 * @param pRCPtr Where to store the RC address.
2428 */
2429 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2430 const char *pszDesc, PRTRCPTR pRCPtr));
2431
2432 /**
2433 * Maps a portion of an MMIO2 region into kernel space (host).
2434 *
2435 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2436 * or the VM is terminated.
2437 *
2438 * @return VBox status code.
2439 * @param pDevIns The device owning the MMIO2 memory.
2440 * @param iRegion The region.
2441 * @param off The offset into the region. Must be page
2442 * aligned.
2443 * @param cb The number of bytes to map. Must be page
2444 * aligned.
2445 * @param pszDesc Mapping description.
2446 * @param pR0Ptr Where to store the R0 address.
2447 */
2448 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2449 const char *pszDesc, PRTR0PTR pR0Ptr));
2450
2451 /**
2452 * Register a ROM (BIOS) region.
2453 *
2454 * It goes without saying that this is read-only memory. The memory region must be
2455 * in unassigned memory. I.e. from the top of the address space or on the PC in
2456 * the 0xa0000-0xfffff range.
2457 *
2458 * @returns VBox status.
2459 * @param pDevIns The device instance owning the ROM region.
2460 * @param GCPhysStart First physical address in the range.
2461 * Must be page aligned!
2462 * @param cbRange The size of the range (in bytes).
2463 * Must be page aligned!
2464 * @param pvBinary Pointer to the binary data backing the ROM image.
2465 * @param cbBinary The size of the binary pointer. This must
2466 * be equal or smaller than @a cbRange.
2467 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2468 * @param pszDesc Pointer to description string. This must not be freed.
2469 *
2470 * @remark There is no way to remove the rom, automatically on device cleanup or
2471 * manually from the device yet. At present I doubt we need such features...
2472 */
2473 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
2474 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
2475
2476 /**
2477 * Changes the protection of shadowed ROM mapping.
2478 *
2479 * This is intented for use by the system BIOS, chipset or device in question to
2480 * change the protection of shadowed ROM code after init and on reset.
2481 *
2482 * @param pDevIns The device instance.
2483 * @param GCPhysStart Where the mapping starts.
2484 * @param cbRange The size of the mapping.
2485 * @param enmProt The new protection type.
2486 */
2487 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt));
2488
2489 /**
2490 * Register a save state data unit.
2491 *
2492 * @returns VBox status.
2493 * @param pDevIns The device instance.
2494 * @param pszName Data unit name.
2495 * @param uInstance The instance identifier of the data unit.
2496 * This must together with the name be unique.
2497 * @param uVersion Data layout version number.
2498 * @param cbGuess The approximate amount of data in the unit.
2499 * Only for progress indicators.
2500 * @param pszBefore Name of data unit which we should be put in
2501 * front of. Optional (NULL).
2502 *
2503 * @param pfnLivePrep Prepare live save callback, optional.
2504 * @param pfnLiveExec Execute live save callback, optional.
2505 * @param pfnLiveVote Vote live save callback, optional.
2506 *
2507 * @param pfnSavePrep Prepare save callback, optional.
2508 * @param pfnSaveExec Execute save callback, optional.
2509 * @param pfnSaveDone Done save callback, optional.
2510 *
2511 * @param pfnLoadPrep Prepare load callback, optional.
2512 * @param pfnLoadExec Execute load callback, optional.
2513 * @param pfnLoadDone Done load callback, optional.
2514 * @remarks Caller enters the device critical section prior to invoking the
2515 * registered callback methods.
2516 */
2517 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2518 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2519 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2520 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2521
2522 /**
2523 * Creates a timer.
2524 *
2525 * @returns VBox status.
2526 * @param pDevIns The device instance.
2527 * @param enmClock The clock to use on this timer.
2528 * @param pfnCallback Callback function.
2529 * @param pvUser User argument for the callback.
2530 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2531 * @param pszDesc Pointer to description string which must stay around
2532 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2533 * @param ppTimer Where to store the timer on success.
2534 * @remarks Caller enters the device critical section prior to invoking the
2535 * callback.
2536 */
2537 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2538
2539 /**
2540 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2541 *
2542 * @returns pTime.
2543 * @param pDevIns The device instance.
2544 * @param pTime Where to store the time.
2545 */
2546 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2547
2548 /**
2549 * Read physical memory.
2550 *
2551 * @returns VINF_SUCCESS (for now).
2552 * @param pDevIns The device instance.
2553 * @param GCPhys Physical address start reading from.
2554 * @param pvBuf Where to put the read bits.
2555 * @param cbRead How many bytes to read.
2556 * @thread Any thread, but the call may involve the emulation thread.
2557 */
2558 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2559
2560 /**
2561 * Write to physical memory.
2562 *
2563 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2564 * @param pDevIns The device instance.
2565 * @param GCPhys Physical address to write to.
2566 * @param pvBuf What to write.
2567 * @param cbWrite How many bytes to write.
2568 * @thread Any thread, but the call may involve the emulation thread.
2569 */
2570 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2571
2572 /**
2573 * Requests the mapping of a guest page into ring-3.
2574 *
2575 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2576 * release it.
2577 *
2578 * This API will assume your intention is to write to the page, and will
2579 * therefore replace shared and zero pages. If you do not intend to modify the
2580 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2581 *
2582 * @returns VBox status code.
2583 * @retval VINF_SUCCESS on success.
2584 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2585 * backing or if the page has any active access handlers. The caller
2586 * must fall back on using PGMR3PhysWriteExternal.
2587 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2588 *
2589 * @param pVM The VM handle.
2590 * @param GCPhys The guest physical address of the page that
2591 * should be mapped.
2592 * @param fFlags Flags reserved for future use, MBZ.
2593 * @param ppv Where to store the address corresponding to
2594 * GCPhys.
2595 * @param pLock Where to store the lock information that
2596 * pfnPhysReleasePageMappingLock needs.
2597 *
2598 * @remark Avoid calling this API from within critical sections (other than the
2599 * PGM one) because of the deadlock risk when we have to delegating the
2600 * task to an EMT.
2601 * @thread Any.
2602 */
2603 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2604
2605 /**
2606 * Requests the mapping of a guest page into ring-3, external threads.
2607 *
2608 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2609 * release it.
2610 *
2611 * @returns VBox status code.
2612 * @retval VINF_SUCCESS on success.
2613 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2614 * backing or if the page as an active ALL access handler. The caller
2615 * must fall back on using PGMPhysRead.
2616 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2617 *
2618 * @param pDevIns The device instance.
2619 * @param GCPhys The guest physical address of the page that
2620 * should be mapped.
2621 * @param fFlags Flags reserved for future use, MBZ.
2622 * @param ppv Where to store the address corresponding to
2623 * GCPhys.
2624 * @param pLock Where to store the lock information that
2625 * pfnPhysReleasePageMappingLock needs.
2626 *
2627 * @remark Avoid calling this API from within critical sections.
2628 * @thread Any.
2629 */
2630 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2631
2632 /**
2633 * Release the mapping of a guest page.
2634 *
2635 * This is the counter part of pfnPhysGCPhys2CCPtr and
2636 * pfnPhysGCPhys2CCPtrReadOnly.
2637 *
2638 * @param pDevIns The device instance.
2639 * @param pLock The lock structure initialized by the mapping
2640 * function.
2641 */
2642 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2643
2644 /**
2645 * Read guest physical memory by virtual address.
2646 *
2647 * @param pDevIns The device instance.
2648 * @param pvDst Where to put the read bits.
2649 * @param GCVirtSrc Guest virtual address to start reading from.
2650 * @param cb How many bytes to read.
2651 * @thread The emulation thread.
2652 */
2653 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2654
2655 /**
2656 * Write to guest physical memory by virtual address.
2657 *
2658 * @param pDevIns The device instance.
2659 * @param GCVirtDst Guest virtual address to write to.
2660 * @param pvSrc What to write.
2661 * @param cb How many bytes to write.
2662 * @thread The emulation thread.
2663 */
2664 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2665
2666 /**
2667 * Convert a guest virtual address to a guest physical address.
2668 *
2669 * @returns VBox status code.
2670 * @param pDevIns The device instance.
2671 * @param GCPtr Guest virtual address.
2672 * @param pGCPhys Where to store the GC physical address
2673 * corresponding to GCPtr.
2674 * @thread The emulation thread.
2675 * @remark Careful with page boundaries.
2676 */
2677 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2678
2679 /**
2680 * Allocate memory which is associated with current VM instance
2681 * and automatically freed on it's destruction.
2682 *
2683 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2684 * @param pDevIns The device instance.
2685 * @param cb Number of bytes to allocate.
2686 */
2687 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2688
2689 /**
2690 * Allocate memory which is associated with current VM instance
2691 * and automatically freed on it's destruction. The memory is ZEROed.
2692 *
2693 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2694 * @param pDevIns The device instance.
2695 * @param cb Number of bytes to allocate.
2696 */
2697 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2698
2699 /**
2700 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2701 *
2702 * @param pDevIns The device instance.
2703 * @param pv Pointer to the memory to free.
2704 */
2705 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2706
2707 /**
2708 * Gets the VM state.
2709 *
2710 * @returns VM state.
2711 * @param pDevIns The device instance.
2712 * @thread Any thread (just keep in mind that it's volatile info).
2713 */
2714 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2715
2716 /**
2717 * Checks if the VM was teleported and hasn't been fully resumed yet.
2718 *
2719 * @returns true / false.
2720 * @param pDevIns The device instance.
2721 * @thread Any thread.
2722 */
2723 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2724
2725 /**
2726 * Set the VM error message
2727 *
2728 * @returns rc.
2729 * @param pDevIns The device instance.
2730 * @param rc VBox status code.
2731 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2732 * @param pszFormat Error message format string.
2733 * @param ... Error message arguments.
2734 */
2735 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2736
2737 /**
2738 * Set the VM error message
2739 *
2740 * @returns rc.
2741 * @param pDevIns The device instance.
2742 * @param rc VBox status code.
2743 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2744 * @param pszFormat Error message format string.
2745 * @param va Error message arguments.
2746 */
2747 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2748
2749 /**
2750 * Set the VM runtime error message
2751 *
2752 * @returns VBox status code.
2753 * @param pDevIns The device instance.
2754 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2755 * @param pszErrorId Error ID string.
2756 * @param pszFormat Error message format string.
2757 * @param ... Error message arguments.
2758 */
2759 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2760
2761 /**
2762 * Set the VM runtime error message
2763 *
2764 * @returns VBox status code.
2765 * @param pDevIns The device instance.
2766 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2767 * @param pszErrorId Error ID string.
2768 * @param pszFormat Error message format string.
2769 * @param va Error message arguments.
2770 */
2771 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2772
2773 /**
2774 * Stops the VM and enters the debugger to look at the guest state.
2775 *
2776 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2777 * invoking this function directly.
2778 *
2779 * @returns VBox status code which must be passed up to the VMM.
2780 * @param pDevIns The device instance.
2781 * @param pszFile Filename of the assertion location.
2782 * @param iLine The linenumber of the assertion location.
2783 * @param pszFunction Function of the assertion location.
2784 * @param pszFormat Message. (optional)
2785 * @param args Message parameters.
2786 */
2787 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2788
2789 /**
2790 * Register a info handler with DBGF,
2791 *
2792 * @returns VBox status code.
2793 * @param pDevIns The device instance.
2794 * @param pszName The identifier of the info.
2795 * @param pszDesc The description of the info and any arguments
2796 * the handler may take.
2797 * @param pfnHandler The handler function to be called to display the
2798 * info.
2799 */
2800 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2801
2802 /**
2803 * Registers a set of registers for a device.
2804 *
2805 * The @a pvUser argument of the getter and setter callbacks will be
2806 * @a pDevIns. The register names will be prefixed by the device name followed
2807 * immediately by the instance number.
2808 *
2809 * @returns VBox status code.
2810 * @param pDevIns The device instance.
2811 * @param paRegisters The register descriptors.
2812 *
2813 * @remarks The device critical section is NOT entered prior to working the
2814 * callbacks registered via this helper!
2815 */
2816 DECLR3CALLBACKMEMBER(int, pfnDBGFRegRegister,(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters));
2817
2818 /**
2819 * Gets the trace buffer handle.
2820 *
2821 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
2822 * really inteded for direct usage, thus no inline wrapper function.
2823 *
2824 * @returns Trace buffer handle or NIL_RTTRACEBUF.
2825 * @param pDevIns The device instance.
2826 */
2827 DECLR3CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
2828
2829 /**
2830 * Registers a statistics sample if statistics are enabled.
2831 *
2832 * @param pDevIns Device instance of the DMA.
2833 * @param pvSample Pointer to the sample.
2834 * @param enmType Sample type. This indicates what pvSample is
2835 * pointing at.
2836 * @param pszName Sample name. The name is on this form
2837 * "/<component>/<sample>". Further nesting is
2838 * possible.
2839 * @param enmUnit Sample unit.
2840 * @param pszDesc Sample description.
2841 */
2842 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2843
2844 /**
2845 * Same as pfnSTAMRegister except that the name is specified in a
2846 * RTStrPrintf like fashion.
2847 *
2848 * @returns VBox status.
2849 * @param pDevIns Device instance of the DMA.
2850 * @param pvSample Pointer to the sample.
2851 * @param enmType Sample type. This indicates what pvSample is
2852 * pointing at.
2853 * @param enmVisibility Visibility type specifying whether unused
2854 * statistics should be visible or not.
2855 * @param enmUnit Sample unit.
2856 * @param pszDesc Sample description.
2857 * @param pszName The sample name format string.
2858 * @param ... Arguments to the format string.
2859 */
2860 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2861 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2862
2863 /**
2864 * Same as pfnSTAMRegister except that the name is specified in a
2865 * RTStrPrintfV like fashion.
2866 *
2867 * @returns VBox status.
2868 * @param pDevIns Device instance of the DMA.
2869 * @param pvSample Pointer to the sample.
2870 * @param enmType Sample type. This indicates what pvSample is
2871 * pointing at.
2872 * @param enmVisibility Visibility type specifying whether unused
2873 * statistics should be visible or not.
2874 * @param enmUnit Sample unit.
2875 * @param pszDesc Sample description.
2876 * @param pszName The sample name format string.
2877 * @param args Arguments to the format string.
2878 */
2879 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2880 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2881
2882 /**
2883 * Registers the device with the default PCI bus.
2884 *
2885 * @returns VBox status code.
2886 * @param pDevIns The device instance.
2887 * @param pPciDev The PCI device structure.
2888 * Any PCI enabled device must keep this in it's instance data!
2889 * Fill in the PCI data config before registration, please.
2890 * @remark This is the simple interface, a Ex interface will be created if
2891 * more features are needed later.
2892 */
2893 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2894
2895 /**
2896 * Initialize MSI support in a PCI device.
2897 *
2898 * @returns VBox status code.
2899 * @param pDevIns The device instance.
2900 * @param pMsiReg MSI registartion structure.
2901 */
2902 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
2903
2904 /**
2905 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2906 *
2907 * @returns VBox status code.
2908 * @param pDevIns The device instance.
2909 * @param iRegion The region number.
2910 * @param cbRegion Size of the region.
2911 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2912 * @param pfnCallback Callback for doing the mapping.
2913 * @remarks The callback will be invoked holding the PDM lock. The device lock
2914 * is NOT take because that is very likely be a lock order violation.
2915 */
2916 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion,
2917 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2918
2919 /**
2920 * Register PCI configuration space read/write callbacks.
2921 *
2922 * @param pDevIns The device instance.
2923 * @param pPciDev The PCI device structure.
2924 * If NULL the default PCI device for this device instance is used.
2925 * @param pfnRead Pointer to the user defined PCI config read function.
2926 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2927 * PCI config read function. This way, user can decide when (and if)
2928 * to call default PCI config read function. Can be NULL.
2929 * @param pfnWrite Pointer to the user defined PCI config write function.
2930 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2931 * PCI config write function. This way, user can decide when (and if)
2932 * to call default PCI config write function. Can be NULL.
2933 * @remarks The callbacks will be invoked holding the PDM lock. The device lock
2934 * is NOT take because that is very likely be a lock order violation.
2935 * @thread EMT
2936 */
2937 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2938 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2939
2940 /**
2941 * Bus master physical memory read.
2942 *
2943 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
2944 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2945 * @param pDevIns The device instance.
2946 * @param GCPhys Physical address start reading from.
2947 * @param pvBuf Where to put the read bits.
2948 * @param cbRead How many bytes to read.
2949 * @thread Any thread, but the call may involve the emulation thread.
2950 */
2951 DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2952
2953 /**
2954 * Bus master physical memory write.
2955 *
2956 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
2957 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
2958 * @param pDevIns The device instance.
2959 * @param GCPhys Physical address to write to.
2960 * @param pvBuf What to write.
2961 * @param cbWrite How many bytes to write.
2962 * @thread Any thread, but the call may involve the emulation thread.
2963 */
2964 DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2965
2966 /**
2967 * Set the IRQ for a PCI device.
2968 *
2969 * @param pDevIns The device instance.
2970 * @param iIrq IRQ number to set.
2971 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2972 * @thread Any thread, but will involve the emulation thread.
2973 */
2974 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2975
2976 /**
2977 * Set the IRQ for a PCI device, but don't wait for EMT to process
2978 * the request when not called from EMT.
2979 *
2980 * @param pDevIns The device instance.
2981 * @param iIrq IRQ number to set.
2982 * @param iLevel IRQ level.
2983 * @thread Any thread, but will involve the emulation thread.
2984 */
2985 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2986
2987 /**
2988 * Set ISA IRQ for a device.
2989 *
2990 * @param pDevIns The device instance.
2991 * @param iIrq IRQ number to set.
2992 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2993 * @thread Any thread, but will involve the emulation thread.
2994 */
2995 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2996
2997 /**
2998 * Set the ISA IRQ for a device, but don't wait for EMT to process
2999 * the request when not called from EMT.
3000 *
3001 * @param pDevIns The device instance.
3002 * @param iIrq IRQ number to set.
3003 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3004 * @thread Any thread, but will involve the emulation thread.
3005 */
3006 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3007
3008 /**
3009 * Attaches a driver (chain) to the device.
3010 *
3011 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
3012 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
3013 *
3014 * @returns VBox status code.
3015 * @param pDevIns The device instance.
3016 * @param iLun The logical unit to attach.
3017 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
3018 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
3019 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
3020 * for the live of the device instance.
3021 */
3022 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface,
3023 PPDMIBASE *ppBaseInterface, const char *pszDesc));
3024
3025 /**
3026 * Create a queue.
3027 *
3028 * @returns VBox status code.
3029 * @param pDevIns The device instance.
3030 * @param cbItem The size of a queue item.
3031 * @param cItems The number of items in the queue.
3032 * @param cMilliesInterval The number of milliseconds between polling the queue.
3033 * If 0 then the emulation thread will be notified whenever an item arrives.
3034 * @param pfnCallback The consumer function.
3035 * @param fRZEnabled Set if the queue should work in RC and R0.
3036 * @param pszName The queue base name. The instance number will be
3037 * appended automatically.
3038 * @param ppQueue Where to store the queue handle on success.
3039 * @thread The emulation thread.
3040 * @remarks The device critical section will NOT be entered before calling the
3041 * callback. No locks will be held, but for now it's safe to assume
3042 * that only one EMT will do queue callbacks at any one time.
3043 */
3044 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
3045 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
3046
3047 /**
3048 * Initializes a PDM critical section.
3049 *
3050 * The PDM critical sections are derived from the IPRT critical sections, but
3051 * works in RC and R0 as well.
3052 *
3053 * @returns VBox status code.
3054 * @param pDevIns The device instance.
3055 * @param pCritSect Pointer to the critical section.
3056 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3057 * @param pszNameFmt Format string for naming the critical section.
3058 * For statistics and lock validation.
3059 * @param va Arguments for the format string.
3060 */
3061 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
3062 const char *pszNameFmt, va_list va));
3063
3064 /**
3065 * Gets the NOP critical section.
3066 *
3067 * @returns The ring-3 address of the NOP critical section.
3068 * @param pDevIns The device instance.
3069 */
3070 DECLR3CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns));
3071
3072 /**
3073 * Gets the NOP critical section.
3074 *
3075 * @returns The ring-0 address of the NOP critical section.
3076 * @param pDevIns The device instance.
3077 */
3078 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns));
3079
3080 /**
3081 * Gets the NOP critical section.
3082 *
3083 * @returns The raw-mode context address of the NOP critical section.
3084 * @param pDevIns The device instance.
3085 */
3086 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns));
3087
3088 /**
3089 * Changes the device level critical section from the automatically created
3090 * default to one desired by the device constructor.
3091 *
3092 * @returns VBox status code.
3093 * @param pDevIns The device instance.
3094 * @param pCritSect The critical section to use. NULL is not
3095 * valid, instead use the NOP critical
3096 * section.
3097 */
3098 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect));
3099
3100 /**
3101 * Creates a PDM thread.
3102 *
3103 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
3104 * resuming, and destroying the thread as the VM state changes.
3105 *
3106 * @returns VBox status code.
3107 * @param pDevIns The device instance.
3108 * @param ppThread Where to store the thread 'handle'.
3109 * @param pvUser The user argument to the thread function.
3110 * @param pfnThread The thread function.
3111 * @param pfnWakeup The wakup callback. This is called on the EMT
3112 * thread when a state change is pending.
3113 * @param cbStack See RTThreadCreate.
3114 * @param enmType See RTThreadCreate.
3115 * @param pszName See RTThreadCreate.
3116 * @remarks The device critical section will NOT be entered prior to invoking
3117 * the function pointers.
3118 */
3119 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3120 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
3121
3122 /**
3123 * Set up asynchronous handling of a suspend, reset or power off notification.
3124 *
3125 * This shall only be called when getting the notification. It must be called
3126 * for each one.
3127 *
3128 * @returns VBox status code.
3129 * @param pDevIns The device instance.
3130 * @param pfnAsyncNotify The callback.
3131 * @thread EMT(0)
3132 * @remarks The caller will enter the device critical section prior to invoking
3133 * the callback.
3134 */
3135 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
3136
3137 /**
3138 * Notify EMT(0) that the device has completed the asynchronous notification
3139 * handling.
3140 *
3141 * This can be called at any time, spurious calls will simply be ignored.
3142 *
3143 * @param pDevIns The device instance.
3144 * @thread Any
3145 */
3146 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
3147
3148 /**
3149 * Register the RTC device.
3150 *
3151 * @returns VBox status code.
3152 * @param pDevIns The device instance.
3153 * @param pRtcReg Pointer to a RTC registration structure.
3154 * @param ppRtcHlp Where to store the pointer to the helper
3155 * functions.
3156 */
3157 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
3158
3159 /**
3160 * Register the PCI Bus.
3161 *
3162 * @returns VBox status code.
3163 * @param pDevIns The device instance.
3164 * @param pPciBusReg Pointer to PCI bus registration structure.
3165 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
3166 * helpers.
3167 */
3168 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
3169
3170 /**
3171 * Register the PIC device.
3172 *
3173 * @returns VBox status code.
3174 * @param pDevIns The device instance.
3175 * @param pPicReg Pointer to a PIC registration structure.
3176 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
3177 * helpers.
3178 */
3179 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
3180
3181 /**
3182 * Register the APIC device.
3183 *
3184 * @returns VBox status code.
3185 * @param pDevIns The device instance.
3186 * @param pApicReg Pointer to a APIC registration structure.
3187 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
3188 */
3189 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
3190
3191 /**
3192 * Register the I/O APIC device.
3193 *
3194 * @returns VBox status code.
3195 * @param pDevIns The device instance.
3196 * @param pIoApicReg Pointer to a I/O APIC registration structure.
3197 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
3198 * helpers.
3199 */
3200 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
3201
3202 /**
3203 * Register the HPET device.
3204 *
3205 * @returns VBox status code.
3206 * @param pDevIns The device instance.
3207 * @param pHpetReg Pointer to a HPET registration structure.
3208 * @param ppHpetHlpR3 Where to store the pointer to the HPET
3209 * helpers.
3210 */
3211 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
3212
3213 /**
3214 * Register a raw PCI device.
3215 *
3216 * @returns VBox status code.
3217 * @param pDevIns The device instance.
3218 * @param pHpetReg Pointer to a raw PCI registration structure.
3219 * @param ppPciRawHlpR3 Where to store the pointer to the raw PCI
3220 * device helpers.
3221 */
3222 DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
3223
3224 /**
3225 * Register the DMA device.
3226 *
3227 * @returns VBox status code.
3228 * @param pDevIns The device instance.
3229 * @param pDmacReg Pointer to a DMAC registration structure.
3230 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
3231 */
3232 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
3233
3234 /**
3235 * Register transfer function for DMA channel.
3236 *
3237 * @returns VBox status code.
3238 * @param pDevIns The device instance.
3239 * @param uChannel Channel number.
3240 * @param pfnTransferHandler Device specific transfer callback function.
3241 * @param pvUser User pointer to pass to the callback.
3242 * @thread EMT
3243 */
3244 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
3245
3246 /**
3247 * Read memory.
3248 *
3249 * @returns VBox status code.
3250 * @param pDevIns The device instance.
3251 * @param uChannel Channel number.
3252 * @param pvBuffer Pointer to target buffer.
3253 * @param off DMA position.
3254 * @param cbBlock Block size.
3255 * @param pcbRead Where to store the number of bytes which was
3256 * read. optional.
3257 * @thread EMT
3258 */
3259 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
3260
3261 /**
3262 * Write memory.
3263 *
3264 * @returns VBox status code.
3265 * @param pDevIns The device instance.
3266 * @param uChannel Channel number.
3267 * @param pvBuffer Memory to write.
3268 * @param off DMA position.
3269 * @param cbBlock Block size.
3270 * @param pcbWritten Where to store the number of bytes which was
3271 * written. optional.
3272 * @thread EMT
3273 */
3274 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
3275
3276 /**
3277 * Set the DREQ line.
3278 *
3279 * @returns VBox status code.
3280 * @param pDevIns Device instance.
3281 * @param uChannel Channel number.
3282 * @param uLevel Level of the line.
3283 * @thread EMT
3284 */
3285 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
3286
3287 /**
3288 * Get channel mode.
3289 *
3290 * @returns Channel mode. See specs.
3291 * @param pDevIns The device instance.
3292 * @param uChannel Channel number.
3293 * @thread EMT
3294 */
3295 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
3296
3297 /**
3298 * Schedule DMA execution.
3299 *
3300 * @param pDevIns The device instance.
3301 * @thread Any thread.
3302 */
3303 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
3304
3305 /**
3306 * Write CMOS value and update the checksum(s).
3307 *
3308 * @returns VBox status code.
3309 * @param pDevIns The device instance.
3310 * @param iReg The CMOS register index.
3311 * @param u8Value The CMOS register value.
3312 * @thread EMT
3313 */
3314 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3315
3316 /**
3317 * Read CMOS value.
3318 *
3319 * @returns VBox status code.
3320 * @param pDevIns The device instance.
3321 * @param iReg The CMOS register index.
3322 * @param pu8Value Where to store the CMOS register value.
3323 * @thread EMT
3324 */
3325 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3326
3327 /**
3328 * Assert that the current thread is the emulation thread.
3329 *
3330 * @returns True if correct.
3331 * @returns False if wrong.
3332 * @param pDevIns The device instance.
3333 * @param pszFile Filename of the assertion location.
3334 * @param iLine The linenumber of the assertion location.
3335 * @param pszFunction Function of the assertion location.
3336 */
3337 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3338
3339 /**
3340 * Assert that the current thread is NOT the emulation thread.
3341 *
3342 * @returns True if correct.
3343 * @returns False if wrong.
3344 * @param pDevIns The device instance.
3345 * @param pszFile Filename of the assertion location.
3346 * @param iLine The linenumber of the assertion location.
3347 * @param pszFunction Function of the assertion location.
3348 */
3349 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3350
3351 /**
3352 * Resolves the symbol for a raw-mode context interface.
3353 *
3354 * @returns VBox status code.
3355 * @param pDevIns The device instance.
3356 * @param pvInterface The interface structure.
3357 * @param cbInterface The size of the interface structure.
3358 * @param pszSymPrefix What to prefix the symbols in the list with
3359 * before resolving them. This must start with
3360 * 'dev' and contain the driver name.
3361 * @param pszSymList List of symbols corresponding to the interface.
3362 * There is generally a there is generally a define
3363 * holding this list associated with the interface
3364 * definition (INTERFACE_SYM_LIST). For more
3365 * details see PDMR3LdrGetInterfaceSymbols.
3366 * @thread EMT
3367 */
3368 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3369 const char *pszSymPrefix, const char *pszSymList));
3370
3371 /**
3372 * Resolves the symbol for a ring-0 context interface.
3373 *
3374 * @returns VBox status code.
3375 * @param pDevIns The device instance.
3376 * @param pvInterface The interface structure.
3377 * @param cbInterface The size of the interface structure.
3378 * @param pszSymPrefix What to prefix the symbols in the list with
3379 * before resolving them. This must start with
3380 * 'dev' and contain the driver name.
3381 * @param pszSymList List of symbols corresponding to the interface.
3382 * There is generally a there is generally a define
3383 * holding this list associated with the interface
3384 * definition (INTERFACE_SYM_LIST). For more
3385 * details see PDMR3LdrGetInterfaceSymbols.
3386 * @thread EMT
3387 */
3388 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3389 const char *pszSymPrefix, const char *pszSymList));
3390
3391 /**
3392 * Call the ring-0 request handler routine of the device.
3393 *
3394 * For this to work, the device must be ring-0 enabled and export a request
3395 * handler function. The name of the function must be the device name in
3396 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3397 * 'ReqHandler'. The device name will be captialized. It shall take the
3398 * exact same arguments as this function and be declared using
3399 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3400 *
3401 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3402 * or two as the handler address will be resolved on each invocation. This
3403 * is the reason for the EMT only restriction as well.
3404 *
3405 * @returns VBox status code.
3406 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3407 * handler function.
3408 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3409 *
3410 * @param pDevIns The device instance.
3411 * @param uOperation The operation to perform.
3412 * @param u64Arg 64-bit integer argument.
3413 * @thread EMT
3414 */
3415 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3416
3417 /** Space reserved for future members.
3418 * @{ */
3419 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3420 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3421 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3422 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3423 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3424 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3425 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3426 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3427 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
3428 /*DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));*/
3429 /** @} */
3430
3431
3432 /** API available to trusted devices only.
3433 *
3434 * These APIs are providing unrestricted access to the guest and the VM,
3435 * or they are interacting intimately with PDM.
3436 *
3437 * @{
3438 */
3439
3440 /**
3441 * Gets the user mode VM handle. Restricted API.
3442 *
3443 * @returns User mode VM Handle.
3444 * @param pDevIns The device instance.
3445 */
3446 DECLR3CALLBACKMEMBER(PUVM, pfnGetUVM,(PPDMDEVINS pDevIns));
3447
3448 /**
3449 * Gets the global VM handle. Restricted API.
3450 *
3451 * @returns VM Handle.
3452 * @param pDevIns The device instance.
3453 */
3454 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3455
3456 /**
3457 * Gets the VMCPU handle. Restricted API.
3458 *
3459 * @returns VMCPU Handle.
3460 * @param pDevIns The device instance.
3461 */
3462 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3463
3464 /**
3465 * Registers the VMM device heap
3466 *
3467 * @returns VBox status code.
3468 * @param pDevIns The device instance.
3469 * @param GCPhys The physical address.
3470 * @param pvHeap Ring 3 heap pointer.
3471 * @param cbSize Size of the heap.
3472 * @thread EMT.
3473 */
3474 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3475
3476 /**
3477 * Unregisters the VMM device heap
3478 *
3479 * @returns VBox status code.
3480 * @param pDevIns The device instance.
3481 * @param GCPhys The physical address.
3482 * @thread EMT.
3483 */
3484 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3485
3486 /**
3487 * Resets the VM.
3488 *
3489 * @returns The appropriate VBox status code to pass around on reset.
3490 * @param pDevIns The device instance.
3491 * @thread The emulation thread.
3492 */
3493 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3494
3495 /**
3496 * Suspends the VM.
3497 *
3498 * @returns The appropriate VBox status code to pass around on suspend.
3499 * @param pDevIns The device instance.
3500 * @thread The emulation thread.
3501 */
3502 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3503
3504 /**
3505 * Suspends, saves and powers off the VM.
3506 *
3507 * @returns The appropriate VBox status code to pass around.
3508 * @param pDevIns The device instance.
3509 * @thread An emulation thread.
3510 */
3511 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3512
3513 /**
3514 * Power off the VM.
3515 *
3516 * @returns The appropriate VBox status code to pass around on power off.
3517 * @param pDevIns The device instance.
3518 * @thread The emulation thread.
3519 */
3520 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3521
3522 /**
3523 * Checks if the Gate A20 is enabled or not.
3524 *
3525 * @returns true if A20 is enabled.
3526 * @returns false if A20 is disabled.
3527 * @param pDevIns The device instance.
3528 * @thread The emulation thread.
3529 */
3530 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3531
3532 /**
3533 * Enables or disables the Gate A20.
3534 *
3535 * @param pDevIns The device instance.
3536 * @param fEnable Set this flag to enable the Gate A20; clear it
3537 * to disable.
3538 * @thread The emulation thread.
3539 */
3540 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3541
3542 /**
3543 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3544 * thread.
3545 *
3546 * @param pDevIns The device instance.
3547 * @param iLeaf The CPUID leaf to get.
3548 * @param pEax Where to store the EAX value.
3549 * @param pEbx Where to store the EBX value.
3550 * @param pEcx Where to store the ECX value.
3551 * @param pEdx Where to store the EDX value.
3552 * @thread EMT.
3553 */
3554 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3555
3556 /**
3557 * Get the current virtual clock time in a VM. The clock frequency must be
3558 * queried separately.
3559 *
3560 * @returns Current clock time.
3561 * @param pDevIns The device instance.
3562 */
3563 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3564
3565 /**
3566 * Get the frequency of the virtual clock.
3567 *
3568 * @returns The clock frequency (not variable at run-time).
3569 * @param pDevIns The device instance.
3570 */
3571 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3572
3573 /**
3574 * Get the current virtual clock time in a VM, in nanoseconds.
3575 *
3576 * @returns Current clock time (in ns).
3577 * @param pDevIns The device instance.
3578 */
3579 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3580
3581 /** @} */
3582
3583 /** Just a safety precaution. (PDM_DEVHLPR3_VERSION) */
3584 uint32_t u32TheEnd;
3585} PDMDEVHLPR3;
3586#endif /* !IN_RING3 */
3587/** Pointer to the R3 PDM Device API. */
3588typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3589/** Pointer to the R3 PDM Device API, const variant. */
3590typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3591
3592/** Current PDMDEVHLPR3 version number. */
3593#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 11, 0)
3594
3595
3596/**
3597 * PDM Device API - RC Variant.
3598 */
3599typedef struct PDMDEVHLPRC
3600{
3601 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3602 uint32_t u32Version;
3603
3604 /**
3605 * Bus master physical memory read.
3606 *
3607 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
3608 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3609 * @param pDevIns The device instance.
3610 * @param GCPhys Physical address start reading from.
3611 * @param pvBuf Where to put the read bits.
3612 * @param cbRead How many bytes to read.
3613 * @thread Any thread, but the call may involve the emulation thread.
3614 */
3615 DECLRCCALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3616
3617 /**
3618 * Bus master physical memory write.
3619 *
3620 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
3621 * VERR_EM_MEMORY. The informational status shall NOT be propagated!
3622 * @param pDevIns The device instance.
3623 * @param GCPhys Physical address to write to.
3624 * @param pvBuf What to write.
3625 * @param cbWrite How many bytes to write.
3626 * @thread Any thread, but the call may involve the emulation thread.
3627 */
3628 DECLRCCALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3629
3630 /**
3631 * Set the IRQ for a PCI device.
3632 *
3633 * @param pDevIns Device instance.
3634 * @param iIrq IRQ number to set.
3635 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3636 * @thread Any thread, but will involve the emulation thread.
3637 */
3638 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3639
3640 /**
3641 * Set ISA IRQ for a device.
3642 *
3643 * @param pDevIns Device instance.
3644 * @param iIrq IRQ number to set.
3645 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3646 * @thread Any thread, but will involve the emulation thread.
3647 */
3648 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3649
3650 /**
3651 * Read physical memory.
3652 *
3653 * @returns VINF_SUCCESS (for now).
3654 * @param pDevIns Device instance.
3655 * @param GCPhys Physical address start reading from.
3656 * @param pvBuf Where to put the read bits.
3657 * @param cbRead How many bytes to read.
3658 */
3659 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3660
3661 /**
3662 * Write to physical memory.
3663 *
3664 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3665 * @param pDevIns Device instance.
3666 * @param GCPhys Physical address to write to.
3667 * @param pvBuf What to write.
3668 * @param cbWrite How many bytes to write.
3669 */
3670 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3671
3672 /**
3673 * Checks if the Gate A20 is enabled or not.
3674 *
3675 * @returns true if A20 is enabled.
3676 * @returns false if A20 is disabled.
3677 * @param pDevIns Device instance.
3678 * @thread The emulation thread.
3679 */
3680 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3681
3682 /**
3683 * Gets the VM state.
3684 *
3685 * @returns VM state.
3686 * @param pDevIns The device instance.
3687 * @thread Any thread (just keep in mind that it's volatile info).
3688 */
3689 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3690
3691 /**
3692 * Set the VM error message
3693 *
3694 * @returns rc.
3695 * @param pDrvIns Driver instance.
3696 * @param rc VBox status code.
3697 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3698 * @param pszFormat Error message format string.
3699 * @param ... Error message arguments.
3700 */
3701 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3702
3703 /**
3704 * Set the VM error message
3705 *
3706 * @returns rc.
3707 * @param pDrvIns Driver instance.
3708 * @param rc VBox status code.
3709 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3710 * @param pszFormat Error message format string.
3711 * @param va Error message arguments.
3712 */
3713 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3714
3715 /**
3716 * Set the VM runtime error message
3717 *
3718 * @returns VBox status code.
3719 * @param pDevIns Device instance.
3720 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3721 * @param pszErrorId Error ID string.
3722 * @param pszFormat Error message format string.
3723 * @param ... Error message arguments.
3724 */
3725 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3726
3727 /**
3728 * Set the VM runtime error message
3729 *
3730 * @returns VBox status code.
3731 * @param pDevIns Device instance.
3732 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3733 * @param pszErrorId Error ID string.
3734 * @param pszFormat Error message format string.
3735 * @param va Error message arguments.
3736 */
3737 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3738
3739 /**
3740 * Set parameters for pending MMIO patch operation
3741 *
3742 * @returns VBox status code.
3743 * @param pDevIns Device instance.
3744 * @param GCPhys MMIO physical address
3745 * @param pCachedData GC pointer to cached data
3746 */
3747 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3748
3749 /**
3750 * Gets the VM handle. Restricted API.
3751 *
3752 * @returns VM Handle.
3753 * @param pDevIns Device instance.
3754 */
3755 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3756
3757 /**
3758 * Gets the VMCPU handle. Restricted API.
3759 *
3760 * @returns VMCPU Handle.
3761 * @param pDevIns The device instance.
3762 */
3763 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3764
3765 /**
3766 * Get the current virtual clock time in a VM. The clock frequency must be
3767 * queried separately.
3768 *
3769 * @returns Current clock time.
3770 * @param pDevIns The device instance.
3771 */
3772 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3773
3774 /**
3775 * Get the frequency of the virtual clock.
3776 *
3777 * @returns The clock frequency (not variable at run-time).
3778 * @param pDevIns The device instance.
3779 */
3780 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3781
3782 /**
3783 * Get the current virtual clock time in a VM, in nanoseconds.
3784 *
3785 * @returns Current clock time (in ns).
3786 * @param pDevIns The device instance.
3787 */
3788 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3789
3790 /**
3791 * Gets the trace buffer handle.
3792 *
3793 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3794 * really inteded for direct usage, thus no inline wrapper function.
3795 *
3796 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3797 * @param pDevIns The device instance.
3798 */
3799 DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3800
3801 /** Just a safety precaution. */
3802 uint32_t u32TheEnd;
3803} PDMDEVHLPRC;
3804/** Pointer PDM Device RC API. */
3805typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3806/** Pointer PDM Device RC API. */
3807typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3808
3809/** Current PDMDEVHLP version number. */
3810#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 3, 1)
3811
3812
3813/**
3814 * PDM Device API - R0 Variant.
3815 */
3816typedef struct PDMDEVHLPR0
3817{
3818 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3819 uint32_t u32Version;
3820
3821 /**
3822 * Bus master physical memory read.
3823 *
3824 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3825 * VERR_EM_MEMORY.
3826 * @param pDevIns The device instance.
3827 * @param GCPhys Physical address start reading from.
3828 * @param pvBuf Where to put the read bits.
3829 * @param cbRead How many bytes to read.
3830 * @thread Any thread, but the call may involve the emulation thread.
3831 */
3832 DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3833
3834 /**
3835 * Bus master physical memory write.
3836 *
3837 * @returns VINF_SUCCESS or VERR_PDM_NOT_PCI_BUS_MASTER, later maybe
3838 * VERR_EM_MEMORY.
3839 * @param pDevIns The device instance.
3840 * @param GCPhys Physical address to write to.
3841 * @param pvBuf What to write.
3842 * @param cbWrite How many bytes to write.
3843 * @thread Any thread, but the call may involve the emulation thread.
3844 */
3845 DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3846
3847 /**
3848 * Set the IRQ for a PCI device.
3849 *
3850 * @param pDevIns Device instance.
3851 * @param iIrq IRQ number to set.
3852 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3853 * @thread Any thread, but will involve the emulation thread.
3854 */
3855 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3856
3857 /**
3858 * Set ISA IRQ for a device.
3859 *
3860 * @param pDevIns Device instance.
3861 * @param iIrq IRQ number to set.
3862 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3863 * @thread Any thread, but will involve the emulation thread.
3864 */
3865 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3866
3867 /**
3868 * Read physical memory.
3869 *
3870 * @returns VINF_SUCCESS (for now).
3871 * @param pDevIns Device instance.
3872 * @param GCPhys Physical address start reading from.
3873 * @param pvBuf Where to put the read bits.
3874 * @param cbRead How many bytes to read.
3875 */
3876 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3877
3878 /**
3879 * Write to physical memory.
3880 *
3881 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3882 * @param pDevIns Device instance.
3883 * @param GCPhys Physical address to write to.
3884 * @param pvBuf What to write.
3885 * @param cbWrite How many bytes to write.
3886 */
3887 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3888
3889 /**
3890 * Checks if the Gate A20 is enabled or not.
3891 *
3892 * @returns true if A20 is enabled.
3893 * @returns false if A20 is disabled.
3894 * @param pDevIns Device instance.
3895 * @thread The emulation thread.
3896 */
3897 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3898
3899 /**
3900 * Gets the VM state.
3901 *
3902 * @returns VM state.
3903 * @param pDevIns The device instance.
3904 * @thread Any thread (just keep in mind that it's volatile info).
3905 */
3906 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3907
3908 /**
3909 * Set the VM error message
3910 *
3911 * @returns rc.
3912 * @param pDrvIns Driver instance.
3913 * @param rc VBox status code.
3914 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3915 * @param pszFormat Error message format string.
3916 * @param ... Error message arguments.
3917 */
3918 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3919
3920 /**
3921 * Set the VM error message
3922 *
3923 * @returns rc.
3924 * @param pDrvIns Driver instance.
3925 * @param rc VBox status code.
3926 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3927 * @param pszFormat Error message format string.
3928 * @param va Error message arguments.
3929 */
3930 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3931
3932 /**
3933 * Set the VM runtime error message
3934 *
3935 * @returns VBox status code.
3936 * @param pDevIns Device instance.
3937 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3938 * @param pszErrorId Error ID string.
3939 * @param pszFormat Error message format string.
3940 * @param ... Error message arguments.
3941 */
3942 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3943
3944 /**
3945 * Set the VM runtime error message
3946 *
3947 * @returns VBox status code.
3948 * @param pDevIns Device instance.
3949 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3950 * @param pszErrorId Error ID string.
3951 * @param pszFormat Error message format string.
3952 * @param va Error message arguments.
3953 */
3954 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3955
3956 /**
3957 * Set parameters for pending MMIO patch operation
3958 *
3959 * @returns rc.
3960 * @param pDevIns Device instance.
3961 * @param GCPhys MMIO physical address
3962 * @param pCachedData GC pointer to cached data
3963 */
3964 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3965
3966 /**
3967 * Gets the VM handle. Restricted API.
3968 *
3969 * @returns VM Handle.
3970 * @param pDevIns Device instance.
3971 */
3972 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3973
3974 /**
3975 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3976 *
3977 * @returns true = yes, false = no
3978 * @param pDevIns Device instance.
3979 */
3980 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3981
3982 /**
3983 * Gets the VMCPU handle. Restricted API.
3984 *
3985 * @returns VMCPU Handle.
3986 * @param pDevIns The device instance.
3987 */
3988 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3989
3990 /**
3991 * Get the current virtual clock time in a VM. The clock frequency must be
3992 * queried separately.
3993 *
3994 * @returns Current clock time.
3995 * @param pDevIns The device instance.
3996 */
3997 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3998
3999 /**
4000 * Get the frequency of the virtual clock.
4001 *
4002 * @returns The clock frequency (not variable at run-time).
4003 * @param pDevIns The device instance.
4004 */
4005 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
4006
4007 /**
4008 * Get the current virtual clock time in a VM, in nanoseconds.
4009 *
4010 * @returns Current clock time (in ns).
4011 * @param pDevIns The device instance.
4012 */
4013 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
4014
4015 /**
4016 * Gets the trace buffer handle.
4017 *
4018 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
4019 * really inteded for direct usage, thus no inline wrapper function.
4020 *
4021 * @returns Trace buffer handle or NIL_RTTRACEBUF.
4022 * @param pDevIns The device instance.
4023 */
4024 DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
4025
4026 /** Just a safety precaution. */
4027 uint32_t u32TheEnd;
4028} PDMDEVHLPR0;
4029/** Pointer PDM Device R0 API. */
4030typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
4031/** Pointer PDM Device GC API. */
4032typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
4033
4034/** Current PDMDEVHLP version number. */
4035#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 3, 1)
4036
4037
4038
4039/**
4040 * PDM Device Instance.
4041 */
4042typedef struct PDMDEVINS
4043{
4044 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
4045 uint32_t u32Version;
4046 /** Device instance number. */
4047 uint32_t iInstance;
4048
4049 /** Pointer the GC PDM Device API. */
4050 PCPDMDEVHLPRC pHlpRC;
4051 /** Pointer to device instance data. */
4052 RTRCPTR pvInstanceDataRC;
4053 /** The critical section for the device, see pCritSectXR3. */
4054 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC;
4055 /** Alignment padding. */
4056 RTRCPTR pAlignmentRC;
4057
4058 /** Pointer the R0 PDM Device API. */
4059 PCPDMDEVHLPR0 pHlpR0;
4060 /** Pointer to device instance data (R0). */
4061 RTR0PTR pvInstanceDataR0;
4062 /** The critical section for the device, see pCritSectXR3. */
4063 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0;
4064
4065 /** Pointer the HC PDM Device API. */
4066 PCPDMDEVHLPR3 pHlpR3;
4067 /** Pointer to device instance data. */
4068 RTR3PTR pvInstanceDataR3;
4069 /** The critical section for the device.
4070 *
4071 * TM and IOM will enter this critical section before calling into the device
4072 * code. PDM will when doing power on, power off, reset, suspend and resume
4073 * notifications. SSM will currently not, but this will be changed later on.
4074 *
4075 * The device gets a critical section automatically assigned to it before
4076 * the constructor is called. If the constructor wishes to use a different
4077 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it
4078 * very early on.
4079 */
4080 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3;
4081
4082 /** Pointer to device registration structure. */
4083 R3PTRTYPE(PCPDMDEVREG) pReg;
4084 /** Configuration handle. */
4085 R3PTRTYPE(PCFGMNODE) pCfg;
4086
4087 /** The base interface of the device.
4088 *
4089 * The device constructor initializes this if it has any
4090 * device level interfaces to export. To obtain this interface
4091 * call PDMR3QueryDevice(). */
4092 PDMIBASE IBase;
4093
4094 /** Tracing indicator. */
4095 uint32_t fTracing;
4096 /** The tracing ID of this device. */
4097 uint32_t idTracing;
4098#if HC_ARCH_BITS == 32
4099 /** Align the internal data more naturally. */
4100 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 13 : 0];
4101#endif
4102
4103 /** Internal data. */
4104 union
4105 {
4106#ifdef PDMDEVINSINT_DECLARED
4107 PDMDEVINSINT s;
4108#endif
4109 uint8_t padding[HC_ARCH_BITS == 32 ? 72 : 112 + 0x28];
4110 } Internal;
4111
4112 /** Device instance data. The size of this area is defined
4113 * in the PDMDEVREG::cbInstanceData field. */
4114 char achInstanceData[8];
4115} PDMDEVINS;
4116
4117/** Current PDMDEVINS version number. */
4118#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 3, 0)
4119
4120/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
4121#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
4122
4123/**
4124 * Checks the structure versions of the device instance and device helpers,
4125 * returning if they are incompatible.
4126 *
4127 * This is for use in the constructor.
4128 *
4129 * @param pDevIns The device instance pointer.
4130 */
4131#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
4132 do \
4133 { \
4134 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4135 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4136 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4137 VERR_PDM_DEVINS_VERSION_MISMATCH); \
4138 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4139 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4140 VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
4141 } while (0)
4142
4143/**
4144 * Quietly checks the structure versions of the device instance and device
4145 * helpers, returning if they are incompatible.
4146 *
4147 * This is for use in the destructor.
4148 *
4149 * @param pDevIns The device instance pointer.
4150 */
4151#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
4152 do \
4153 { \
4154 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4155 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
4156 return VERR_PDM_DEVINS_VERSION_MISMATCH; \
4157 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
4158 return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
4159 } while (0)
4160
4161/**
4162 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
4163 * constructor - returns on failure.
4164 *
4165 * This should be invoked after having initialized the instance data
4166 * sufficiently for the correct operation of the destructor. The destructor is
4167 * always called!
4168 *
4169 * @param pDevIns Pointer to the PDM device instance.
4170 * @param pszValidValues Patterns describing the valid value names. See
4171 * RTStrSimplePatternMultiMatch for details on the
4172 * pattern syntax.
4173 * @param pszValidNodes Patterns describing the valid node (key) names.
4174 * Pass empty string if no valid nodes.
4175 */
4176#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
4177 do \
4178 { \
4179 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
4180 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
4181 if (RT_FAILURE(rcValCfg)) \
4182 return rcValCfg; \
4183 } while (0)
4184
4185/** @def PDMDEV_ASSERT_EMT
4186 * Assert that the current thread is the emulation thread.
4187 */
4188#ifdef VBOX_STRICT
4189# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4190#else
4191# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
4192#endif
4193
4194/** @def PDMDEV_ASSERT_OTHER
4195 * Assert that the current thread is NOT the emulation thread.
4196 */
4197#ifdef VBOX_STRICT
4198# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4199#else
4200# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
4201#endif
4202
4203/** @def PDMDEV_ASSERT_VMLOCK_OWNER
4204 * Assert that the current thread is owner of the VM lock.
4205 */
4206#ifdef VBOX_STRICT
4207# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4208#else
4209# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
4210#endif
4211
4212/** @def PDMDEV_SET_ERROR
4213 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
4214 */
4215#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
4216 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
4217
4218/** @def PDMDEV_SET_RUNTIME_ERROR
4219 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
4220 */
4221#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
4222 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
4223
4224/** @def PDMDEVINS_2_RCPTR
4225 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
4226 */
4227#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4228
4229/** @def PDMDEVINS_2_R3PTR
4230 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
4231 */
4232#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4233
4234/** @def PDMDEVINS_2_R0PTR
4235 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
4236 */
4237#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4238
4239
4240#ifdef IN_RING3
4241
4242/**
4243 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
4244 */
4245DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
4246 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
4247 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
4248{
4249 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
4250}
4251
4252/**
4253 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
4254 */
4255DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
4256 const char *pszOut, const char *pszIn, const char *pszOutStr,
4257 const char *pszInStr, const char *pszDesc)
4258{
4259 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4260}
4261
4262/**
4263 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
4264 */
4265DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
4266 const char *pszOut, const char *pszIn, const char *pszOutStr,
4267 const char *pszInStr, const char *pszDesc)
4268{
4269 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4270}
4271
4272/**
4273 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
4274 */
4275DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
4276{
4277 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
4278}
4279
4280/**
4281 * Register a Memory Mapped I/O (MMIO) region.
4282 *
4283 * These callbacks are of course for the ring-3 context (R3). Register HC
4284 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
4285 * must be a R3 handler for every RC and R0 handler!
4286 *
4287 * @returns VBox status.
4288 * @param pDevIns The device instance to register the MMIO with.
4289 * @param GCPhysStart First physical address in the range.
4290 * @param cbRange The size of the range (in bytes).
4291 * @param pvUser User argument.
4292 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
4293 * @param pfnWrite Pointer to function which is gonna handle Write operations.
4294 * @param pfnRead Pointer to function which is gonna handle Read operations.
4295 * @param pszDesc Pointer to description string. This must not be freed.
4296 */
4297DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4298 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, const char *pszDesc)
4299{
4300 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
4301 fFlags, pszDesc);
4302}
4303
4304/**
4305 * Register a Memory Mapped I/O (MMIO) region for GC.
4306 *
4307 * These callbacks are for the raw-mode context (RC). Register ring-3 context
4308 * (R3) handlers before guest context handlers! There must be a R3 handler for
4309 * every RC handler!
4310 *
4311 * @returns VBox status.
4312 * @param pDevIns The device instance to register the MMIO with.
4313 * @param GCPhysStart First physical address in the range.
4314 * @param cbRange The size of the range (in bytes).
4315 * @param pvUser User argument.
4316 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4317 * @param pszRead Name of the RC function which is gonna handle Read operations.
4318 */
4319DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4320 const char *pszWrite, const char *pszRead)
4321{
4322 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4323}
4324
4325/**
4326 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4327 */
4328DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4329 const char *pszWrite, const char *pszRead)
4330{
4331 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4332}
4333
4334/**
4335 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4336 */
4337DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4338 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead,
4339 PFNIOMMMIOFILL pfnFill, const char *pszDesc)
4340{
4341 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
4342 fFlags, pszDesc);
4343}
4344
4345/**
4346 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
4347 */
4348DECLINLINE(int) PDMDevHlpMMIORegisterRCEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4349 const char *pszWrite, const char *pszRead, const char *pszFill)
4350{
4351 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4352}
4353
4354/**
4355 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4356 */
4357DECLINLINE(int) PDMDevHlpMMIORegisterR0Ex(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4358 const char *pszWrite, const char *pszRead, const char *pszFill)
4359{
4360 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4361}
4362
4363/**
4364 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
4365 */
4366DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
4367{
4368 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
4369}
4370
4371/**
4372 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
4373 */
4374DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
4375{
4376 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
4377}
4378
4379/**
4380 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
4381 */
4382DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
4383{
4384 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
4385}
4386
4387/**
4388 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
4389 */
4390DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4391{
4392 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
4393}
4394
4395/**
4396 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
4397 */
4398DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4399{
4400 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
4401}
4402
4403/**
4404 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
4405 */
4406DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4407 const char *pszDesc, PRTRCPTR pRCPtr)
4408{
4409 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
4410}
4411
4412/**
4413 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
4414 */
4415DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4416 const char *pszDesc, PRTR0PTR pR0Ptr)
4417{
4418 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
4419}
4420
4421/**
4422 * @copydoc PDMDEVHLPR3::pfnROMRegister
4423 */
4424DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
4425 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
4426{
4427 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
4428}
4429
4430/**
4431 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
4432 */
4433DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
4434{
4435 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
4436}
4437
4438/**
4439 * Register a save state data unit.
4440 *
4441 * @returns VBox status.
4442 * @param pDevIns The device instance.
4443 * @param uVersion Data layout version number.
4444 * @param cbGuess The approximate amount of data in the unit.
4445 * Only for progress indicators.
4446 * @param pfnSaveExec Execute save callback, optional.
4447 * @param pfnLoadExec Execute load callback, optional.
4448 */
4449DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4450 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4451{
4452 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4453 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
4454 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4455 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4456}
4457
4458/**
4459 * Register a save state data unit with a live save callback as well.
4460 *
4461 * @returns VBox status.
4462 * @param pDevIns The device instance.
4463 * @param uVersion Data layout version number.
4464 * @param cbGuess The approximate amount of data in the unit.
4465 * Only for progress indicators.
4466 * @param pfnLiveExec Execute live callback, optional.
4467 * @param pfnSaveExec Execute save callback, optional.
4468 * @param pfnLoadExec Execute load callback, optional.
4469 */
4470DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4471 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4472{
4473 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4474 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
4475 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4476 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4477}
4478
4479/**
4480 * @copydoc PDMDEVHLPR3::pfnSSMRegister
4481 */
4482DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
4483 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
4484 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
4485 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
4486{
4487 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
4488 pfnLivePrep, pfnLiveExec, pfnLiveVote,
4489 pfnSavePrep, pfnSaveExec, pfnSaveDone,
4490 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
4491}
4492
4493/**
4494 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
4495 */
4496DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
4497 const char *pszDesc, PPTMTIMERR3 ppTimer)
4498{
4499 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
4500}
4501
4502/**
4503 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
4504 */
4505DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
4506{
4507 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
4508}
4509
4510#endif /* IN_RING3 */
4511
4512/**
4513 * @copydoc PDMDEVHLPR3::pfnPhysRead
4514 */
4515DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4516{
4517 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4518}
4519
4520/**
4521 * @copydoc PDMDEVHLPR3::pfnPhysWrite
4522 */
4523DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4524{
4525 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4526}
4527
4528#ifdef IN_RING3
4529
4530/**
4531 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4532 */
4533DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4534{
4535 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4536}
4537
4538/**
4539 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4540 */
4541DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
4542{
4543 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4544}
4545
4546/**
4547 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4548 */
4549DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4550{
4551 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4552}
4553
4554/**
4555 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4556 */
4557DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4558{
4559 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4560}
4561
4562/**
4563 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4564 */
4565DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4566{
4567 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4568}
4569
4570/**
4571 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4572 */
4573DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4574{
4575 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4576}
4577
4578/**
4579 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4580 */
4581DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4582{
4583 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4584}
4585
4586/**
4587 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4588 */
4589DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4590{
4591 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4592}
4593
4594/**
4595 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4596 */
4597DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4598{
4599 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4600}
4601#endif /* IN_RING3 */
4602
4603/**
4604 * @copydoc PDMDEVHLPR3::pfnVMState
4605 */
4606DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4607{
4608 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4609}
4610
4611#ifdef IN_RING3
4612/**
4613 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4614 */
4615DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4616{
4617 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4618}
4619#endif /* IN_RING3 */
4620
4621/**
4622 * @copydoc PDMDEVHLPR3::pfnVMSetError
4623 */
4624DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
4625{
4626 va_list va;
4627 va_start(va, pszFormat);
4628 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4629 va_end(va);
4630 return rc;
4631}
4632
4633/**
4634 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4635 */
4636DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
4637{
4638 va_list va;
4639 int rc;
4640 va_start(va, pszFormat);
4641 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4642 va_end(va);
4643 return rc;
4644}
4645
4646/**
4647 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4648 *
4649 * @returns VBox status code which must be passed up to the VMM. This will be
4650 * VINF_SUCCESS in non-strict builds.
4651 * @param pDevIns The device instance.
4652 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4653 * @param pszFormat Message. (optional)
4654 * @param ... Message parameters.
4655 */
4656DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4657{
4658#ifdef VBOX_STRICT
4659# ifdef IN_RING3
4660 int rc;
4661 va_list args;
4662 va_start(args, pszFormat);
4663 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4664 va_end(args);
4665 return rc;
4666# else
4667 NOREF(pDevIns);
4668 NOREF(pszFile);
4669 NOREF(iLine);
4670 NOREF(pszFunction);
4671 NOREF(pszFormat);
4672 return VINF_EM_DBG_STOP;
4673# endif
4674#else
4675 NOREF(pDevIns);
4676 NOREF(pszFile);
4677 NOREF(iLine);
4678 NOREF(pszFunction);
4679 NOREF(pszFormat);
4680 return VINF_SUCCESS;
4681#endif
4682}
4683
4684#ifdef IN_RING3
4685
4686/**
4687 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4688 */
4689DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4690{
4691 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4692}
4693
4694/**
4695 * @copydoc PDMDEVHLPR3::pfnDBGFRegRegister
4696 */
4697DECLINLINE(int) PDMDevHlpDBGFRegRegister(PPDMDEVINS pDevIns, PCDBGFREGDESC paRegisters)
4698{
4699 return pDevIns->pHlpR3->pfnDBGFRegRegister(pDevIns, paRegisters);
4700}
4701
4702/**
4703 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4704 */
4705DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4706{
4707 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4708}
4709
4710/**
4711 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4712 */
4713DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4714 const char *pszDesc, const char *pszName, ...)
4715{
4716 va_list va;
4717 va_start(va, pszName);
4718 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4719 va_end(va);
4720}
4721
4722/**
4723 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4724 */
4725DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4726{
4727 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4728}
4729
4730/**
4731 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4732 */
4733DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4734{
4735 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4736}
4737
4738/**
4739 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4740 */
4741DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4742{
4743 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4744}
4745
4746/**
4747 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4748 */
4749DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4750 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4751{
4752 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4753}
4754
4755#endif /* IN_RING3 */
4756
4757/**
4758 * @copydoc PDMDEVHLPR3::pfnPCIPhysRead
4759 */
4760DECLINLINE(int) PDMDevHlpPCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4761{
4762 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4763}
4764
4765/**
4766 * @copydoc PDMDEVHLPR3::pfnPCIPhysWrite
4767 */
4768DECLINLINE(int) PDMDevHlpPCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4769{
4770 return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4771}
4772
4773/**
4774 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4775 */
4776DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4777{
4778 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4779}
4780
4781/**
4782 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4783 */
4784DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4785{
4786 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4787}
4788
4789/**
4790 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4791 */
4792DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4793{
4794 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4795}
4796
4797/**
4798 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4799 */
4800DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4801{
4802 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4803}
4804
4805#ifdef IN_RING3
4806
4807/**
4808 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4809 */
4810DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4811{
4812 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4813}
4814
4815/**
4816 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4817 */
4818DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
4819 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4820{
4821 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
4822}
4823
4824/**
4825 * Initializes a PDM critical section.
4826 *
4827 * The PDM critical sections are derived from the IPRT critical sections, but
4828 * works in RC and R0 as well.
4829 *
4830 * @returns VBox status code.
4831 * @param pDevIns The device instance.
4832 * @param pCritSect Pointer to the critical section.
4833 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4834 * @param pszNameFmt Format string for naming the critical section.
4835 * For statistics and lock validation.
4836 * @param ... Arguments for the format string.
4837 */
4838DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4839{
4840 int rc;
4841 va_list va;
4842 va_start(va, pszNameFmt);
4843 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4844 va_end(va);
4845 return rc;
4846}
4847
4848/**
4849 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop
4850 */
4851DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns)
4852{
4853 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns);
4854}
4855
4856/**
4857 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopR0
4858 */
4859DECLINLINE(R0PTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopR0(PPDMDEVINS pDevIns)
4860{
4861 return pDevIns->pHlpR3->pfnCritSectGetNopR0(pDevIns);
4862}
4863
4864/**
4865 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopRC
4866 */
4867DECLINLINE(RCPTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopRC(PPDMDEVINS pDevIns)
4868{
4869 return pDevIns->pHlpR3->pfnCritSectGetNopRC(pDevIns);
4870}
4871
4872/**
4873 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect
4874 */
4875DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
4876{
4877 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect);
4878}
4879
4880/**
4881 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4882 */
4883DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4884 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4885{
4886 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4887}
4888
4889/**
4890 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4891 */
4892DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4893{
4894 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4895}
4896
4897/**
4898 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4899 */
4900DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4901{
4902 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4903}
4904
4905/**
4906 * @copydoc PDMDEVHLPR3::pfnA20Set
4907 */
4908DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4909{
4910 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
4911}
4912
4913/**
4914 * @copydoc PDMDEVHLPR3::pfnRTCRegister
4915 */
4916DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
4917{
4918 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
4919}
4920
4921/**
4922 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
4923 */
4924DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
4925{
4926 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
4927}
4928
4929/**
4930 * @copydoc PDMDEVHLPR3::pfnPICRegister
4931 */
4932DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
4933{
4934 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
4935}
4936
4937/**
4938 * @copydoc PDMDEVHLPR3::pfnAPICRegister
4939 */
4940DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
4941{
4942 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
4943}
4944
4945/**
4946 * @copydoc PDMDEVHLPR3::pfn
4947 */
4948DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
4949{
4950 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
4951}
4952
4953/**
4954 * @copydoc PDMDEVHLPR3::pfnHPETRegister
4955 */
4956DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
4957{
4958 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
4959}
4960
4961/**
4962 * @copydoc PDMDEVHLPR3::pfnPciRawRegister
4963 */
4964DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
4965{
4966 return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
4967}
4968
4969/**
4970 * @copydoc PDMDEVHLPR3::pfnDMACRegister
4971 */
4972DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
4973{
4974 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
4975}
4976
4977/**
4978 * @copydoc PDMDEVHLPR3::pfnDMARegister
4979 */
4980DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
4981{
4982 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
4983}
4984
4985/**
4986 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
4987 */
4988DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
4989{
4990 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
4991}
4992
4993/**
4994 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
4995 */
4996DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
4997{
4998 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
4999}
5000
5001/**
5002 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
5003 */
5004DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
5005{
5006 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
5007}
5008
5009/**
5010 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
5011 */
5012DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
5013{
5014 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
5015}
5016
5017/**
5018 * @copydoc PDMDEVHLPR3::pfnDMASchedule
5019 */
5020DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
5021{
5022 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
5023}
5024
5025/**
5026 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
5027 */
5028DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
5029{
5030 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
5031}
5032
5033/**
5034 * @copydoc PDMDEVHLPR3::pfnCMOSRead
5035 */
5036DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
5037{
5038 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
5039}
5040
5041/**
5042 * @copydoc PDMDEVHLP::pfnCallR0
5043 */
5044DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
5045{
5046 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
5047}
5048
5049/**
5050 * @copydoc PDMDEVHLPR3::pfnGetUVM
5051 */
5052DECLINLINE(PUVM) PDMDevHlpGetUVM(PPDMDEVINS pDevIns)
5053{
5054 return pDevIns->CTX_SUFF(pHlp)->pfnGetUVM(pDevIns);
5055}
5056
5057#endif /* IN_RING3 */
5058
5059/**
5060 * @copydoc PDMDEVHLPR3::pfnGetVM
5061 */
5062DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
5063{
5064 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
5065}
5066
5067/**
5068 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
5069 */
5070DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
5071{
5072 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
5073}
5074
5075/**
5076 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
5077 */
5078DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
5079{
5080 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
5081}
5082
5083/**
5084 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5085 */
5086DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
5087{
5088 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
5089}
5090
5091/**
5092 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5093 */
5094DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
5095{
5096 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
5097}
5098
5099#ifdef IN_RING3
5100
5101/**
5102 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
5103 */
5104DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
5105{
5106 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
5107}
5108
5109/**
5110 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
5111 */
5112DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
5113{
5114 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
5115}
5116
5117/**
5118 * @copydoc PDMDEVHLPR3::pfnVMReset
5119 */
5120DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
5121{
5122 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
5123}
5124
5125/**
5126 * @copydoc PDMDEVHLPR3::pfnVMSuspend
5127 */
5128DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
5129{
5130 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
5131}
5132
5133/**
5134 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
5135 */
5136DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
5137{
5138 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
5139}
5140
5141/**
5142 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
5143 */
5144DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
5145{
5146 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
5147}
5148
5149#endif /* IN_RING3 */
5150
5151/**
5152 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
5153 */
5154DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
5155{
5156 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
5157}
5158
5159#ifdef IN_RING3
5160
5161/**
5162 * @copydoc PDMDEVHLPR3::pfnGetCpuId
5163 */
5164DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
5165{
5166 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
5167}
5168
5169#endif /* IN_RING3 */
5170#ifdef IN_RING0
5171
5172/**
5173 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
5174 */
5175DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
5176{
5177 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
5178}
5179
5180#endif /* IN_RING0 */
5181
5182
5183
5184
5185/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
5186typedef struct PDMDEVREGCB *PPDMDEVREGCB;
5187
5188/**
5189 * Callbacks for VBoxDeviceRegister().
5190 */
5191typedef struct PDMDEVREGCB
5192{
5193 /** Interface version.
5194 * This is set to PDM_DEVREG_CB_VERSION. */
5195 uint32_t u32Version;
5196
5197 /**
5198 * Registers a device with the current VM instance.
5199 *
5200 * @returns VBox status code.
5201 * @param pCallbacks Pointer to the callback table.
5202 * @param pReg Pointer to the device registration record.
5203 * This data must be permanent and readonly.
5204 */
5205 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
5206} PDMDEVREGCB;
5207
5208/** Current version of the PDMDEVREGCB structure. */
5209#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
5210
5211
5212/**
5213 * The VBoxDevicesRegister callback function.
5214 *
5215 * PDM will invoke this function after loading a device module and letting
5216 * the module decide which devices to register and how to handle conflicts.
5217 *
5218 * @returns VBox status code.
5219 * @param pCallbacks Pointer to the callback table.
5220 * @param u32Version VBox version number.
5221 */
5222typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
5223
5224/** @} */
5225
5226RT_C_DECLS_END
5227
5228#endif
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