VirtualBox

source: vbox/trunk/include/VBox/vmm/pgm.h@ 55895

Last change on this file since 55895 was 55895, checked in by vboxsync, 10 years ago

Added pvUser to the raw-mode context virtual handler callbacks.

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1/** @file
2 * PGM - Page Monitor / Monitor.
3 */
4
5/*
6 * Copyright (C) 2006-2015 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.215389.xyz. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pgm_h
27#define ___VBox_vmm_pgm_h
28
29#include <VBox/types.h>
30#include <VBox/sup.h>
31#include <VBox/vmm/vmapi.h>
32#include <VBox/vmm/gmm.h> /* for PGMMREGISTERSHAREDMODULEREQ */
33#include <iprt/x86.h>
34#include <VBox/VMMDev.h> /* for VMMDEVSHAREDREGIONDESC */
35#include <VBox/param.h>
36
37RT_C_DECLS_BEGIN
38
39/** @defgroup grp_pgm The Page Monitor / Manager API
40 * @{
41 */
42
43/**
44 * FNPGMRELOCATE callback mode.
45 */
46typedef enum PGMRELOCATECALL
47{
48 /** The callback is for checking if the suggested address is suitable. */
49 PGMRELOCATECALL_SUGGEST = 1,
50 /** The callback is for executing the relocation. */
51 PGMRELOCATECALL_RELOCATE
52} PGMRELOCATECALL;
53
54
55/**
56 * Callback function which will be called when PGM is trying to find
57 * a new location for the mapping.
58 *
59 * The callback is called in two modes, 1) the check mode and 2) the relocate mode.
60 * In 1) the callback should say if it objects to a suggested new location. If it
61 * accepts the new location, it is called again for doing it's relocation.
62 *
63 *
64 * @returns true if the location is ok.
65 * @returns false if another location should be found.
66 * @param GCPtrOld The old virtual address.
67 * @param GCPtrNew The new virtual address.
68 * @param enmMode Used to indicate the callback mode.
69 * @param pvUser User argument.
70 * @remark The return value is no a failure indicator, it's an acceptance
71 * indicator. Relocation can not fail!
72 */
73typedef DECLCALLBACK(bool) FNPGMRELOCATE(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew, PGMRELOCATECALL enmMode, void *pvUser);
74/** Pointer to a relocation callback function. */
75typedef FNPGMRELOCATE *PFNPGMRELOCATE;
76
77
78/**
79 * Physical page access handler kind.
80 */
81typedef enum PGMPHYSHANDLERKIND
82{
83 /** MMIO range. Pages are not present, all access is done in interpreter or recompiler. */
84 PGMPHYSHANDLERKIND_MMIO = 1,
85 /** Handler all write access to a physical page range. */
86 PGMPHYSHANDLERKIND_WRITE,
87 /** Handler all access to a physical page range. */
88 PGMPHYSHANDLERKIND_ALL
89
90} PGMPHYSHANDLERKIND;
91
92/**
93 * \#PF Handler callback for physical access handler ranges in RC.
94 *
95 * @returns VBox status code (appropriate for RC return).
96 * @param pVM VM Handle.
97 * @param uErrorCode CPU Error code.
98 * @param pRegFrame Trap register frame.
99 * NULL on DMA and other non CPU access.
100 * @param pvFault The fault address (cr2).
101 * @param GCPhysFault The GC physical address corresponding to pvFault.
102 * @param pvUser User argument.
103 */
104typedef DECLCALLBACK(int) FNPGMRCPHYSHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
105/** Pointer to PGM access callback. */
106typedef FNPGMRCPHYSHANDLER *PFNPGMRCPHYSHANDLER;
107
108/**
109 * \#PF Handler callback for physical access handler ranges in R0.
110 *
111 * @returns VBox status code (appropriate for R0 return).
112 * @param pVM VM Handle.
113 * @param uErrorCode CPU Error code.
114 * @param pRegFrame Trap register frame.
115 * NULL on DMA and other non CPU access.
116 * @param pvFault The fault address (cr2).
117 * @param GCPhysFault The GC physical address corresponding to pvFault.
118 * @param pvUser User argument.
119 */
120typedef DECLCALLBACK(int) FNPGMR0PHYSHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
121/** Pointer to PGM access callback. */
122typedef FNPGMR0PHYSHANDLER *PFNPGMR0PHYSHANDLER;
123
124/**
125 * Guest Access type
126 */
127typedef enum PGMACCESSTYPE
128{
129 /** Read access. */
130 PGMACCESSTYPE_READ = 1,
131 /** Write access. */
132 PGMACCESSTYPE_WRITE
133} PGMACCESSTYPE;
134
135/**
136 * \#PF Handler callback for physical access handler ranges (MMIO among others) in HC.
137 *
138 * The handler can not raise any faults, it's mainly for monitoring write access
139 * to certain pages.
140 *
141 * @returns VINF_SUCCESS if the handler have carried out the operation.
142 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
143 * @param pVM VM Handle.
144 * @param GCPhys The physical address the guest is writing to.
145 * @param pvPhys The HC mapping of that address.
146 * @param pvBuf What the guest is reading/writing.
147 * @param cbBuf How much it's reading/writing.
148 * @param enmAccessType The access type.
149 * @param pvUser User argument.
150 *
151 * @todo Add pVCpu, possibly replacing pVM.
152 */
153typedef DECLCALLBACK(int) FNPGMR3PHYSHANDLER(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
154/** Pointer to PGM access callback. */
155typedef FNPGMR3PHYSHANDLER *PFNPGMR3PHYSHANDLER;
156
157
158/**
159 * Virtual access handler type.
160 */
161typedef enum PGMVIRTHANDLERKIND
162{
163 /** Write access handled. */
164 PGMVIRTHANDLERKIND_WRITE = 1,
165 /** All access handled. */
166 PGMVIRTHANDLERKIND_ALL,
167 /** Hypervisor write access handled.
168 * This is used to catch the guest trying to write to LDT, TSS and any other
169 * system structure which the brain dead intel guys let unprivilegde code find. */
170 PGMVIRTHANDLERKIND_HYPERVISOR
171} PGMVIRTHANDLERKIND;
172
173/**
174 * \#PF Handler callback for virtual access handler ranges, RC.
175 *
176 * Important to realize that a physical page in a range can have aliases, and
177 * for ALL and WRITE handlers these will also trigger.
178 *
179 * @returns VBox status code (appropriate for GC return).
180 * @param pVM VM Handle.
181 * @param uErrorCode CPU Error code (X86_TRAP_PF_XXX).
182 * @param pRegFrame Trap register frame.
183 * @param pvFault The fault address (cr2).
184 * @param pvRange The base address of the handled virtual range.
185 * @param offRange The offset of the access into this range.
186 * (If it's a EIP range this is the EIP, if not it's pvFault.)
187 * @param pvUser User argument.
188 * @todo Add pVCpu, possibly replacing pVM.
189 */
190typedef DECLCALLBACK(int) FNPGMRCVIRTPFHANDLER(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault,
191 RTGCPTR pvRange, uintptr_t offRange, void *pvUser);
192/** Pointer to PGM access callback. */
193typedef FNPGMRCVIRTPFHANDLER *PFNPGMRCVIRTPFHANDLER;
194
195/**
196 * \#PF Handler callback for virtual access handler ranges, R3.
197 *
198 * Important to realize that a physical page in a range can have aliases, and
199 * for ALL and WRITE handlers these will also trigger.
200 *
201 * @returns VINF_SUCCESS if the handler have carried out the operation.
202 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
203 * @param pVM VM Handle.
204 * @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
205 * @param pvPtr The HC mapping of that address.
206 * @param pvBuf What the guest is reading/writing.
207 * @param cbBuf How much it's reading/writing.
208 * @param enmAccessType The access type.
209 * @param pvUser User argument.
210 * @todo Add pVCpu, possibly replacing pVM.
211 */
212typedef DECLCALLBACK(int) FNPGMR3VIRTHANDLER(PVM pVM, RTGCPTR GCPtr, void *pvPtr, void *pvBuf, size_t cbBuf,
213 PGMACCESSTYPE enmAccessType, void *pvUser);
214/** Pointer to PGM access callback. */
215typedef FNPGMR3VIRTHANDLER *PFNPGMR3VIRTHANDLER;
216
217
218/**
219 * \#PF Handler callback for invalidation of virtual access handler ranges.
220 *
221 * @param pVM VM Handle.
222 * @param GCPtr The virtual address the guest has changed.
223 * @param pvUser User argument.
224 */
225typedef DECLCALLBACK(int) FNPGMR3VIRTINVALIDATE(PVM pVM, RTGCPTR GCPtr, void *pvUser);
226/** Pointer to PGM invalidation callback. */
227typedef FNPGMR3VIRTINVALIDATE *PFNPGMR3VIRTINVALIDATE;
228
229/**
230 * PGMR3PhysEnumDirtyFTPages callback for syncing dirty physical pages
231 *
232 * @param pVM VM Handle.
233 * @param GCPhys GC physical address
234 * @param pRange HC virtual address of the page(s)
235 * @param cbRange Size of the dirty range in bytes.
236 * @param pvUser User argument.
237 */
238typedef DECLCALLBACK(int) FNPGMENUMDIRTYFTPAGES(PVM pVM, RTGCPHYS GCPhys, uint8_t *pRange, unsigned cbRange, void *pvUser);
239/** Pointer to PGMR3PhysEnumDirtyFTPages callback. */
240typedef FNPGMENUMDIRTYFTPAGES *PFNPGMENUMDIRTYFTPAGES;
241
242/**
243 * Paging mode.
244 */
245typedef enum PGMMODE
246{
247 /** The usual invalid value. */
248 PGMMODE_INVALID = 0,
249 /** Real mode. */
250 PGMMODE_REAL,
251 /** Protected mode, no paging. */
252 PGMMODE_PROTECTED,
253 /** 32-bit paging. */
254 PGMMODE_32_BIT,
255 /** PAE paging. */
256 PGMMODE_PAE,
257 /** PAE paging with NX enabled. */
258 PGMMODE_PAE_NX,
259 /** 64-bit AMD paging (long mode). */
260 PGMMODE_AMD64,
261 /** 64-bit AMD paging (long mode) with NX enabled. */
262 PGMMODE_AMD64_NX,
263 /** Nested paging mode (shadow only; guest physical to host physical). */
264 PGMMODE_NESTED,
265 /** Extended paging (Intel) mode. */
266 PGMMODE_EPT,
267 /** The max number of modes */
268 PGMMODE_MAX,
269 /** 32bit hackishness. */
270 PGMMODE_32BIT_HACK = 0x7fffffff
271} PGMMODE;
272
273/** Macro for checking if the guest is using paging.
274 * @param enmMode PGMMODE_*.
275 * @remark ASSUMES certain order of the PGMMODE_* values.
276 */
277#define PGMMODE_WITH_PAGING(enmMode) ((enmMode) >= PGMMODE_32_BIT)
278
279/** Macro for checking if it's one of the long mode modes.
280 * @param enmMode PGMMODE_*.
281 */
282#define PGMMODE_IS_LONG_MODE(enmMode) ((enmMode) == PGMMODE_AMD64_NX || (enmMode) == PGMMODE_AMD64)
283
284/**
285 * Is the ROM mapped (true) or is the shadow RAM mapped (false).
286 *
287 * @returns boolean.
288 * @param enmProt The PGMROMPROT value, must be valid.
289 */
290#define PGMROMPROT_IS_ROM(enmProt) \
291 ( (enmProt) == PGMROMPROT_READ_ROM_WRITE_IGNORE \
292 || (enmProt) == PGMROMPROT_READ_ROM_WRITE_RAM )
293
294
295
296VMMDECL(bool) PGMIsLockOwner(PVM pVM);
297
298VMMDECL(int) PGMRegisterStringFormatTypes(void);
299VMMDECL(void) PGMDeregisterStringFormatTypes(void);
300VMMDECL(RTHCPHYS) PGMGetHyperCR3(PVMCPU pVCpu);
301VMMDECL(RTHCPHYS) PGMGetNestedCR3(PVMCPU pVCpu, PGMMODE enmShadowMode);
302VMMDECL(RTHCPHYS) PGMGetInterHCCR3(PVM pVM);
303VMMDECL(RTHCPHYS) PGMGetInterRCCR3(PVM pVM, PVMCPU pVCpu);
304VMMDECL(RTHCPHYS) PGMGetInter32BitCR3(PVM pVM);
305VMMDECL(RTHCPHYS) PGMGetInterPaeCR3(PVM pVM);
306VMMDECL(RTHCPHYS) PGMGetInterAmd64CR3(PVM pVM);
307VMMDECL(int) PGMTrap0eHandler(PVMCPU pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
308VMMDECL(int) PGMPrefetchPage(PVMCPU pVCpu, RTGCPTR GCPtrPage);
309VMMDECL(int) PGMVerifyAccess(PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
310VMMDECL(int) PGMIsValidAccess(PVMCPU pVCpu, RTGCPTR Addr, uint32_t cbSize, uint32_t fAccess);
311VMMDECL(VBOXSTRICTRC) PGMInterpretInstruction(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault);
312VMMDECL(int) PGMMap(PVM pVM, RTGCPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags);
313VMMDECL(int) PGMMapGetPage(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
314VMMDECL(int) PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags);
315VMMDECL(int) PGMMapModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
316#ifndef IN_RING0
317VMMDECL(bool) PGMMapHasConflicts(PVM pVM);
318#endif
319#ifdef VBOX_STRICT
320VMMDECL(void) PGMMapCheck(PVM pVM);
321#endif
322VMMDECL(int) PGMShwGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
323VMMDECL(int) PGMShwMakePageReadonly(PVMCPU pVCpu, RTGCPTR GCPtr, uint32_t fFlags);
324VMMDECL(int) PGMShwMakePageWritable(PVMCPU pVCpu, RTGCPTR GCPtr, uint32_t fFlags);
325VMMDECL(int) PGMShwMakePageNotPresent(PVMCPU pVCpu, RTGCPTR GCPtr, uint32_t fFlags);
326/** @name Flags for PGMShwMakePageReadonly, PGMShwMakePageWritable and
327 * PGMShwMakePageNotPresent
328 * @{ */
329/** The call is from an access handler for dealing with the a faulting write
330 * operation. The virtual address is within the same page. */
331#define PGM_MK_PG_IS_WRITE_FAULT RT_BIT(0)
332/** The page is an MMIO2. */
333#define PGM_MK_PG_IS_MMIO2 RT_BIT(1)
334/** @}*/
335VMMDECL(int) PGMGstGetPage(PVMCPU pVCpu, RTGCPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
336VMMDECL(bool) PGMGstIsPagePresent(PVMCPU pVCpu, RTGCPTR GCPtr);
337VMMDECL(int) PGMGstSetPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags);
338VMMDECL(int) PGMGstModifyPage(PVMCPU pVCpu, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
339VMM_INT_DECL(int) PGMGstGetPaePdpes(PVMCPU pVCpu, PX86PDPE paPdpes);
340VMM_INT_DECL(void) PGMGstUpdatePaePdpes(PVMCPU pVCpu, PCX86PDPE paPdpes);
341
342VMMDECL(int) PGMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCPtrPage);
343VMMDECL(int) PGMFlushTLB(PVMCPU pVCpu, uint64_t cr3, bool fGlobal);
344VMMDECL(int) PGMSyncCR3(PVMCPU pVCpu, uint64_t cr0, uint64_t cr3, uint64_t cr4, bool fGlobal);
345VMMDECL(int) PGMUpdateCR3(PVMCPU pVCpu, uint64_t cr3);
346VMMDECL(int) PGMChangeMode(PVMCPU pVCpu, uint64_t cr0, uint64_t cr4, uint64_t efer);
347VMMDECL(void) PGMCr0WpEnabled(PVMCPU pVCpu);
348VMMDECL(PGMMODE) PGMGetGuestMode(PVMCPU pVCpu);
349VMMDECL(PGMMODE) PGMGetShadowMode(PVMCPU pVCpu);
350VMMDECL(PGMMODE) PGMGetHostMode(PVM pVM);
351VMMDECL(const char *) PGMGetModeName(PGMMODE enmMode);
352VMM_INT_DECL(void) PGMNotifyNxeChanged(PVMCPU pVCpu, bool fNxe);
353VMMDECL(bool) PGMHasDirtyPages(PVM pVM);
354
355/** PGM physical access handler type registration handle (heap offset, valid
356 * cross contexts without needing fixing up). Callbacks and handler type is
357 * associated with this and it is shared by all handler registrations. */
358typedef uint32_t PGMPHYSHANDLERTYPE;
359/** Pointer to a PGM physical handler type registration handle. */
360typedef PGMPHYSHANDLERTYPE *PPGMPHYSHANDLERTYPE;
361/** NIL value for PGM physical access handler type handle. */
362#define NIL_PGMPHYSHANDLERTYPE UINT32_MAX
363VMMDECL(uint32_t) PGMHandlerPhysicalTypeRelease(PVM pVM, PGMPHYSHANDLERTYPE hType);
364VMMDECL(uint32_t) PGMHandlerPhysicalTypeRetain(PVM pVM, PGMPHYSHANDLERTYPE hType);
365
366VMMDECL(int) PGMHandlerPhysicalRegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, PGMPHYSHANDLERTYPE hType,
367 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC,
368 R3PTRTYPE(const char *) pszDesc);
369VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast);
370VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys);
371VMMDECL(int) PGMHandlerPhysicalChangeUserArgs(PVM pVM, RTGCPHYS GCPhys, RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC);
372VMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit);
373VMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2);
374VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage);
375VMMDECL(int) PGMHandlerPhysicalPageAlias(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap);
376VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap);
377VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys);
378VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys);
379
380/** PGM virtual access handler type registration handle (heap offset, valid
381 * cross contexts without needing fixing up). Callbacks and handler type is
382 * associated with this and it is shared by all handler registrations. */
383typedef uint32_t PGMVIRTHANDLERTYPE;
384/** Pointer to a PGM virtual handler type registration handle. */
385typedef PGMVIRTHANDLERTYPE *PPGMVIRTHANDLERTYPE;
386/** NIL value for PGM virtual access handler type handle. */
387#define NIL_PGMVIRTHANDLERTYPE UINT32_MAX
388VMM_INT_DECL(uint32_t) PGMHandlerVirtualTypeRelease(PVM pVM, PGMVIRTHANDLERTYPE hType);
389VMM_INT_DECL(uint32_t) PGMHandlerVirtualTypeRetain(PVM pVM, PGMVIRTHANDLERTYPE hType);
390VMM_INT_DECL(bool) PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr);
391
392VMMDECL(bool) PGMPhysIsA20Enabled(PVMCPU pVCpu);
393VMMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys);
394VMMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys);
395VMMDECL(int) PGMPhysGCPtr2GCPhys(PVMCPU pVCpu, RTGCPTR GCPtr, PRTGCPHYS pGCPhys);
396VMMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock);
397VMMDECL(int) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
398VMMDECL(int) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
399VMMDECL(int) PGMPhysSimpleReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb);
400VMMDECL(int) PGMPhysSimpleWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb);
401VMMDECL(int) PGMPhysSimpleReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
402VMMDECL(int) PGMPhysSimpleWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
403VMMDECL(int) PGMPhysReadGCPtr(PVMCPU pVCpu, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
404VMMDECL(int) PGMPhysWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
405VMMDECL(int) PGMPhysSimpleDirtyWriteGCPtr(PVMCPU pVCpu, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb);
406VMMDECL(int) PGMPhysInterpretedRead(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
407VMMDECL(int) PGMPhysInterpretedReadNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb, bool fRaiseTrap);
408VMMDECL(int) PGMPhysInterpretedWriteNoHandlers(PVMCPU pVCpu, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, void const *pvSrc, size_t cb, bool fRaiseTrap);
409VMM_INT_DECL(int) PGMPhysIemGCPhys2Ptr(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, bool fWritable, bool fByPassHandlers, void **ppv, PPGMPAGEMAPLOCK pLock);
410VMM_INT_DECL(int) PGMPhysIemQueryAccess(PVM pVM, RTGCPHYS GCPhys, bool fWritable, bool fByPassHandlers);
411
412#ifdef VBOX_STRICT
413VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM);
414VMMDECL(unsigned) PGMAssertNoMappingConflicts(PVM pVM);
415VMMDECL(unsigned) PGMAssertCR3(PVM pVM, PVMCPU pVCpu, uint64_t cr3, uint64_t cr4);
416#endif /* VBOX_STRICT */
417
418#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE)
419VMMDECL(void) PGMRZDynMapStartAutoSet(PVMCPU pVCpu);
420VMMDECL(void) PGMRZDynMapReleaseAutoSet(PVMCPU pVCpu);
421VMMDECL(void) PGMRZDynMapFlushAutoSet(PVMCPU pVCpu);
422VMMDECL(uint32_t) PGMRZDynMapPushAutoSubset(PVMCPU pVCpu);
423VMMDECL(void) PGMRZDynMapPopAutoSubset(PVMCPU pVCpu, uint32_t iPrevSubset);
424#endif
425
426VMMDECL(int) PGMSetLargePageUsage(PVM pVM, bool fUseLargePages);
427
428/**
429 * Query large page usage state
430 *
431 * @returns 0 - disabled, 1 - enabled
432 * @param pVM The VM to operate on.
433 */
434#define PGMIsUsingLargePages(pVM) ((pVM)->fUseLargePages)
435
436
437#ifdef IN_RC
438/** @defgroup grp_pgm_gc The PGM Guest Context API
439 * @{
440 */
441VMMRCDECL(int) PGMRCDynMapInit(PVM pVM);
442/** @} */
443#endif /* IN_RC */
444
445
446#ifdef IN_RING0
447/** @defgroup grp_pgm_r0 The PGM Host Context Ring-0 API
448 * @{
449 */
450VMMR0_INT_DECL(int) PGMR0PhysAllocateHandyPages(PVM pVM, PVMCPU pVCpu);
451VMMR0_INT_DECL(int) PGMR0PhysFlushHandyPages(PVM pVM, PVMCPU pVCpu);
452VMMR0_INT_DECL(int) PGMR0PhysAllocateLargeHandyPage(PVM pVM, PVMCPU pVCpu);
453VMMR0_INT_DECL(int) PGMR0PhysSetupIommu(PVM pVM);
454VMMR0DECL(int) PGMR0SharedModuleCheck(PVM pVM, PGVM pGVM, VMCPUID idCpu, PGMMSHAREDMODULE pModule, PCRTGCPTR64 paRegionsGCPtrs);
455VMMR0DECL(int) PGMR0Trap0eHandlerNestedPaging(PVM pVM, PVMCPU pVCpu, PGMMODE enmShwPagingMode, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPHYS pvFault);
456VMMR0DECL(VBOXSTRICTRC) PGMR0Trap0eHandlerNPMisconfig(PVM pVM, PVMCPU pVCpu, PGMMODE enmShwPagingMode, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault, uint32_t uErr);
457# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
458VMMR0DECL(int) PGMR0DynMapInit(void);
459VMMR0DECL(void) PGMR0DynMapTerm(void);
460VMMR0DECL(int) PGMR0DynMapInitVM(PVM pVM);
461VMMR0DECL(void) PGMR0DynMapTermVM(PVM pVM);
462VMMR0DECL(int) PGMR0DynMapAssertIntegrity(void);
463VMMR0DECL(bool) PGMR0DynMapStartOrMigrateAutoSet(PVMCPU pVCpu);
464VMMR0DECL(void) PGMR0DynMapMigrateAutoSet(PVMCPU pVCpu);
465# endif
466/** @} */
467#endif /* IN_RING0 */
468
469
470
471#ifdef IN_RING3
472/** @defgroup grp_pgm_r3 The PGM Host Context Ring-3 API
473 * @{
474 */
475VMMR3DECL(int) PGMR3Init(PVM pVM);
476VMMR3DECL(int) PGMR3InitDynMap(PVM pVM);
477VMMR3DECL(int) PGMR3InitFinalize(PVM pVM);
478VMMR3_INT_DECL(int) PGMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
479VMMR3DECL(void) PGMR3Relocate(PVM pVM, RTGCINTPTR offDelta);
480VMMR3DECL(void) PGMR3ResetCpu(PVM pVM, PVMCPU pVCpu);
481VMMR3_INT_DECL(void) PGMR3Reset(PVM pVM);
482VMMR3_INT_DECL(void) PGMR3MemSetup(PVM pVM, bool fReset);
483VMMR3DECL(int) PGMR3Term(PVM pVM);
484VMMR3DECL(int) PGMR3LockCall(PVM pVM);
485VMMR3DECL(int) PGMR3ChangeMode(PVM pVM, PVMCPU pVCpu, PGMMODE enmGuestMode);
486
487VMMR3DECL(int) PGMR3PhysRegisterRam(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, const char *pszDesc);
488VMMR3DECL(int) PGMR3PhysChangeMemBalloon(PVM pVM, bool fInflate, unsigned cPages, RTGCPHYS *paPhysPage);
489VMMR3DECL(int) PGMR3PhysWriteProtectRAM(PVM pVM);
490VMMR3DECL(int) PGMR3PhysEnumDirtyFTPages(PVM pVM, PFNPGMENUMDIRTYFTPAGES pfnEnum, void *pvUser);
491VMMR3DECL(uint32_t) PGMR3PhysGetRamRangeCount(PVM pVM);
492VMMR3DECL(int) PGMR3PhysGetRange(PVM pVM, uint32_t iRange, PRTGCPHYS pGCPhysStart, PRTGCPHYS pGCPhysLast,
493 const char **ppszDesc, bool *pfIsMmio);
494VMMR3DECL(int) PGMR3QueryMemoryStats(PUVM pUVM, uint64_t *pcbTotalMem, uint64_t *pcbPrivateMem, uint64_t *pcbSharedMem, uint64_t *pcbZeroMem);
495VMMR3DECL(int) PGMR3QueryGlobalMemoryStats(PUVM pUVM, uint64_t *pcbAllocMem, uint64_t *pcbFreeMem, uint64_t *pcbBallonedMem, uint64_t *pcbSharedMem);
496
497VMMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMPHYSHANDLERTYPE hType,
498 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, const char *pszDesc);
499VMMR3DECL(int) PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb);
500VMMR3DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc);
501VMMR3DECL(int) PGMR3PhysMMIO2Deregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion);
502VMMR3DECL(int) PGMR3PhysMMIO2Map(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys);
503VMMR3DECL(int) PGMR3PhysMMIO2Unmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys);
504VMMR3DECL(bool) PGMR3PhysMMIO2IsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys);
505VMMR3DECL(int) PGMR3PhysMMIO2GetHCPhys(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, PRTHCPHYS pHCPhys);
506VMMR3DECL(int) PGMR3PhysMMIO2MapKernel(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr);
507
508/** @name PGMR3PhysRegisterRom flags.
509 * @{ */
510/** Inidicates that ROM shadowing should be enabled. */
511#define PGMPHYS_ROM_FLAGS_SHADOWED RT_BIT_32(0)
512/** Indicates that what pvBinary points to won't go away
513 * and can be used for strictness checks. */
514#define PGMPHYS_ROM_FLAGS_PERMANENT_BINARY RT_BIT_32(1)
515/** @} */
516
517VMMR3DECL(int) PGMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS cb,
518 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc);
519VMMR3DECL(int) PGMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMROMPROT enmProt);
520VMMR3DECL(int) PGMR3PhysRegister(PVM pVM, void *pvRam, RTGCPHYS GCPhys, size_t cb, unsigned fFlags, const SUPPAGE *paPages, const char *pszDesc);
521VMMDECL(void) PGMR3PhysSetA20(PVMCPU pVCpu, bool fEnable);
522/** @name PGMR3MapPT flags.
523 * @{ */
524/** The mapping may be unmapped later. The default is permanent mappings. */
525#define PGMR3MAPPT_FLAGS_UNMAPPABLE RT_BIT(0)
526/** @} */
527VMMR3DECL(int) PGMR3MapPT(PVM pVM, RTGCPTR GCPtr, uint32_t cb, uint32_t fFlags, PFNPGMRELOCATE pfnRelocate, void *pvUser, const char *pszDesc);
528VMMR3DECL(int) PGMR3UnmapPT(PVM pVM, RTGCPTR GCPtr);
529VMMR3DECL(int) PGMR3FinalizeMappings(PVM pVM);
530VMMR3DECL(int) PGMR3MappingsSize(PVM pVM, uint32_t *pcb);
531VMMR3DECL(int) PGMR3MappingsFix(PVM pVM, RTGCPTR GCPtrBase, uint32_t cb);
532VMMR3DECL(int) PGMR3MappingsUnfix(PVM pVM);
533VMMR3DECL(bool) PGMR3MappingsNeedReFixing(PVM pVM);
534#if defined(VBOX_WITH_RAW_MODE) || (HC_ARCH_BITS != 64 && !defined(VBOX_WITH_HYBRID_32BIT_KERNEL))
535VMMR3DECL(int) PGMR3MapIntermediate(PVM pVM, RTUINTPTR Addr, RTHCPHYS HCPhys, unsigned cbPages);
536#endif
537VMMR3DECL(int) PGMR3MapRead(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb);
538
539VMMR3_INT_DECL(int) PGMR3HandlerPhysicalTypeRegisterEx(PVM pVM, PGMPHYSHANDLERKIND enmKind,
540 PFNPGMR3PHYSHANDLER pfnHandlerR3,
541 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0,
542 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC,
543 const char *pszDesc, PPGMPHYSHANDLERTYPE phType);
544VMMR3DECL(int) PGMR3HandlerPhysicalTypeRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind,
545 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3,
546 const char *pszModR0, const char *pszHandlerR0,
547 const char *pszModRC, const char *pszHandlerRC, const char *pszDesc,
548 PPGMPHYSHANDLERTYPE phType);
549VMMR3_INT_DECL(int) PGMR3HandlerVirtualTypeRegisterEx(PVM pVM, PGMVIRTHANDLERKIND enmKind, bool fRelocUserRC,
550 PFNPGMR3VIRTINVALIDATE pfnInvalidateR3,
551 PFNPGMR3VIRTHANDLER pfnHandlerR3,
552 RCPTRTYPE(FNPGMRCVIRTPFHANDLER) pfnPfHandlerRC,
553 const char *pszDesc, PPGMVIRTHANDLERTYPE phType);
554VMMR3_INT_DECL(int) PGMR3HandlerVirtualTypeRegister(PVM pVM, PGMVIRTHANDLERKIND enmKind, bool fRelocUserRC,
555 PFNPGMR3VIRTINVALIDATE pfnInvalidateR3,
556 PFNPGMR3VIRTHANDLER pfnHandlerR3,
557 const char *pszPfHandlerRC, const char *pszModRC, const char *pszDesc,
558 PPGMVIRTHANDLERTYPE phType);
559VMMR3_INT_DECL(int) PGMR3HandlerVirtualRegister(PVM pVM, PVMCPU pVCpu, PGMVIRTHANDLERTYPE hType, RTGCPTR GCPtr,
560 RTGCPTR GCPtrLast, void *pvUserR3, RTRCPTR pvUserRC, const char *pszDesc);
561VMMR3_INT_DECL(int) PGMHandlerVirtualChangeType(PVM pVM, RTGCPTR GCPtr, PGMVIRTHANDLERTYPE hNewType);
562VMMR3_INT_DECL(int) PGMHandlerVirtualDeregister(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, bool fHypervisor);
563VMMR3DECL(int) PGMR3PoolGrow(PVM pVM);
564
565VMMR3DECL(int) PGMR3PhysTlbGCPhys2Ptr(PVM pVM, RTGCPHYS GCPhys, bool fWritable, void **ppv);
566VMMR3DECL(uint8_t) PGMR3PhysReadU8(PVM pVM, RTGCPHYS GCPhys);
567VMMR3DECL(uint16_t) PGMR3PhysReadU16(PVM pVM, RTGCPHYS GCPhys);
568VMMR3DECL(uint32_t) PGMR3PhysReadU32(PVM pVM, RTGCPHYS GCPhys);
569VMMR3DECL(uint64_t) PGMR3PhysReadU64(PVM pVM, RTGCPHYS GCPhys);
570VMMR3DECL(void) PGMR3PhysWriteU8(PVM pVM, RTGCPHYS GCPhys, uint8_t Value);
571VMMR3DECL(void) PGMR3PhysWriteU16(PVM pVM, RTGCPHYS GCPhys, uint16_t Value);
572VMMR3DECL(void) PGMR3PhysWriteU32(PVM pVM, RTGCPHYS GCPhys, uint32_t Value);
573VMMR3DECL(void) PGMR3PhysWriteU64(PVM pVM, RTGCPHYS GCPhys, uint64_t Value);
574VMMR3DECL(int) PGMR3PhysReadExternal(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
575VMMR3DECL(int) PGMR3PhysWriteExternal(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, const char *pszWho);
576VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrExternal(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock);
577VMMR3DECL(int) PGMR3PhysGCPhys2CCPtrReadOnlyExternal(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock);
578VMMR3DECL(int) PGMR3PhysChunkMap(PVM pVM, uint32_t idChunk);
579VMMR3DECL(void) PGMR3PhysChunkInvalidateTLB(PVM pVM);
580VMMR3DECL(int) PGMR3PhysAllocateHandyPages(PVM pVM);
581VMMR3DECL(int) PGMR3PhysAllocateLargeHandyPage(PVM pVM, RTGCPHYS GCPhys);
582
583VMMR3DECL(int) PGMR3CheckIntegrity(PVM pVM);
584
585VMMR3DECL(int) PGMR3DbgR3Ptr2GCPhys(PUVM pUVM, RTR3PTR R3Ptr, PRTGCPHYS pGCPhys);
586VMMR3DECL(int) PGMR3DbgR3Ptr2HCPhys(PUVM pUVM, RTR3PTR R3Ptr, PRTHCPHYS pHCPhys);
587VMMR3DECL(int) PGMR3DbgHCPhys2GCPhys(PUVM pUVM, RTHCPHYS HCPhys, PRTGCPHYS pGCPhys);
588VMMR3_INT_DECL(int) PGMR3DbgReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb, uint32_t fFlags, size_t *pcbRead);
589VMMR3_INT_DECL(int) PGMR3DbgWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb, uint32_t fFlags, size_t *pcbWritten);
590VMMR3_INT_DECL(int) PGMR3DbgReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb, uint32_t fFlags, size_t *pcbRead);
591VMMR3_INT_DECL(int) PGMR3DbgWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, void const *pvSrc, size_t cb, uint32_t fFlags, size_t *pcbWritten);
592VMMR3_INT_DECL(int) PGMR3DbgScanPhysical(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cbRange, RTGCPHYS GCPhysAlign, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCPHYS pGCPhysHit);
593VMMR3_INT_DECL(int) PGMR3DbgScanVirtual(PVM pVM, PVMCPU pVCpu, RTGCPTR GCPtr, RTGCPTR cbRange, RTGCPTR GCPtrAlign, const uint8_t *pabNeedle, size_t cbNeedle, PRTGCUINTPTR pGCPhysHit);
594VMMR3_INT_DECL(int) PGMR3DumpHierarchyShw(PVM pVM, uint64_t cr3, uint32_t fFlags, uint64_t u64FirstAddr, uint64_t u64LastAddr, uint32_t cMaxDepth, PCDBGFINFOHLP pHlp);
595VMMR3_INT_DECL(int) PGMR3DumpHierarchyGst(PVM pVM, uint64_t cr3, uint32_t fFlags, RTGCPTR FirstAddr, RTGCPTR LastAddr, uint32_t cMaxDepth, PCDBGFINFOHLP pHlp);
596
597
598/** @name Page sharing
599 * @{ */
600VMMR3DECL(int) PGMR3SharedModuleRegister(PVM pVM, VBOXOSFAMILY enmGuestOS, char *pszModuleName, char *pszVersion,
601 RTGCPTR GCBaseAddr, uint32_t cbModule,
602 uint32_t cRegions, VMMDEVSHAREDREGIONDESC const *paRegions);
603VMMR3DECL(int) PGMR3SharedModuleUnregister(PVM pVM, char *pszModuleName, char *pszVersion,
604 RTGCPTR GCBaseAddr, uint32_t cbModule);
605VMMR3DECL(int) PGMR3SharedModuleCheckAll(PVM pVM);
606VMMR3DECL(int) PGMR3SharedModuleGetPageState(PVM pVM, RTGCPTR GCPtrPage, bool *pfShared, uint64_t *pfPageFlags);
607/** @} */
608
609/** @} */
610#endif /* IN_RING3 */
611
612RT_C_DECLS_END
613
614/** @} */
615#endif
616
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