VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevMiscHlp.cpp@ 19437

Last change on this file since 19437 was 19437, checked in by vboxsync, 16 years ago

SMP: send SIPI notification from APIC, let VM handle what really do
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1/* $Id: PDMDevMiscHlp.cpp 19437 2009-05-06 14:34:05Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Misc. Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.215389.xyz. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/rem.h>
30#include <VBox/vm.h>
31#include <VBox/vmm.h>
32
33#include <VBox/log.h>
34#include <VBox/err.h>
35#include <iprt/asm.h>
36#include <iprt/assert.h>
37#include <iprt/thread.h>
38
39
40
41/** @name HC PIC Helpers
42 * @{
43 */
44
45/** @copydoc PDMPICHLPR3::pfnSetInterruptFF */
46static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
47{
48 PDMDEV_ASSERT_DEVINS(pDevIns);
49 PVM pVM = pDevIns->Internal.s.pVMR3;
50 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
51
52 LogFlow(("pdmR3PicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
53 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
54
55 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
56 REMR3NotifyInterruptSet(pVM, pVCpu);
57 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM);
58}
59
60
61/** @copydoc PDMPICHLPR3::pfnClearInterruptFF */
62static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
63{
64 PDMDEV_ASSERT_DEVINS(pDevIns);
65 PVM pVM = pDevIns->Internal.s.pVMR3;
66 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
67
68 LogFlow(("pdmR3PicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
69 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
70
71 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
72 REMR3NotifyInterruptClear(pVM, pVCpu);
73}
74
75
76/** @copydoc PDMPICHLPR3::pfnLock */
77static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
78{
79 PDMDEV_ASSERT_DEVINS(pDevIns);
80 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
81}
82
83
84/** @copydoc PDMPICHLPR3::pfnUnlock */
85static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns)
86{
87 PDMDEV_ASSERT_DEVINS(pDevIns);
88 pdmUnlock(pDevIns->Internal.s.pVMR3);
89}
90
91
92/** @copydoc PDMPICHLPR3::pfnGetRCHelpers */
93static DECLCALLBACK(PCPDMPICHLPRC) pdmR3PicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
94{
95 PDMDEV_ASSERT_DEVINS(pDevIns);
96 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
97 RTRCPTR pRCHelpers = 0;
98 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCPicHlp", &pRCHelpers);
99 AssertReleaseRC(rc);
100 AssertRelease(pRCHelpers);
101 LogFlow(("pdmR3PicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
102 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
103 return pRCHelpers;
104}
105
106
107/** @copydoc PDMPICHLPR3::pfnGetR0Helpers */
108static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
109{
110 PDMDEV_ASSERT_DEVINS(pDevIns);
111 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
112 PCPDMPICHLPR0 pR0Helpers = 0;
113 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0PicHlp", &pR0Helpers);
114 AssertReleaseRC(rc);
115 AssertRelease(pR0Helpers);
116 LogFlow(("pdmR3PicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
117 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
118 return pR0Helpers;
119}
120
121
122/**
123 * PIC Device Helpers.
124 */
125const PDMPICHLPR3 g_pdmR3DevPicHlp =
126{
127 PDM_PICHLPR3_VERSION,
128 pdmR3PicHlp_SetInterruptFF,
129 pdmR3PicHlp_ClearInterruptFF,
130 pdmR3PicHlp_Lock,
131 pdmR3PicHlp_Unlock,
132 pdmR3PicHlp_GetRCHelpers,
133 pdmR3PicHlp_GetR0Helpers,
134 PDM_PICHLPR3_VERSION /* the end */
135};
136
137/** @} */
138
139
140
141
142/** @name HC APIC Helpers
143 * @{
144 */
145
146/** @copydoc PDMAPICHLPR3::pfnSetInterruptFF */
147static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, VMCPUID idCpu)
148{
149 PDMDEV_ASSERT_DEVINS(pDevIns);
150 PVM pVM = pDevIns->Internal.s.pVMR3;
151 PVMCPU pVCpu = &pVM->aCpus[idCpu];
152
153 AssertReturnVoid(idCpu < pVM->cCPUs);
154
155 LogFlow(("pdmR3ApicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT(%d) %d -> 1\n",
156 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, idCpu, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
157
158 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);
159 REMR3NotifyInterruptSet(pVM, pVCpu);
160 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM);
161}
162
163
164/** @copydoc PDMAPICHLPR3::pfnClearInterruptFF */
165static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, VMCPUID idCpu)
166{
167 PDMDEV_ASSERT_DEVINS(pDevIns);
168 PVM pVM = pDevIns->Internal.s.pVMR3;
169 PVMCPU pVCpu = &pVM->aCpus[idCpu];
170
171 AssertReturnVoid(idCpu < pVM->cCPUs);
172
173 LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT(%d) %d -> 0\n",
174 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, idCpu, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
175
176 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC);
177 REMR3NotifyInterruptClear(pVM, pVCpu);
178}
179
180
181/** @copydoc PDMAPICHLPR3::pfnChangeFeature */
182static DECLCALLBACK(void) pdmR3ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion)
183{
184 PDMDEV_ASSERT_DEVINS(pDevIns);
185 LogFlow(("pdmR3ApicHlp_ChangeFeature: caller='%s'/%d: version=%d\n",
186 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, (int)enmVersion));
187 switch (enmVersion)
188 {
189 case PDMAPICVERSION_NONE:
190 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
191 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
192 break;
193 case PDMAPICVERSION_APIC:
194 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
195 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
196 break;
197 case PDMAPICVERSION_X2APIC:
198 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
199 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
200 break;
201 default:
202 AssertMsgFailed(("Unknown APIC version: %d\n", (int)enmVersion));
203 }
204}
205
206/** @copydoc PDMAPICHLPR3::pfnLock */
207static DECLCALLBACK(int) pdmR3ApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
208{
209 PDMDEV_ASSERT_DEVINS(pDevIns);
210 LogFlow(("pdmR3ApicHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
211 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
212}
213
214
215/** @copydoc PDMAPICHLPR3::pfnUnlock */
216static DECLCALLBACK(void) pdmR3ApicHlp_Unlock(PPDMDEVINS pDevIns)
217{
218 PDMDEV_ASSERT_DEVINS(pDevIns);
219 LogFlow(("pdmR3ApicHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
220 pdmUnlock(pDevIns->Internal.s.pVMR3);
221}
222
223
224/** @copydoc PDMAPICHLPR3::pfnGetCpuId */
225static DECLCALLBACK(VMCPUID) pdmR3ApicHlp_GetCpuId(PPDMDEVINS pDevIns)
226{
227 PDMDEV_ASSERT_DEVINS(pDevIns);
228 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
229 return VMMGetCpuId(pDevIns->Internal.s.pVMR3);
230}
231
232/** @copydoc PDMAPICHLPR3::pfnSendSipi */
233static DECLCALLBACK(void) pdmR3ApicHlp_SendSipi(PPDMDEVINS pDevIns, VMCPUID idCpu, int iVector)
234{
235 PDMDEV_ASSERT_DEVINS(pDevIns);
236 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
237
238 PVM pVM = pDevIns->Internal.s.pVMR3;
239 PVMCPU pCpu = VMMGetCpuById(pVM, idCpu);
240 CPUMSetGuestCS(pCpu, iVector * 0x100);
241 CPUMSetGuestEIP(pCpu, 0);
242 /** @todo: how do I unhalt VCPU? */
243}
244
245/** @copydoc PDMAPICHLPR3::pfnGetRCHelpers */
246static DECLCALLBACK(PCPDMAPICHLPRC) pdmR3ApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
247{
248 PDMDEV_ASSERT_DEVINS(pDevIns);
249 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
250 RTRCPTR pRCHelpers = 0;
251 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCApicHlp", &pRCHelpers);
252 AssertReleaseRC(rc);
253 AssertRelease(pRCHelpers);
254 LogFlow(("pdmR3ApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
255 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
256 return pRCHelpers;
257}
258
259
260/** @copydoc PDMAPICHLPR3::pfnGetR0Helpers */
261static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
262{
263 PDMDEV_ASSERT_DEVINS(pDevIns);
264 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
265 PCPDMAPICHLPR0 pR0Helpers = 0;
266 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0ApicHlp", &pR0Helpers);
267 AssertReleaseRC(rc);
268 AssertRelease(pR0Helpers);
269 LogFlow(("pdmR3ApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
270 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
271 return pR0Helpers;
272}
273
274
275/**
276 * APIC Device Helpers.
277 */
278const PDMAPICHLPR3 g_pdmR3DevApicHlp =
279{
280 PDM_APICHLPR3_VERSION,
281 pdmR3ApicHlp_SetInterruptFF,
282 pdmR3ApicHlp_ClearInterruptFF,
283 pdmR3ApicHlp_ChangeFeature,
284 pdmR3ApicHlp_Lock,
285 pdmR3ApicHlp_Unlock,
286 pdmR3ApicHlp_GetCpuId,
287 pdmR3ApicHlp_SendSipi,
288 pdmR3ApicHlp_GetRCHelpers,
289 pdmR3ApicHlp_GetR0Helpers,
290 PDM_APICHLPR3_VERSION /* the end */
291};
292
293/** @} */
294
295
296
297
298/** @name HC I/O APIC Helpers
299 * @{
300 */
301
302/** @copydoc PDMIOAPICHLPR3::pfnApicBusDeliver */
303static DECLCALLBACK(void) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
304 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode)
305{
306 PDMDEV_ASSERT_DEVINS(pDevIns);
307 PVM pVM = pDevIns->Internal.s.pVMR3;
308 LogFlow(("pdmR3IoApicHlp_ApicBusDeliver: caller='%s'/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
309 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
310 if (pVM->pdm.s.Apic.pfnBusDeliverR3)
311 pVM->pdm.s.Apic.pfnBusDeliverR3(pVM->pdm.s.Apic.pDevInsR3, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);
312}
313
314
315/** @copydoc PDMIOAPICHLPR3::pfnLock */
316static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
317{
318 PDMDEV_ASSERT_DEVINS(pDevIns);
319 LogFlow(("pdmR3IoApicHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
320 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
321}
322
323
324/** @copydoc PDMIOAPICHLPR3::pfnUnlock */
325static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns)
326{
327 PDMDEV_ASSERT_DEVINS(pDevIns);
328 LogFlow(("pdmR3IoApicHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
329 pdmUnlock(pDevIns->Internal.s.pVMR3);
330}
331
332
333/** @copydoc PDMIOAPICHLPR3::pfnGetRCHelpers */
334static DECLCALLBACK(PCPDMIOAPICHLPRC) pdmR3IoApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
335{
336 PDMDEV_ASSERT_DEVINS(pDevIns);
337 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
338 RTRCPTR pRCHelpers = 0;
339 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCIoApicHlp", &pRCHelpers);
340 AssertReleaseRC(rc);
341 AssertRelease(pRCHelpers);
342 LogFlow(("pdmR3IoApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
343 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
344 return pRCHelpers;
345}
346
347
348/** @copydoc PDMIOAPICHLPR3::pfnGetR0Helpers */
349static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
350{
351 PDMDEV_ASSERT_DEVINS(pDevIns);
352 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
353 PCPDMIOAPICHLPR0 pR0Helpers = 0;
354 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
355 AssertReleaseRC(rc);
356 AssertRelease(pR0Helpers);
357 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
358 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
359 return pR0Helpers;
360}
361
362
363/**
364 * I/O APIC Device Helpers.
365 */
366const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp =
367{
368 PDM_IOAPICHLPR3_VERSION,
369 pdmR3IoApicHlp_ApicBusDeliver,
370 pdmR3IoApicHlp_Lock,
371 pdmR3IoApicHlp_Unlock,
372 pdmR3IoApicHlp_GetRCHelpers,
373 pdmR3IoApicHlp_GetR0Helpers,
374 PDM_IOAPICHLPR3_VERSION /* the end */
375};
376
377/** @} */
378
379
380
381
382/** @name HC PCI Bus Helpers
383 * @{
384 */
385
386/** @copydoc PDMPCIHLPR3::pfnIsaSetIrq */
387static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
388{
389 PDMDEV_ASSERT_DEVINS(pDevIns);
390 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
391 PDMIsaSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel);
392}
393
394
395/** @copydoc PDMPCIHLPR3::pfnIoApicSetIrq */
396static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
397{
398 PDMDEV_ASSERT_DEVINS(pDevIns);
399 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
400 PDMIoApicSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel);
401}
402
403
404/** @copydoc PDMPCIHLPR3::pfnIsMMIO2Base */
405static DECLCALLBACK(bool) pdmR3PciHlp_IsMMIO2Base(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys)
406{
407 PDMDEV_ASSERT_DEVINS(pDevIns);
408 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
409 bool fRc = PGMR3PhysMMIO2IsBase(pDevIns->Internal.s.pVMR3, pOwner, GCPhys);
410 Log4(("pdmR3PciHlp_IsMMIO2Base: pOwner=%p GCPhys=%RGp -> %RTbool\n", pOwner, GCPhys, fRc));
411 return fRc;
412}
413
414
415/** @copydoc PDMPCIHLPR3::pfnLock */
416static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
417{
418 PDMDEV_ASSERT_DEVINS(pDevIns);
419 LogFlow(("pdmR3PciHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
420 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
421}
422
423
424/** @copydoc PDMPCIHLPR3::pfnUnlock */
425static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns)
426{
427 PDMDEV_ASSERT_DEVINS(pDevIns);
428 LogFlow(("pdmR3PciHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
429 pdmUnlock(pDevIns->Internal.s.pVMR3);
430}
431
432
433/** @copydoc PDMPCIHLPR3::pfnGetRCHelpers */
434static DECLCALLBACK(PCPDMPCIHLPRC) pdmR3PciHlp_GetRCHelpers(PPDMDEVINS pDevIns)
435{
436 PDMDEV_ASSERT_DEVINS(pDevIns);
437 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
438 RTRCPTR pRCHelpers = 0;
439 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCPciHlp", &pRCHelpers);
440 AssertReleaseRC(rc);
441 AssertRelease(pRCHelpers);
442 LogFlow(("pdmR3IoApicHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
443 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
444 return pRCHelpers;
445}
446
447
448/** @copydoc PDMPCIHLPR3::pfnGetR0Helpers */
449static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns)
450{
451 PDMDEV_ASSERT_DEVINS(pDevIns);
452 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
453 PCPDMPCIHLPR0 pR0Helpers = 0;
454 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0PciHlp", &pR0Helpers);
455 AssertReleaseRC(rc);
456 AssertRelease(pR0Helpers);
457 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
458 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
459 return pR0Helpers;
460}
461
462
463/**
464 * PCI Bus Device Helpers.
465 */
466const PDMPCIHLPR3 g_pdmR3DevPciHlp =
467{
468 PDM_PCIHLPR3_VERSION,
469 pdmR3PciHlp_IsaSetIrq,
470 pdmR3PciHlp_IoApicSetIrq,
471 pdmR3PciHlp_IsMMIO2Base,
472 pdmR3PciHlp_GetRCHelpers,
473 pdmR3PciHlp_GetR0Helpers,
474 pdmR3PciHlp_Lock,
475 pdmR3PciHlp_Unlock,
476 PDM_PCIHLPR3_VERSION, /* the end */
477};
478
479/** @} */
480
481
482
483/* none yet */
484
485/**
486 * DMAC Device Helpers.
487 */
488const PDMDMACHLP g_pdmR3DevDmacHlp =
489{
490 PDM_DMACHLP_VERSION
491};
492
493
494
495
496/* none yet */
497
498/**
499 * RTC Device Helpers.
500 */
501const PDMRTCHLP g_pdmR3DevRtcHlp =
502{
503 PDM_RTCHLP_VERSION
504};
505
506
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