VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp@ 17465

Last change on this file since 17465 was 17465, checked in by vboxsync, 16 years ago

Removed unused return code

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File size: 111.3 KB
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1/* $Id: PGMAllPhys.cpp 17465 2009-03-06 13:09:17Z vboxsync $ */
2/** @file
3 * PGM - Page Manager and Monitor, Physical Memory Addressing.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.215389.xyz. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22/*******************************************************************************
23* Defined Constants And Macros *
24*******************************************************************************/
25/** @def PGM_IGNORE_RAM_FLAGS_RESERVED
26 * Don't respect the MM_RAM_FLAGS_RESERVED flag when converting to HC addresses.
27 *
28 * Since this flag is currently incorrectly kept set for ROM regions we will
29 * have to ignore it for now so we don't break stuff.
30 *
31 * @todo this has been fixed now I believe, remove this hack.
32 */
33#define PGM_IGNORE_RAM_FLAGS_RESERVED
34
35
36/*******************************************************************************
37* Header Files *
38*******************************************************************************/
39#define LOG_GROUP LOG_GROUP_PGM_PHYS
40#include <VBox/pgm.h>
41#include <VBox/trpm.h>
42#include <VBox/vmm.h>
43#include <VBox/iom.h>
44#include <VBox/em.h>
45#include <VBox/rem.h>
46#include "PGMInternal.h"
47#include <VBox/vm.h>
48#include <VBox/param.h>
49#include <VBox/err.h>
50#include <iprt/assert.h>
51#include <iprt/string.h>
52#include <iprt/asm.h>
53#include <VBox/log.h>
54#ifdef IN_RING3
55# include <iprt/thread.h>
56#endif
57
58
59
60#ifndef IN_RING3
61
62/**
63 * \#PF Handler callback for Guest ROM range write access.
64 * We simply ignore the writes or fall back to the recompiler if we don't support the instruction.
65 *
66 * @returns VBox status code (appropritate for trap handling and GC return).
67 * @param pVM VM Handle.
68 * @param uErrorCode CPU Error code.
69 * @param pRegFrame Trap register frame.
70 * @param pvFault The fault address (cr2).
71 * @param GCPhysFault The GC physical address corresponding to pvFault.
72 * @param pvUser User argument. Pointer to the ROM range structure.
73 */
74VMMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser)
75{
76 int rc;
77#ifdef VBOX_WITH_NEW_PHYS_CODE
78 PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser;
79 uint32_t iPage = GCPhysFault - pRom->GCPhys;
80 Assert(iPage < (pRom->cb >> PAGE_SHIFT));
81 switch (pRom->aPages[iPage].enmProt)
82 {
83 case PGMROMPROT_READ_ROM_WRITE_IGNORE:
84 case PGMROMPROT_READ_RAM_WRITE_IGNORE:
85 {
86#endif
87 /*
88 * If it's a simple instruction which doesn't change the cpu state
89 * we will simply skip it. Otherwise we'll have to defer it to REM.
90 */
91 uint32_t cbOp;
92 DISCPUSTATE Cpu;
93 rc = EMInterpretDisasOne(pVM, pRegFrame, &Cpu, &cbOp);
94 if ( RT_SUCCESS(rc)
95 && Cpu.mode == CPUMODE_32BIT /** @todo why does this matter? */
96 && !(Cpu.prefix & (PREFIX_REPNE | PREFIX_REP | PREFIX_SEG)))
97 {
98 switch (Cpu.opcode)
99 {
100 /** @todo Find other instructions we can safely skip, possibly
101 * adding this kind of detection to DIS or EM. */
102 case OP_MOV:
103 pRegFrame->rip += cbOp;
104 STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestROMWriteHandled);
105 return VINF_SUCCESS;
106 }
107 }
108 else if (RT_UNLIKELY(rc == VERR_INTERNAL_ERROR))
109 return rc;
110#ifdef VBOX_WITH_NEW_PHYS_CODE
111 break;
112 }
113
114 case PGMROMPROT_READ_RAM_WRITE_RAM:
115 rc = PGMHandlerPhysicalPageTempOff(pVM, pRom->GCPhys, GCPhysFault & X86_PTE_PG_MASK);
116 AssertRC(rc);
117 break; /** @todo Must restart the instruction, not use the interpreter! */
118
119 case PGMROMPROT_READ_ROM_WRITE_RAM:
120 /* Handle it in ring-3 because it's *way* easier there. */
121 break;
122
123 default:
124 AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n",
125 pRom->aPages[iPage].enmProt, iPage, GCPhysFault),
126 VERR_INTERNAL_ERROR);
127 }
128#endif
129
130 STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestROMWriteUnhandled);
131 return VINF_EM_RAW_EMULATE_INSTR;
132}
133
134#endif /* IN_RING3 */
135
136/**
137 * Checks if Address Gate 20 is enabled or not.
138 *
139 * @returns true if enabled.
140 * @returns false if disabled.
141 * @param pVM VM handle.
142 */
143VMMDECL(bool) PGMPhysIsA20Enabled(PVM pVM)
144{
145 LogFlow(("PGMPhysIsA20Enabled %d\n", pVM->pgm.s.fA20Enabled));
146 return !!pVM->pgm.s.fA20Enabled ; /* stupid MS compiler doesn't trust me. */
147}
148
149
150/**
151 * Validates a GC physical address.
152 *
153 * @returns true if valid.
154 * @returns false if invalid.
155 * @param pVM The VM handle.
156 * @param GCPhys The physical address to validate.
157 */
158VMMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys)
159{
160 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
161 return pPage != NULL;
162}
163
164
165/**
166 * Checks if a GC physical address is a normal page,
167 * i.e. not ROM, MMIO or reserved.
168 *
169 * @returns true if normal.
170 * @returns false if invalid, ROM, MMIO or reserved page.
171 * @param pVM The VM handle.
172 * @param GCPhys The physical address to check.
173 */
174VMMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys)
175{
176 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
177#ifdef VBOX_WITH_NEW_PHYS_CODE
178 return pPage
179 && PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM;
180#else
181 return pPage
182 && !(pPage->HCPhys & (MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO2));
183#endif
184}
185
186
187/**
188 * Converts a GC physical address to a HC physical address.
189 *
190 * @returns VINF_SUCCESS on success.
191 * @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
192 * page but has no physical backing.
193 * @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
194 * GC physical address.
195 *
196 * @param pVM The VM handle.
197 * @param GCPhys The GC physical address to convert.
198 * @param pHCPhys Where to store the HC physical address on success.
199 */
200VMMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
201{
202 PPGMPAGE pPage;
203 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage);
204 if (RT_FAILURE(rc))
205 return rc;
206
207#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
208 if (RT_UNLIKELY(pPage->HCPhys & MM_RAM_FLAGS_RESERVED)) /** @todo PAGE FLAGS */
209 return VERR_PGM_PHYS_PAGE_RESERVED;
210#endif
211
212 *pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK);
213 return VINF_SUCCESS;
214}
215
216
217/**
218 * Invalidates the GC page mapping TLB.
219 *
220 * @param pVM The VM handle.
221 */
222VMMDECL(void) PGMPhysInvalidatePageGCMapTLB(PVM pVM)
223{
224 /* later */
225 NOREF(pVM);
226}
227
228
229/**
230 * Invalidates the ring-0 page mapping TLB.
231 *
232 * @param pVM The VM handle.
233 */
234VMMDECL(void) PGMPhysInvalidatePageR0MapTLB(PVM pVM)
235{
236 PGMPhysInvalidatePageR3MapTLB(pVM);
237}
238
239
240/**
241 * Invalidates the ring-3 page mapping TLB.
242 *
243 * @param pVM The VM handle.
244 */
245VMMDECL(void) PGMPhysInvalidatePageR3MapTLB(PVM pVM)
246{
247 pgmLock(pVM);
248 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.PhysTlbHC.aEntries); i++)
249 {
250 pVM->pgm.s.PhysTlbHC.aEntries[i].GCPhys = NIL_RTGCPHYS;
251 pVM->pgm.s.PhysTlbHC.aEntries[i].pPage = 0;
252 pVM->pgm.s.PhysTlbHC.aEntries[i].pMap = 0;
253 pVM->pgm.s.PhysTlbHC.aEntries[i].pv = 0;
254 }
255 pgmUnlock(pVM);
256}
257
258
259/**
260 * Makes sure that there is at least one handy page ready for use.
261 *
262 * This will also take the appropriate actions when reaching water-marks.
263 *
264 * @returns The following VBox status codes.
265 * @retval VINF_SUCCESS on success.
266 * @retval VERR_EM_NO_MEMORY if we're really out of memory.
267 *
268 * @param pVM The VM handle.
269 *
270 * @remarks Must be called from within the PGM critical section. It may
271 * nip back to ring-3/0 in some cases.
272 */
273static int pgmPhysEnsureHandyPage(PVM pVM)
274{
275 /** @remarks
276 * low-water mark logic for R0 & GC:
277 * - 75%: Set FF.
278 * - 50%: Force return to ring-3 ASAP.
279 *
280 * For ring-3 there is a little problem wrt to the recompiler, so:
281 * - 75%: Set FF.
282 * - 50%: Try allocate pages; on failure we'll force REM to quite ASAP.
283 *
284 * The basic idea is that we should be able to get out of any situation with
285 * only 50% of handy pages remaining.
286 *
287 * At the moment we'll not adjust the number of handy pages relative to the
288 * actual VM RAM committment, that's too much work for now.
289 */
290 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect));
291 Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
292 if ( !pVM->pgm.s.cHandyPages
293#ifdef IN_RING3
294 || pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2 /* 50% */
295#endif
296 )
297 {
298 Log(("PGM: cHandyPages=%u out of %u -> allocate more\n", pVM->pgm.s.cHandyPages, RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
299#ifdef IN_RING3
300 int rc = PGMR3PhysAllocateHandyPages(pVM);
301#elif defined(IN_RING0)
302 int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
303#else
304 int rc = VMMGCCallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
305#endif
306 if (RT_UNLIKELY(rc != VINF_SUCCESS))
307 {
308 Assert(rc == VINF_EM_NO_MEMORY);
309 if (!pVM->pgm.s.cHandyPages)
310 {
311 LogRel(("PGM: no more handy pages!\n"));
312 return VERR_EM_NO_MEMORY;
313 }
314 Assert(VM_FF_ISSET(pVM, VM_FF_PGM_NEED_HANDY_PAGES));
315#ifdef IN_RING3
316 REMR3NotifyFF(pVM);
317#else
318 VM_FF_SET(pVM, VM_FF_TO_R3);
319#endif
320 }
321 Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
322 }
323 else if (pVM->pgm.s.cHandyPages - 1 <= (RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 4) * 3) /* 75% */
324 {
325 VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
326#ifndef IN_RING3
327 if (pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2)
328 {
329 Log(("PGM: VM_FF_TO_R3 - cHandyPages=%u out of %u\n", pVM->pgm.s.cHandyPages - 1, RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
330 VM_FF_SET(pVM, VM_FF_TO_R3);
331 }
332#endif
333 }
334
335 return VINF_SUCCESS;
336}
337
338
339/**
340 * Replace a zero or shared page with new page that we can write to.
341 *
342 * @returns The following VBox status codes.
343 * @retval VINF_SUCCESS on success, pPage is modified.
344 * @retval VERR_EM_NO_MEMORY if we're totally out of memory.
345 *
346 * @todo Propagate VERR_EM_NO_MEMORY up the call tree.
347 *
348 * @param pVM The VM address.
349 * @param pPage The physical page tracking structure. This will
350 * be modified on success.
351 * @param GCPhys The address of the page.
352 *
353 * @remarks Must be called from within the PGM critical section. It may
354 * nip back to ring-3/0 in some cases.
355 *
356 * @remarks This function shouldn't really fail, however if it does
357 * it probably means we've screwed up the size of the amount
358 * and/or the low-water mark of handy pages. Or, that some
359 * device I/O is causing a lot of pages to be allocated while
360 * while the host is in a low-memory condition.
361 */
362int pgmPhysAllocPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
363{
364 LogFlow(("pgmPhysAllocPage: %R[pgmpage] %RGp\n", pPage, GCPhys));
365
366 /*
367 * Ensure that we've got a page handy, take it and use it.
368 */
369 int rc = pgmPhysEnsureHandyPage(pVM);
370 if (RT_FAILURE(rc))
371 {
372 Assert(rc == VERR_EM_NO_MEMORY);
373 return rc;
374 }
375 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect));
376 AssertMsg(PGM_PAGE_IS_ZERO(pPage) || PGM_PAGE_IS_SHARED(pPage), ("%d %RGp\n", PGM_PAGE_GET_STATE(pPage), GCPhys));
377 Assert(!PGM_PAGE_IS_MMIO(pPage));
378
379 uint32_t iHandyPage = --pVM->pgm.s.cHandyPages;
380 Assert(iHandyPage < RT_ELEMENTS(pVM->pgm.s.aHandyPages));
381 Assert(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys != NIL_RTHCPHYS);
382 Assert(!(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys & ~X86_PTE_PAE_PG_MASK));
383 Assert(pVM->pgm.s.aHandyPages[iHandyPage].idPage != NIL_GMM_PAGEID);
384 Assert(pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage == NIL_GMM_PAGEID);
385
386 /*
387 * There are one or two action to be taken the next time we allocate handy pages:
388 * - Tell the GMM (global memory manager) what the page is being used for.
389 * (Speeds up replacement operations - sharing and defragmenting.)
390 * - If the current backing is shared, it must be freed.
391 */
392 const RTHCPHYS HCPhys = pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys;
393 pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys = GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK;
394
395 if (PGM_PAGE_IS_SHARED(pPage))
396 {
397 pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage = PGM_PAGE_GET_PAGEID(pPage);
398 Assert(PGM_PAGE_GET_PAGEID(pPage) != NIL_GMM_PAGEID);
399 VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
400
401 Log2(("PGM: Replaced shared page %#x at %RGp with %#x / %RHp\n", PGM_PAGE_GET_PAGEID(pPage),
402 GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
403 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,PageReplaceShared));
404 pVM->pgm.s.cSharedPages--;
405 AssertMsgFailed(("TODO: copy shared page content")); /** @todo err.. what about copying the page content? */
406 }
407 else
408 {
409 Log2(("PGM: Replaced zero page %RGp with %#x / %RHp\n", GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
410 STAM_COUNTER_INC(&pVM->pgm.s.StatRZPageReplaceZero);
411 pVM->pgm.s.cZeroPages--;
412 Assert(pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage == NIL_GMM_PAGEID);
413 }
414
415 /*
416 * Do the PGMPAGE modifications.
417 */
418 pVM->pgm.s.cPrivatePages++;
419 PGM_PAGE_SET_HCPHYS(pPage, HCPhys);
420 PGM_PAGE_SET_PAGEID(pPage, pVM->pgm.s.aHandyPages[iHandyPage].idPage);
421 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
422
423 return VINF_SUCCESS;
424}
425
426
427/**
428 * Deal with pages that are not writable, i.e. not in the ALLOCATED state.
429 *
430 * @returns VBox status code.
431 * @retval VINF_SUCCESS on success.
432 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
433 *
434 * @param pVM The VM address.
435 * @param pPage The physical page tracking structure.
436 * @param GCPhys The address of the page.
437 *
438 * @remarks Called from within the PGM critical section.
439 */
440int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
441{
442 switch (PGM_PAGE_GET_STATE(pPage))
443 {
444 case PGM_PAGE_STATE_WRITE_MONITORED:
445 PGM_PAGE_SET_WRITTEN_TO(pPage);
446 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
447 /* fall thru */
448 default: /* to shut up GCC */
449 case PGM_PAGE_STATE_ALLOCATED:
450 return VINF_SUCCESS;
451
452 /*
453 * Zero pages can be dummy pages for MMIO or reserved memory,
454 * so we need to check the flags before joining cause with
455 * shared page replacement.
456 */
457 case PGM_PAGE_STATE_ZERO:
458 if (PGM_PAGE_IS_MMIO(pPage))
459 return VERR_PGM_PHYS_PAGE_RESERVED;
460 /* fall thru */
461 case PGM_PAGE_STATE_SHARED:
462 return pgmPhysAllocPage(pVM, pPage, GCPhys);
463 }
464}
465
466
467/**
468 * Wrapper for pgmPhysPageMakeWritable which enters the critsect.
469 *
470 * @returns VBox status code.
471 * @retval VINF_SUCCESS on success.
472 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
473 *
474 * @param pVM The VM address.
475 * @param pPage The physical page tracking structure.
476 * @param GCPhys The address of the page.
477 */
478int pgmPhysPageMakeWritableUnlocked(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
479{
480 int rc = pgmLock(pVM);
481 if (RT_SUCCESS(rc))
482 {
483 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
484 pgmUnlock(pVM);
485 }
486 return rc;
487}
488
489
490/**
491 * Internal usage: Map the page specified by its GMM ID.
492 *
493 * This is similar to pgmPhysPageMap
494 *
495 * @returns VBox status code.
496 *
497 * @param pVM The VM handle.
498 * @param idPage The Page ID.
499 * @param HCPhys The physical address (for RC).
500 * @param ppv Where to store the mapping address.
501 *
502 * @remarks Called from within the PGM critical section.
503 */
504int pgmPhysPageMapByPageID(PVM pVM, uint32_t idPage, RTHCPHYS HCPhys, void **ppv)
505{
506 /*
507 * Validation.
508 */
509 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect));
510 AssertReturn(HCPhys && !(HCPhys & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
511 const uint32_t idChunk = idPage >> GMM_CHUNKID_SHIFT;
512 AssertReturn(idChunk != NIL_GMM_CHUNKID, VERR_INVALID_PARAMETER);
513
514#ifdef IN_RC
515 /*
516 * Map it by HCPhys.
517 */
518 return PGMDynMapHCPage(pVM, HCPhys, ppv);
519
520#elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
521 /*
522 * Map it by HCPhys.
523 */
524 return pgmR0DynMapHCPageInlined(&pVM->pgm.s, HCPhys, ppv);
525
526#else
527 /*
528 * Find/make Chunk TLB entry for the mapping chunk.
529 */
530 PPGMCHUNKR3MAP pMap;
531 PPGMCHUNKR3MAPTLBE pTlbe = &pVM->pgm.s.ChunkR3Map.Tlb.aEntries[PGM_CHUNKR3MAPTLB_IDX(idChunk)];
532 if (pTlbe->idChunk == idChunk)
533 {
534 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbHits));
535 pMap = pTlbe->pChunk;
536 }
537 else
538 {
539 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbMisses));
540
541 /*
542 * Find the chunk, map it if necessary.
543 */
544 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
545 if (!pMap)
546 {
547# ifdef IN_RING0
548 int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_MAP_CHUNK, idChunk);
549 AssertRCReturn(rc, rc);
550 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
551 Assert(pMap);
552# else
553 int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap);
554 if (RT_FAILURE(rc))
555 return rc;
556# endif
557 }
558
559 /*
560 * Enter it into the Chunk TLB.
561 */
562 pTlbe->idChunk = idChunk;
563 pTlbe->pChunk = pMap;
564 pMap->iAge = 0;
565 }
566
567 *ppv = (uint8_t *)pMap->pv + ((idPage &GMM_PAGEID_IDX_MASK) << PAGE_SHIFT);
568 return VINF_SUCCESS;
569#endif
570}
571
572
573/**
574 * Maps a page into the current virtual address space so it can be accessed.
575 *
576 * @returns VBox status code.
577 * @retval VINF_SUCCESS on success.
578 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
579 *
580 * @param pVM The VM address.
581 * @param pPage The physical page tracking structure.
582 * @param GCPhys The address of the page.
583 * @param ppMap Where to store the address of the mapping tracking structure.
584 * @param ppv Where to store the mapping address of the page. The page
585 * offset is masked off!
586 *
587 * @remarks Called from within the PGM critical section.
588 */
589int pgmPhysPageMap(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv)
590{
591 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect));
592
593#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
594 /*
595 * Just some sketchy GC/R0-darwin code.
596 */
597 *ppMap = NULL;
598 RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(pPage);
599 Assert(HCPhys != pVM->pgm.s.HCPhysZeroPg);
600# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
601 pgmR0DynMapHCPageInlined(&pVM->pgm.s, HCPhys, ppv);
602# else
603 PGMDynMapHCPage(pVM, HCPhys, ppv);
604# endif
605 return VINF_SUCCESS;
606
607#else /* IN_RING3 || IN_RING0 */
608
609
610 /*
611 * Special case: ZERO and MMIO2 pages.
612 */
613 const uint32_t idChunk = PGM_PAGE_GET_CHUNKID(pPage);
614 if (idChunk == NIL_GMM_CHUNKID)
615 {
616 AssertMsgReturn(PGM_PAGE_GET_PAGEID(pPage) == NIL_GMM_PAGEID, ("pPage=%R[pgmpage]\n", pPage), VERR_INTERNAL_ERROR);
617 if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2)
618 {
619 /* Lookup the MMIO2 range and use pvR3 to calc the address. */
620 PPGMRAMRANGE pRam = pgmPhysGetRange(&pVM->pgm.s, GCPhys);
621 AssertMsgReturn(pRam || !pRam->pvR3, ("pRam=%p pPage=%R[pgmpage]\n", pRam, pPage), VERR_INTERNAL_ERROR);
622 *ppv = (void *)((uintptr_t)pRam->pvR3 + (GCPhys - pRam->GCPhys));
623 }
624 else if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
625 {
626 /** @todo deal with aliased MMIO2 pages somehow...
627 * One solution would be to seed MMIO2 pages to GMM and get unique Page IDs for
628 * them, that would also avoid this mess. It would actually be kind of
629 * elegant... */
630 AssertFailedReturn(VERR_INTERNAL_ERROR);
631 }
632 else
633 {
634 /** @todo handle MMIO2 */
635 AssertMsgReturn(PGM_PAGE_IS_ZERO(pPage), ("pPage=%R[pgmpage]\n", pPage), VERR_INTERNAL_ERROR);
636 AssertMsgReturn(PGM_PAGE_GET_HCPHYS(pPage) == pVM->pgm.s.HCPhysZeroPg,
637 ("pPage=%R[pgmpage]\n", pPage),
638 VERR_INTERNAL_ERROR);
639 *ppv = pVM->pgm.s.CTXALLSUFF(pvZeroPg);
640 }
641 *ppMap = NULL;
642 return VINF_SUCCESS;
643 }
644
645 /*
646 * Find/make Chunk TLB entry for the mapping chunk.
647 */
648 PPGMCHUNKR3MAP pMap;
649 PPGMCHUNKR3MAPTLBE pTlbe = &pVM->pgm.s.ChunkR3Map.Tlb.aEntries[PGM_CHUNKR3MAPTLB_IDX(idChunk)];
650 if (pTlbe->idChunk == idChunk)
651 {
652 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbHits));
653 pMap = pTlbe->pChunk;
654 }
655 else
656 {
657 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbMisses));
658
659 /*
660 * Find the chunk, map it if necessary.
661 */
662 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
663 if (!pMap)
664 {
665#ifdef IN_RING0
666 int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_MAP_CHUNK, idChunk);
667 AssertRCReturn(rc, rc);
668 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
669 Assert(pMap);
670#else
671 int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap);
672 if (RT_FAILURE(rc))
673 return rc;
674#endif
675 }
676
677 /*
678 * Enter it into the Chunk TLB.
679 */
680 pTlbe->idChunk = idChunk;
681 pTlbe->pChunk = pMap;
682 pMap->iAge = 0;
683 }
684
685 *ppv = (uint8_t *)pMap->pv + (PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) << PAGE_SHIFT);
686 *ppMap = pMap;
687 return VINF_SUCCESS;
688#endif /* IN_RING3 */
689}
690
691
692#if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
693/**
694 * Load a guest page into the ring-3 physical TLB.
695 *
696 * @returns VBox status code.
697 * @retval VINF_SUCCESS on success
698 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
699 * @param pPGM The PGM instance pointer.
700 * @param GCPhys The guest physical address in question.
701 */
702int pgmPhysPageLoadIntoTlb(PPGM pPGM, RTGCPHYS GCPhys)
703{
704 STAM_COUNTER_INC(&pPGM->CTX_MID_Z(Stat,PageMapTlbMisses));
705
706 /*
707 * Find the ram range.
708 * 99.8% of requests are expected to be in the first range.
709 */
710 PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRanges);
711 RTGCPHYS off = GCPhys - pRam->GCPhys;
712 if (RT_UNLIKELY(off >= pRam->cb))
713 {
714 do
715 {
716 pRam = pRam->CTX_SUFF(pNext);
717 if (!pRam)
718 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
719 off = GCPhys - pRam->GCPhys;
720 } while (off >= pRam->cb);
721 }
722
723 /*
724 * Map the page.
725 * Make a special case for the zero page as it is kind of special.
726 */
727 PPGMPAGE pPage = &pRam->aPages[off >> PAGE_SHIFT];
728 PPGMPAGEMAPTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
729 if (!PGM_PAGE_IS_ZERO(pPage))
730 {
731 void *pv;
732 PPGMPAGEMAP pMap;
733 int rc = pgmPhysPageMap(PGM2VM(pPGM), pPage, GCPhys, &pMap, &pv);
734 if (RT_FAILURE(rc))
735 return rc;
736 pTlbe->pMap = pMap;
737 pTlbe->pv = pv;
738 }
739 else
740 {
741 Assert(PGM_PAGE_GET_HCPHYS(pPage) == pPGM->HCPhysZeroPg);
742 pTlbe->pMap = NULL;
743 pTlbe->pv = pPGM->CTXALLSUFF(pvZeroPg);
744 }
745 pTlbe->pPage = pPage;
746 return VINF_SUCCESS;
747}
748
749
750/**
751 * Load a guest page into the ring-3 physical TLB.
752 *
753 * @returns VBox status code.
754 * @retval VINF_SUCCESS on success
755 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
756 *
757 * @param pPGM The PGM instance pointer.
758 * @param pPage Pointer to the PGMPAGE structure corresponding to
759 * GCPhys.
760 * @param GCPhys The guest physical address in question.
761 */
762int pgmPhysPageLoadIntoTlbWithPage(PPGM pPGM, PPGMPAGE pPage, RTGCPHYS GCPhys)
763{
764 STAM_COUNTER_INC(&pPGM->CTX_MID_Z(Stat,PageMapTlbMisses));
765
766 /*
767 * Map the page.
768 * Make a special case for the zero page as it is kind of special.
769 */
770 PPGMPAGEMAPTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
771 if (!PGM_PAGE_IS_ZERO(pPage))
772 {
773 void *pv;
774 PPGMPAGEMAP pMap;
775 int rc = pgmPhysPageMap(PGM2VM(pPGM), pPage, GCPhys, &pMap, &pv);
776 if (RT_FAILURE(rc))
777 return rc;
778 pTlbe->pMap = pMap;
779 pTlbe->pv = pv;
780 }
781 else
782 {
783 Assert(PGM_PAGE_GET_HCPHYS(pPage) == pPGM->HCPhysZeroPg);
784 pTlbe->pMap = NULL;
785 pTlbe->pv = pPGM->CTXALLSUFF(pvZeroPg);
786 }
787 pTlbe->pPage = pPage;
788 return VINF_SUCCESS;
789}
790#endif /* !IN_RC && !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
791
792
793/**
794 * Internal version of PGMPhysGCPhys2CCPtr that expects the caller to
795 * own the PGM lock and therefore not need to lock the mapped page.
796 *
797 * @returns VBox status code.
798 * @retval VINF_SUCCESS on success.
799 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
800 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
801 *
802 * @param pVM The VM handle.
803 * @param GCPhys The guest physical address of the page that should be mapped.
804 * @param pPage Pointer to the PGMPAGE structure for the page.
805 * @param ppv Where to store the address corresponding to GCPhys.
806 *
807 * @internal
808 */
809int pgmPhysGCPhys2CCPtrInternal(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void **ppv)
810{
811 int rc;
812 AssertReturn(pPage, VERR_INTERNAL_ERROR);
813 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect) || VM_IS_EMT(pVM));
814
815 /*
816 * Make sure the page is writable.
817 */
818 if (RT_UNLIKELY(PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED))
819 {
820 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
821 if (RT_FAILURE(rc))
822 return rc;
823 }
824 Assert(PGM_PAGE_GET_HCPHYS(pPage) != 0);
825
826 /*
827 * Get the mapping address.
828 */
829#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
830 *ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK));
831#else
832 PPGMPAGEMAPTLBE pTlbe;
833 rc = pgmPhysPageQueryTlbeWithPage(&pVM->pgm.s, pPage, GCPhys, &pTlbe);
834 if (RT_FAILURE(rc))
835 return rc;
836 *ppv = (void *)((uintptr_t)pTlbe->pv | (GCPhys & PAGE_OFFSET_MASK));
837#endif
838 return VINF_SUCCESS;
839}
840
841
842/**
843 * Internal version of PGMPhysGCPhys2CCPtrReadOnly that expects the caller to
844 * own the PGM lock and therefore not need to lock the mapped page.
845 *
846 * @returns VBox status code.
847 * @retval VINF_SUCCESS on success.
848 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
849 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
850 *
851 * @param pVM The VM handle.
852 * @param GCPhys The guest physical address of the page that should be mapped.
853 * @param pPage Pointer to the PGMPAGE structure for the page.
854 * @param ppv Where to store the address corresponding to GCPhys.
855 *
856 * @internal
857 */
858int pgmPhysGCPhys2CCPtrInternalReadOnly(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, const void **ppv)
859{
860 AssertReturn(pPage, VERR_INTERNAL_ERROR);
861 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect) || VM_IS_EMT(pVM));
862 Assert(PGM_PAGE_GET_HCPHYS(pPage) != 0);
863
864 /*
865 * Get the mapping address.
866 */
867#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
868 *ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
869#else
870 PPGMPAGEMAPTLBE pTlbe;
871 int rc = pgmPhysPageQueryTlbeWithPage(&pVM->pgm.s, pPage, GCPhys, &pTlbe);
872 if (RT_FAILURE(rc))
873 return rc;
874 *ppv = (void *)((uintptr_t)pTlbe->pv | (GCPhys & PAGE_OFFSET_MASK));
875#endif
876 return VINF_SUCCESS;
877}
878
879
880/**
881 * Requests the mapping of a guest page into the current context.
882 *
883 * This API should only be used for very short term, as it will consume
884 * scarse resources (R0 and GC) in the mapping cache. When you're done
885 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
886 *
887 * This API will assume your intention is to write to the page, and will
888 * therefore replace shared and zero pages. If you do not intend to modify
889 * the page, use the PGMPhysGCPhys2CCPtrReadOnly() API.
890 *
891 * @returns VBox status code.
892 * @retval VINF_SUCCESS on success.
893 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
894 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
895 *
896 * @param pVM The VM handle.
897 * @param GCPhys The guest physical address of the page that should be mapped.
898 * @param ppv Where to store the address corresponding to GCPhys.
899 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
900 *
901 * @remark Avoid calling this API from within critical sections (other than
902 * the PGM one) because of the deadlock risk.
903 * @thread Any thread.
904 */
905VMMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock)
906{
907#ifdef VBOX_WITH_NEW_PHYS_CODE
908# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
909
910 /*
911 * Find the page and make sure it's writable.
912 */
913 PPGMPAGE pPage;
914 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage);
915 if (RT_SUCCESS(rc))
916 {
917 if (RT_UNLIKELY(PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED))
918 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
919 if (RT_SUCCESS(rc))
920 {
921 *ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
922#if 0
923 pLock->pvMap = 0;
924 pLock->pvPage = pPage;
925#else
926 pLock->u32Dummy = UINT32_MAX;
927#endif
928 }
929 }
930
931# else
932 int rc = pgmLock(pVM);
933 AssertRCReturn(rc, rc);
934
935 /*
936 * Query the Physical TLB entry for the page (may fail).
937 */
938 PPGMPAGEMAPTLBE pTlbe;
939 rc = pgmPhysPageQueryTlbe(&pVM->pgm.s, GCPhys, &pTlbe);
940 if (RT_SUCCESS(rc))
941 {
942 /*
943 * If the page is shared, the zero page, or being write monitored
944 * it must be converted to an page that's writable if possible.
945 */
946 PPGMPAGE pPage = pTlbe->pPage;
947 if (RT_UNLIKELY(PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED))
948 {
949 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
950 if (RT_SUCCESS(rc))
951 rc = pgmPhysPageQueryTlbeWithPage(&pVM->pgm.s, pPage, GCPhys, &pTlbe);
952 }
953 if (RT_SUCCESS(rc))
954 {
955 /*
956 * Now, just perform the locking and calculate the return address.
957 */
958 PPGMPAGEMAP pMap = pTlbe->pMap;
959 pMap->cRefs++;
960#if 0 /** @todo implement locking properly */
961 if (RT_LIKELY(pPage->cLocks != PGM_PAGE_MAX_LOCKS))
962 if (RT_UNLIKELY(++pPage->cLocks == PGM_PAGE_MAX_LOCKS))
963 {
964 AssertMsgFailed(("%RGp is entering permanent locked state!\n", GCPhys));
965 pMap->cRefs++; /* Extra ref to prevent it from going away. */
966 }
967#endif
968 *ppv = (void *)((uintptr_t)pTlbe->pv | (GCPhys & PAGE_OFFSET_MASK));
969 pLock->pvPage = pPage;
970 pLock->pvMap = pMap;
971 }
972 }
973
974 pgmUnlock(pVM);
975#endif /* IN_RING3 || IN_RING0 */
976 return rc;
977
978#else
979 /*
980 * Temporary fallback code.
981 */
982# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
983/** @todo @bugref{3202}: check up this path. */
984 return PGMDynMapGCPageOff(pVM, GCPhys, ppv);
985# else
986 return PGMPhysGCPhys2R3Ptr(pVM, GCPhys, 1, (PRTR3PTR)ppv);
987# endif
988#endif
989}
990
991
992/**
993 * Requests the mapping of a guest page into the current context.
994 *
995 * This API should only be used for very short term, as it will consume
996 * scarse resources (R0 and GC) in the mapping cache. When you're done
997 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
998 *
999 * @returns VBox status code.
1000 * @retval VINF_SUCCESS on success.
1001 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
1002 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
1003 *
1004 * @param pVM The VM handle.
1005 * @param GCPhys The guest physical address of the page that should be mapped.
1006 * @param ppv Where to store the address corresponding to GCPhys.
1007 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
1008 *
1009 * @remark Avoid calling this API from within critical sections (other than
1010 * the PGM one) because of the deadlock risk.
1011 * @thread Any thread.
1012 */
1013VMMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock)
1014{
1015 /** @todo implement this */
1016 return PGMPhysGCPhys2CCPtr(pVM, GCPhys, (void **)ppv, pLock);
1017}
1018
1019
1020/**
1021 * Requests the mapping of a guest page given by virtual address into the current context.
1022 *
1023 * This API should only be used for very short term, as it will consume
1024 * scarse resources (R0 and GC) in the mapping cache. When you're done
1025 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
1026 *
1027 * This API will assume your intention is to write to the page, and will
1028 * therefore replace shared and zero pages. If you do not intend to modify
1029 * the page, use the PGMPhysGCPtr2CCPtrReadOnly() API.
1030 *
1031 * @returns VBox status code.
1032 * @retval VINF_SUCCESS on success.
1033 * @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
1034 * @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
1035 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
1036 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
1037 *
1038 * @param pVM The VM handle.
1039 * @param GCPhys The guest physical address of the page that should be mapped.
1040 * @param ppv Where to store the address corresponding to GCPhys.
1041 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
1042 *
1043 * @remark Avoid calling this API from within critical sections (other than
1044 * the PGM one) because of the deadlock risk.
1045 * @thread EMT
1046 */
1047VMMDECL(int) PGMPhysGCPtr2CCPtr(PVM pVM, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock)
1048{
1049 VM_ASSERT_EMT(pVM);
1050 RTGCPHYS GCPhys;
1051 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
1052 if (RT_SUCCESS(rc))
1053 rc = PGMPhysGCPhys2CCPtr(pVM, GCPhys, ppv, pLock);
1054 return rc;
1055}
1056
1057
1058/**
1059 * Requests the mapping of a guest page given by virtual address into the current context.
1060 *
1061 * This API should only be used for very short term, as it will consume
1062 * scarse resources (R0 and GC) in the mapping cache. When you're done
1063 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
1064 *
1065 * @returns VBox status code.
1066 * @retval VINF_SUCCESS on success.
1067 * @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
1068 * @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
1069 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
1070 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
1071 *
1072 * @param pVM The VM handle.
1073 * @param GCPhys The guest physical address of the page that should be mapped.
1074 * @param ppv Where to store the address corresponding to GCPhys.
1075 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
1076 *
1077 * @remark Avoid calling this API from within critical sections (other than
1078 * the PGM one) because of the deadlock risk.
1079 * @thread EMT
1080 */
1081VMMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock)
1082{
1083 VM_ASSERT_EMT(pVM);
1084 RTGCPHYS GCPhys;
1085 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
1086 if (RT_SUCCESS(rc))
1087 rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhys, ppv, pLock);
1088 return rc;
1089}
1090
1091
1092/**
1093 * Release the mapping of a guest page.
1094 *
1095 * This is the counter part of PGMPhysGCPhys2CCPtr, PGMPhysGCPhys2CCPtrReadOnly
1096 * PGMPhysGCPtr2CCPtr and PGMPhysGCPtr2CCPtrReadOnly.
1097 *
1098 * @param pVM The VM handle.
1099 * @param pLock The lock structure initialized by the mapping function.
1100 */
1101VMMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock)
1102{
1103#ifdef VBOX_WITH_NEW_PHYS_CODE
1104#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1105 /* currently nothing to do here. */
1106 Assert(pLock->u32Dummy == UINT32_MAX);
1107 pLock->u32Dummy = 0;
1108
1109#else /* IN_RING3 */
1110 PPGMPAGEMAP pMap = (PPGMPAGEMAP)pLock->pvMap;
1111 if (!pMap)
1112 {
1113 /* The ZERO page and MMIO2 ends up here. */
1114 Assert(pLock->pvPage);
1115 pLock->pvPage = NULL;
1116 }
1117 else
1118 {
1119 pgmLock(pVM);
1120
1121# if 0 /** @todo implement page locking */
1122 PPGMPAGE pPage = (PPGMPAGE)pLock->pvPage;
1123 Assert(pPage->cLocks >= 1);
1124 if (pPage->cLocks != PGM_PAGE_MAX_LOCKS)
1125 pPage->cLocks--;
1126# endif
1127
1128 Assert(pMap->cRefs >= 1);
1129 pMap->cRefs--;
1130 pMap->iAge = 0;
1131
1132 pgmUnlock(pVM);
1133 }
1134#endif /* IN_RING3 */
1135#else
1136 NOREF(pVM);
1137 NOREF(pLock);
1138#endif
1139}
1140
1141
1142/**
1143 * Converts a GC physical address to a HC ring-3 pointer.
1144 *
1145 * @returns VINF_SUCCESS on success.
1146 * @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
1147 * page but has no physical backing.
1148 * @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
1149 * GC physical address.
1150 * @returns VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY if the range crosses
1151 * a dynamic ram chunk boundary
1152 *
1153 * @param pVM The VM handle.
1154 * @param GCPhys The GC physical address to convert.
1155 * @param cbRange Physical range
1156 * @param pR3Ptr Where to store the R3 pointer on success.
1157 *
1158 * @deprecated Avoid when possible!
1159 */
1160VMMDECL(int) PGMPhysGCPhys2R3Ptr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTR3PTR pR3Ptr)
1161{
1162#ifdef VBOX_WITH_NEW_PHYS_CODE
1163/** @todo this is kind of hacky and needs some more work. */
1164 VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
1165
1166 LogAlways(("PGMPhysGCPhys2R3Ptr(,%RGp,%#x,): dont use this API!\n", GCPhys, cbRange)); /** @todo eliminate this API! */
1167# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1168 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
1169# else
1170 pgmLock(pVM);
1171
1172 PPGMRAMRANGE pRam;
1173 PPGMPAGE pPage;
1174 int rc = pgmPhysGetPageAndRangeEx(&pVM->pgm.s, GCPhys, &pPage, &pRam);
1175 if (RT_SUCCESS(rc))
1176 rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, (void **)&pR3Ptr);
1177
1178 pgmUnlock(pVM);
1179 Assert(rc <= VINF_SUCCESS);
1180 return rc;
1181# endif
1182
1183#else /* !VBOX_WITH_NEW_PHYS_CODE */
1184
1185 if ((GCPhys & PGM_DYNAMIC_CHUNK_BASE_MASK) != ((GCPhys+cbRange-1) & PGM_DYNAMIC_CHUNK_BASE_MASK))
1186 {
1187 AssertMsgFailed(("%RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
1188 LogRel(("PGMPhysGCPhys2HCPtr %RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
1189 return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
1190 }
1191
1192 PPGMRAMRANGE pRam;
1193 PPGMPAGE pPage;
1194 int rc = pgmPhysGetPageAndRangeEx(&pVM->pgm.s, GCPhys, &pPage, &pRam);
1195 if (RT_FAILURE(rc))
1196 return rc;
1197
1198#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
1199 if (RT_UNLIKELY(PGM_PAGE_IS_RESERVED(pPage)))
1200 return VERR_PGM_PHYS_PAGE_RESERVED;
1201#endif
1202
1203 RTGCPHYS off = GCPhys - pRam->GCPhys;
1204 if (RT_UNLIKELY(off + cbRange > pRam->cb))
1205 {
1206 AssertMsgFailed(("%RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys + cbRange));
1207 return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
1208 }
1209
1210 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1211 {
1212 unsigned iChunk = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1213#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) /* ASSUMES this is a rare occurence */
1214 PRTR3UINTPTR paChunkR3Ptrs = (PRTR3UINTPTR)MMHyperR3ToCC(pVM, pRam->paChunkR3Ptrs);
1215 *pR3Ptr = (RTR3PTR)(paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1216#else
1217 *pR3Ptr = (RTR3PTR)(pRam->paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1218#endif
1219 }
1220 else if (RT_LIKELY(pRam->pvR3))
1221 *pR3Ptr = (RTR3PTR)((RTR3UINTPTR)pRam->pvR3 + off);
1222 else
1223 return VERR_PGM_PHYS_PAGE_RESERVED;
1224 return VINF_SUCCESS;
1225#endif /* !VBOX_WITH_NEW_PHYS_CODE */
1226}
1227
1228
1229#ifdef VBOX_STRICT
1230/**
1231 * PGMPhysGCPhys2R3Ptr convenience for use with assertions.
1232 *
1233 * @returns The R3Ptr, NIL_RTR3PTR on failure.
1234 * @param pVM The VM handle.
1235 * @param GCPhys The GC Physical addresss.
1236 * @param cbRange Physical range.
1237 *
1238 * @deprecated Avoid when possible.
1239 */
1240VMMDECL(RTR3PTR) PGMPhysGCPhys2R3PtrAssert(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange)
1241{
1242 RTR3PTR R3Ptr;
1243 int rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys, cbRange, &R3Ptr);
1244 if (RT_SUCCESS(rc))
1245 return R3Ptr;
1246 return NIL_RTR3PTR;
1247}
1248#endif /* VBOX_STRICT */
1249
1250
1251/**
1252 * Converts a guest pointer to a GC physical address.
1253 *
1254 * This uses the current CR3/CR0/CR4 of the guest.
1255 *
1256 * @returns VBox status code.
1257 * @param pVM The VM Handle
1258 * @param GCPtr The guest pointer to convert.
1259 * @param pGCPhys Where to store the GC physical address.
1260 */
1261VMMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
1262{
1263 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, pGCPhys);
1264 if (pGCPhys && RT_SUCCESS(rc))
1265 *pGCPhys |= (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
1266 return rc;
1267}
1268
1269
1270/**
1271 * Converts a guest pointer to a HC physical address.
1272 *
1273 * This uses the current CR3/CR0/CR4 of the guest.
1274 *
1275 * @returns VBox status code.
1276 * @param pVM The VM Handle
1277 * @param GCPtr The guest pointer to convert.
1278 * @param pHCPhys Where to store the HC physical address.
1279 */
1280VMMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys)
1281{
1282 RTGCPHYS GCPhys;
1283 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
1284 if (RT_SUCCESS(rc))
1285 rc = PGMPhysGCPhys2HCPhys(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), pHCPhys);
1286 return rc;
1287}
1288
1289
1290/**
1291 * Converts a guest pointer to a R3 pointer.
1292 *
1293 * This uses the current CR3/CR0/CR4 of the guest.
1294 *
1295 * @returns VBox status code.
1296 * @param pVM The VM Handle
1297 * @param GCPtr The guest pointer to convert.
1298 * @param pR3Ptr Where to store the R3 virtual address.
1299 *
1300 * @deprecated Don't use this.
1301 */
1302VMMDECL(int) PGMPhysGCPtr2R3Ptr(PVM pVM, RTGCPTR GCPtr, PRTR3PTR pR3Ptr)
1303{
1304#ifdef VBOX_WITH_NEW_PHYS_CODE
1305 VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
1306#endif
1307
1308 RTGCPHYS GCPhys;
1309 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
1310 if (RT_SUCCESS(rc))
1311 rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pR3Ptr);
1312 return rc;
1313}
1314
1315
1316
1317#undef LOG_GROUP
1318#define LOG_GROUP LOG_GROUP_PGM_PHYS_ACCESS
1319
1320
1321#ifdef IN_RING3
1322/**
1323 * Cache PGMPhys memory access
1324 *
1325 * @param pVM VM Handle.
1326 * @param pCache Cache structure pointer
1327 * @param GCPhys GC physical address
1328 * @param pbHC HC pointer corresponding to physical page
1329 *
1330 * @thread EMT.
1331 */
1332static void pgmPhysCacheAdd(PVM pVM, PGMPHYSCACHE *pCache, RTGCPHYS GCPhys, uint8_t *pbR3)
1333{
1334 uint32_t iCacheIndex;
1335
1336 Assert(VM_IS_EMT(pVM));
1337
1338 GCPhys = PHYS_PAGE_ADDRESS(GCPhys);
1339 pbR3 = (uint8_t *)PAGE_ADDRESS(pbR3);
1340
1341 iCacheIndex = ((GCPhys >> PAGE_SHIFT) & PGM_MAX_PHYSCACHE_ENTRIES_MASK);
1342
1343 ASMBitSet(&pCache->aEntries, iCacheIndex);
1344
1345 pCache->Entry[iCacheIndex].GCPhys = GCPhys;
1346 pCache->Entry[iCacheIndex].pbR3 = pbR3;
1347}
1348#endif /* IN_RING3 */
1349
1350#ifdef VBOX_WITH_NEW_PHYS_CODE
1351
1352/**
1353 * Deals with reading from a page with one or more ALL access handlers.
1354 *
1355 * @param pVM The VM handle.
1356 * @param pPage The page descriptor.
1357 * @param GCPhys The physical address to start reading at.
1358 * @param pvBuf Where to put the bits we read.
1359 * @param cb How much to read - less or equal to a page.
1360 */
1361static void pgmPhysReadHandler(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void *pvBuf, size_t cb)
1362{
1363 /*
1364 * The most frequent access here is MMIO and shadowed ROM.
1365 *
1366 * The current code ASSUMES all these access handlers are page sized
1367 * and that we do NOT use any virtual ones.
1368 */
1369 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_ALL
1370 && PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) != PGM_PAGE_HNDL_VIRT_STATE_ALL)
1371 {
1372#ifdef IN_RING3
1373 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1374 AssertReleaseMsg(pCur, ("GCPhys=%RGp cb=%#x\n", GCPhys, cb));
1375 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1376 Assert(pCur->CTX_SUFF(pfnHandler));
1377
1378 const void *pvSrc;
1379 int rc = pgmPhysGCPhys2CCPtrInternalReadOnly(pVM, pPage, GCPhys, &pvSrc);
1380 if (RT_SUCCESS(rc))
1381 {
1382 STAM_PROFILE_START(&pCur->Stat, h);
1383 int rc = pCur->CTX_SUFF(pfnHandler)(pVM, GCPhys, (void *)pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, pCur->CTX_SUFF(pvUser));
1384 STAM_PROFILE_STOP(&pCur->Stat, h);
1385 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1386 memcpy(pvBuf, pvSrc, cb);
1387 else
1388 AssertLogRelMsg(rc == VINF_SUCCESS, ("rc=%Rrc GCPhys=%RGp\n", rc, GCPhys));
1389 }
1390 else
1391 {
1392 AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternalReadOnly failed on %RGp / %R[pgmpage] -> %Rrc\n",
1393 GCPhys, pPage, rc));
1394 memset(pvBuf, 0xff, cb);
1395 }
1396#else
1397 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cb));
1398#endif
1399 }
1400 else
1401 AssertReleaseMsgFailed(("ALL access virtual handlers are not implemented here\n"));
1402}
1403
1404
1405/**
1406 * Read physical memory.
1407 *
1408 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
1409 * want to ignore those.
1410 *
1411 * @param pVM VM Handle.
1412 * @param GCPhys Physical address start reading from.
1413 * @param pvBuf Where to put the read bits.
1414 * @param cbRead How many bytes to read.
1415 */
1416VMMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1417{
1418 AssertMsgReturnVoid(cbRead > 0, ("don't even think about reading zero bytes!\n"));
1419 LogFlow(("PGMPhysRead: %RGp %d\n", GCPhys, cbRead));
1420
1421 pgmLock(pVM);
1422
1423 /*
1424 * Copy loop on ram ranges.
1425 */
1426 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
1427 for (;;)
1428 {
1429 /* Find range. */
1430 while (pRam && GCPhys > pRam->GCPhysLast)
1431 pRam = pRam->CTX_SUFF(pNext);
1432 /* Inside range or not? */
1433 if (pRam && GCPhys >= pRam->GCPhys)
1434 {
1435 /*
1436 * Must work our way thru this page by page.
1437 */
1438 RTGCPHYS off = GCPhys - pRam->GCPhys;
1439 while (off < pRam->cb)
1440 {
1441 unsigned iPage = off >> PAGE_SHIFT;
1442 PPGMPAGE pPage = &pRam->aPages[iPage];
1443 size_t cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1444 if (cb > cbRead)
1445 cb = cbRead;
1446
1447 /*
1448 * Any ALL access handlers?
1449 */
1450 if (RT_UNLIKELY(PGM_PAGE_HAS_ACTIVE_ALL_HANDLERS(pPage)))
1451 pgmPhysReadHandler(pVM, pPage, pRam->GCPhys + off, pvBuf, cb);
1452 else
1453 {
1454 /*
1455 * Get the pointer to the page.
1456 */
1457 const void *pvSrc;
1458 int rc = pgmPhysGCPhys2CCPtrInternalReadOnly(pVM, pPage, pRam->GCPhys + off, &pvSrc);
1459 if (RT_SUCCESS(rc))
1460 memcpy(pvBuf, pvSrc, cb);
1461 else
1462 AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternalReadOnly failed on %RGp / %R[pgmpage] -> %Rrc\n",
1463 pRam->GCPhys + off, pPage, rc));
1464 }
1465
1466 /* next page */
1467 if (cb >= cbRead)
1468 {
1469 pgmUnlock(pVM);
1470 return;
1471 }
1472 cbRead -= cb;
1473 off += cb;
1474 pvBuf = (char *)pvBuf + cb;
1475 } /* walk pages in ram range. */
1476
1477 GCPhys = pRam->GCPhysLast + 1;
1478 }
1479 else
1480 {
1481 LogFlow(("PGMPhysRead: Unassigned %RGp size=%u\n", GCPhys, cbRead));
1482
1483 /*
1484 * Unassigned address space.
1485 */
1486 if (!pRam)
1487 break;
1488 size_t cb = pRam->GCPhys - GCPhys;
1489 if (cb >= cbRead)
1490 {
1491#if 0 /** @todo enable this later. */
1492 memset(pvBuf, 0xff, cbRead);
1493#else
1494 memset(pvBuf, 0, cbRead);
1495#endif
1496 break;
1497 }
1498
1499#if 0 /** @todo enable this later. */
1500 memset(pvBuf, 0xff, cb);
1501#else
1502 memset(pvBuf, 0, cb);
1503#endif
1504 cbRead -= cb;
1505 pvBuf = (char *)pvBuf + cb;
1506 GCPhys += cb;
1507 }
1508 } /* Ram range walk */
1509
1510 pgmUnlock(pVM);
1511}
1512
1513#else /* Old PGMPhysRead */
1514
1515/**
1516 * Read physical memory.
1517 *
1518 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
1519 * want to ignore those.
1520 *
1521 * @param pVM VM Handle.
1522 * @param GCPhys Physical address start reading from.
1523 * @param pvBuf Where to put the read bits.
1524 * @param cbRead How many bytes to read.
1525 */
1526VMMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1527{
1528#ifdef IN_RING3
1529 bool fGrabbedLock = false;
1530#endif
1531
1532 AssertMsg(cbRead > 0, ("don't even think about reading zero bytes!\n"));
1533 if (cbRead == 0)
1534 return;
1535
1536 LogFlow(("PGMPhysRead: %RGp %d\n", GCPhys, cbRead));
1537
1538#ifdef IN_RING3
1539 if (!VM_IS_EMT(pVM))
1540 {
1541 pgmLock(pVM);
1542 fGrabbedLock = true;
1543 }
1544#endif
1545
1546 /*
1547 * Copy loop on ram ranges.
1548 */
1549 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
1550 for (;;)
1551 {
1552 /* Find range. */
1553 while (pRam && GCPhys > pRam->GCPhysLast)
1554 pRam = pRam->CTX_SUFF(pNext);
1555 /* Inside range or not? */
1556 if (pRam && GCPhys >= pRam->GCPhys)
1557 {
1558 /*
1559 * Must work our way thru this page by page.
1560 */
1561 RTGCPHYS off = GCPhys - pRam->GCPhys;
1562 while (off < pRam->cb)
1563 {
1564 unsigned iPage = off >> PAGE_SHIFT;
1565 PPGMPAGE pPage = &pRam->aPages[iPage];
1566 size_t cb;
1567
1568 /* Physical chunk in dynamically allocated range not present? */
1569 if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
1570 {
1571 /* Treat it as reserved; return zeros */
1572 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1573 if (cb >= cbRead)
1574 {
1575 memset(pvBuf, 0, cbRead);
1576 goto l_End;
1577 }
1578 memset(pvBuf, 0, cb);
1579 }
1580 /* temp hacks, will be reorganized. */
1581 /*
1582 * Physical handler.
1583 */
1584 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_ALL)
1585 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1586 {
1587 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1588 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1589
1590#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1591 /* find and call the handler */
1592 PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
1593 if (pNode && pNode->pfnHandlerR3)
1594 {
1595 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1596 if (cbRange < cb)
1597 cb = cbRange;
1598 if (cb > cbRead)
1599 cb = cbRead;
1600
1601 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1602
1603 /* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1604 rc = pNode->pfnHandlerR3(pVM, GCPhys, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, pNode->pvUserR3);
1605 }
1606#endif /* IN_RING3 */
1607 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1608 {
1609#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1610 void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1611#else
1612 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1613#endif
1614
1615 if (cb >= cbRead)
1616 {
1617 memcpy(pvBuf, pvSrc, cbRead);
1618 goto l_End;
1619 }
1620 memcpy(pvBuf, pvSrc, cb);
1621 }
1622 else if (cb >= cbRead)
1623 goto l_End;
1624 }
1625 /*
1626 * Virtual handlers.
1627 */
1628 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) >= PGM_PAGE_HNDL_VIRT_STATE_ALL)
1629 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1630 {
1631 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1632 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1633#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1634 /* Search the whole tree for matching physical addresses (rather expensive!) */
1635 PPGMVIRTHANDLER pNode;
1636 unsigned iPage;
1637 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1638 if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3)
1639 {
1640 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1641 if (cbRange < cb)
1642 cb = cbRange;
1643 if (cb > cbRead)
1644 cb = cbRead;
1645 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->Core.Key & PAGE_BASE_GC_MASK)
1646 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1647
1648 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1649
1650 /* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1651 rc = pNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, 0);
1652 }
1653#endif /* IN_RING3 */
1654 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1655 {
1656#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1657 void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1658#else
1659 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1660#endif
1661 if (cb >= cbRead)
1662 {
1663 memcpy(pvBuf, pvSrc, cbRead);
1664 goto l_End;
1665 }
1666 memcpy(pvBuf, pvSrc, cb);
1667 }
1668 else if (cb >= cbRead)
1669 goto l_End;
1670 }
1671 else
1672 {
1673 switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM)) /** @todo PAGE FLAGS */
1674 {
1675 /*
1676 * Normal memory or ROM.
1677 */
1678 case 0:
1679 case MM_RAM_FLAGS_ROM:
1680 case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_RESERVED:
1681 //case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO2: /* = shadow */ - //MMIO2 isn't in the mask.
1682 case MM_RAM_FLAGS_MMIO2: // MMIO2 isn't in the mask.
1683 {
1684#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1685 void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1686#else
1687 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1688#endif
1689 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1690 if (cb >= cbRead)
1691 {
1692#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1693 if (cbRead <= 4 && !fGrabbedLock /* i.e. EMT */)
1694 pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphysreadcache, GCPhys, (uint8_t*)pvSrc);
1695#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1696 memcpy(pvBuf, pvSrc, cbRead);
1697 goto l_End;
1698 }
1699 memcpy(pvBuf, pvSrc, cb);
1700 break;
1701 }
1702
1703 /*
1704 * All reserved, nothing there.
1705 */
1706 case MM_RAM_FLAGS_RESERVED:
1707 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1708 if (cb >= cbRead)
1709 {
1710 memset(pvBuf, 0, cbRead);
1711 goto l_End;
1712 }
1713 memset(pvBuf, 0, cb);
1714 break;
1715
1716 /*
1717 * The rest needs to be taken more carefully.
1718 */
1719 default:
1720#if 1 /** @todo r=bird: Can you do this properly please. */
1721 /** @todo Try MMIO; quick hack */
1722 if (cbRead <= 8 && IOMMMIORead(pVM, GCPhys, (uint32_t *)pvBuf, cbRead) == VINF_SUCCESS)
1723 goto l_End;
1724#endif
1725
1726 /** @todo fix me later. */
1727 AssertReleaseMsgFailed(("Unknown read at %RGp size %u implement the complex physical reading case %RHp\n",
1728 GCPhys, cbRead,
1729 pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM))); /** @todo PAGE FLAGS */
1730 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1731 break;
1732 }
1733 }
1734
1735 cbRead -= cb;
1736 off += cb;
1737 pvBuf = (char *)pvBuf + cb;
1738 }
1739
1740 GCPhys = pRam->GCPhysLast + 1;
1741 }
1742 else
1743 {
1744 LogFlow(("PGMPhysRead: Unassigned %RGp size=%u\n", GCPhys, cbRead));
1745
1746 /*
1747 * Unassigned address space.
1748 */
1749 size_t cb;
1750 if ( !pRam
1751 || (cb = pRam->GCPhys - GCPhys) >= cbRead)
1752 {
1753 memset(pvBuf, 0, cbRead);
1754 goto l_End;
1755 }
1756
1757 memset(pvBuf, 0, cb); /** @todo this is wrong, unassigne == 0xff not 0x00! */
1758 cbRead -= cb;
1759 pvBuf = (char *)pvBuf + cb;
1760 GCPhys += cb;
1761 }
1762 }
1763l_End:
1764#ifdef IN_RING3
1765 if (fGrabbedLock)
1766 pgmUnlock(pVM);
1767#endif
1768 return;
1769}
1770
1771#endif /* Old PGMPhysRead */
1772#ifdef VBOX_WITH_NEW_PHYS_CODE
1773
1774/**
1775 * Deals with writing to a page with one or more WRITE or ALL access handlers.
1776 *
1777 * @param pVM The VM handle.
1778 * @param pPage The page descriptor.
1779 * @param GCPhys The physical address to start writing at.
1780 * @param pvBuf What to write.
1781 * @param cbWrite How much to write - less or equal to a page.
1782 */
1783static void pgmPhysWriteHandler(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void const *pvBuf, size_t cbWrite)
1784{
1785 void *pvDst = NULL;
1786 int rc;
1787
1788 /*
1789 * Give priority to physical handlers (like #PF does).
1790 *
1791 * Hope for a lonely physical handler first that covers the whole
1792 * write area. This should be a pretty frequent case with MMIO and
1793 * the heavy usage of full page handlers in the page pool.
1794 */
1795 if ( !PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage)
1796 || PGM_PAGE_IS_MMIO(pPage) /* screw virtual handlers on MMIO pages */)
1797 {
1798 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1799 if (pCur)
1800 {
1801 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1802 Assert(pCur->CTX_SUFF(pfnHandler));
1803
1804 size_t cbRange = pCur->Core.KeyLast - GCPhys + 1;
1805 if (cbRange > cbWrite)
1806 cbRange = cbWrite;
1807
1808#ifdef IN_RING3
1809 if (!PGM_PAGE_IS_MMIO(pPage))
1810 rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, &pvDst);
1811 else
1812 rc = VINF_SUCCESS;
1813 if (RT_SUCCESS(rc))
1814 {
1815 STAM_PROFILE_START(&pCur->Stat, h);
1816 rc = pCur->CTX_SUFF(pfnHandler)(pVM, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, pCur->CTX_SUFF(pvUser));
1817 STAM_PROFILE_STOP(&pCur->Stat, h);
1818 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1819 memcpy(pvDst, pvBuf, cbRange);
1820 else
1821 AssertLogRelMsg(rc == VINF_SUCCESS, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pCur->pszDesc));
1822 }
1823 else
1824 AssertLogRelMsgFailedReturnVoid(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
1825 GCPhys, pPage, rc));
1826#else
1827 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
1828#endif
1829 if (RT_LIKELY(cbRange == cbWrite))
1830 return;
1831
1832 /* more fun to be had below */
1833 cbWrite -= cbRange;
1834 GCPhys += cbRange;
1835 pvBuf = (uint8_t *)pvBuf + cbRange;
1836 pvDst = (uint8_t *)pvDst + cbRange;
1837 }
1838 /* else: the handler is somewhere else in the page, deal with it below. */
1839 Assert(!PGM_PAGE_IS_MMIO(pPage)); /* MMIO handlers are all PAGE_SIZEed! */
1840 }
1841 /*
1842 * A virtual handler without any interfering physical handlers.
1843 * Hopefully it'll conver the whole write.
1844 */
1845 else if (!PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage))
1846 {
1847 unsigned iPage;
1848 PPGMVIRTHANDLER pCur;
1849 rc = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pCur, &iPage);
1850 if (RT_SUCCESS(rc))
1851 {
1852 size_t cbRange = (PAGE_OFFSET_MASK & pCur->Core.KeyLast) - (PAGE_OFFSET_MASK & GCPhys) + 1;
1853 if (cbRange > cbWrite)
1854 cbRange = cbWrite;
1855
1856#ifdef IN_RING3
1857 rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, &pvDst);
1858 if (RT_SUCCESS(rc))
1859 {
1860 rc = VINF_PGM_HANDLER_DO_DEFAULT;
1861 if (pCur->pfnHandlerR3)
1862 {
1863 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pCur->Core.Key & PAGE_BASE_GC_MASK)
1864 + (iPage << PAGE_SHIFT)
1865 + (GCPhys & PAGE_OFFSET_MASK);
1866
1867 STAM_PROFILE_START(&pCur->Stat, h);
1868 rc = pCur->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
1869 STAM_PROFILE_STOP(&pCur->Stat, h);
1870 }
1871 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1872 memcpy(pvDst, pvBuf, cbRange);
1873 else
1874 AssertLogRelMsg(rc == VINF_SUCCESS, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pCur->pszDesc));
1875 }
1876 else
1877 AssertLogRelMsgFailedReturnVoid(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
1878 GCPhys, pPage, rc));
1879#else
1880 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cbRange));
1881#endif
1882 if (RT_LIKELY(cbRange == cbWrite))
1883 return;
1884
1885 /* more fun to be had below */
1886 cbWrite -= cbRange;
1887 GCPhys += cbRange;
1888 pvBuf = (uint8_t *)pvBuf + cbRange;
1889 pvDst = (uint8_t *)pvDst + cbRange;
1890 }
1891 /* else: the handler is somewhere else in the page, deal with it below. */
1892 }
1893
1894 /*
1895 * Deal with all the odd ends.
1896 */
1897
1898 /* We need a writable destination page. */
1899 if (!pvDst)
1900 {
1901 rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, &pvDst);
1902 AssertLogRelMsgReturnVoid(RT_SUCCESS(rc),
1903 ("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
1904 GCPhys, pPage, rc));
1905 }
1906
1907 /* The loop state (big + ugly). */
1908 unsigned iVirtPage = 0;
1909 PPGMVIRTHANDLER pVirt = NULL;
1910 uint32_t offVirt = PAGE_SIZE;
1911 uint32_t offVirtLast = PAGE_SIZE;
1912 bool fMoreVirt = PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage);
1913
1914 PPGMPHYSHANDLER pPhys = NULL;
1915 uint32_t offPhys = PAGE_SIZE;
1916 uint32_t offPhysLast = PAGE_SIZE;
1917 bool fMorePhys = PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage);
1918
1919 /* The loop. */
1920 for (;;)
1921 {
1922 /*
1923 * Find the closest handler at or above GCPhys.
1924 */
1925 if (fMoreVirt && !pVirt)
1926 {
1927 int rc = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pVirt, &iVirtPage);
1928 if (RT_SUCCESS(rc))
1929 {
1930 offVirt = 0;
1931 offVirtLast = (pVirt->aPhysToVirt[iVirtPage].Core.KeyLast & PAGE_OFFSET_MASK) - (GCPhys & PAGE_OFFSET_MASK);
1932 }
1933 else
1934 {
1935 PPGMPHYS2VIRTHANDLER pVirtPhys;
1936 pVirtPhys = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
1937 GCPhys, true /* fAbove */);
1938 if (pVirtPhys)
1939 {
1940 /* ASSUME that pVirtPhys only covers one page. */
1941 Assert((pVirtPhys->Core.Key >> PAGE_SHIFT) == (pVirtPhys->Core.KeyLast >> PAGE_SHIFT));
1942 pVirt = (PPGMVIRTHANDLER)((uintptr_t)pVirtPhys + pVirtPhys->offVirtHandler);
1943 iVirtPage = pVirtPhys - &pVirt->aPhysToVirt[0]; Assert(iVirtPage == 0);
1944 offVirtLast = pVirtPhys->Core.KeyLast & PAGE_OFFSET_MASK - (GCPhys & PAGE_OFFSET_MASK);
1945 }
1946 else
1947 {
1948 pVirt = NULL;
1949 fMoreVirt = false;
1950 offVirt = offVirtLast = PAGE_SIZE;
1951 }
1952 }
1953 }
1954
1955 if (fMorePhys && !pPhys)
1956 {
1957 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1958 if (pPhys)
1959 {
1960 offPhys = 0;
1961 offPhysLast = pPhys->Core.KeyLast - GCPhys; /* ASSUMES < 4GB handlers... */
1962 }
1963 else
1964 {
1965 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers,
1966 GCPhys, true /* fAbove */);
1967 if ( pPhys
1968 && pPhys->Core.Key <= GCPhys + (cbWrite - 1))
1969 {
1970 offPhys = pPhys->Core.Key - GCPhys;
1971 offPhysLast = pPhys->Core.KeyLast - GCPhys; /* ASSUMES < 4GB handlers... */
1972 }
1973 else
1974 {
1975 pPhys = NULL;
1976 fMorePhys = false;
1977 offPhys = offPhysLast = PAGE_SIZE;
1978 }
1979 }
1980 }
1981
1982 /*
1983 * Handle access to space without handlers (that's easy).
1984 */
1985 rc = VINF_PGM_HANDLER_DO_DEFAULT;
1986 size_t cbRange = cbWrite;
1987 if (offPhys && offVirt)
1988 {
1989 if (cbRange > offPhys)
1990 cbRange = offPhys;
1991 if (cbRange > offVirt)
1992 cbRange = offVirt;
1993 }
1994 /*
1995 * Physical handler.
1996 */
1997 else if (!offPhys && offVirt)
1998 {
1999 if (cbRange > offPhysLast + 1)
2000 cbRange = offPhysLast + 1;
2001 if (cbRange > offVirt)
2002 cbRange = offVirt;
2003#ifdef IN_RING3
2004 STAM_PROFILE_START(&pPhys->Stat, h);
2005 rc = pPhys->CTX_SUFF(pfnHandler)(pVM, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, pPhys->CTX_SUFF(pvUser));
2006 STAM_PROFILE_STOP(&pPhys->Stat, h);
2007 AssertLogRelMsg(rc != VINF_SUCCESS && rc != VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pPhys->pszDesc));
2008#else
2009 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
2010#endif
2011 pPhys = NULL;
2012 }
2013 /*
2014 * Virtual handler.
2015 */
2016 else if (offPhys && !offVirt)
2017 {
2018 if (cbRange > offVirtLast + 1)
2019 cbRange = offVirtLast + 1;
2020 if (cbRange > offPhys)
2021 cbRange = offPhys;
2022#ifdef IN_RING3
2023 if (pVirt->pfnHandlerR3)
2024 {
2025 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirt->Core.Key & PAGE_BASE_GC_MASK)
2026 + (iVirtPage << PAGE_SHIFT)
2027 + (GCPhys & PAGE_OFFSET_MASK);
2028 STAM_PROFILE_START(&pVirt->Stat, h);
2029 rc = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
2030 STAM_PROFILE_STOP(&pVirt->Stat, h);
2031 AssertLogRelMsg(rc != VINF_SUCCESS && rc != VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pVirt->pszDesc));
2032 }
2033#else
2034 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cbRange));
2035#endif
2036 pVirt = NULL;
2037 }
2038 /*
2039 * Both... give the physical one priority.
2040 */
2041 else
2042 {
2043 Assert(!offPhys && !offVirt);
2044 if (cbRange > offVirtLast + 1)
2045 cbRange = offVirtLast + 1;
2046 if (cbRange > offPhysLast + 1)
2047 cbRange = offPhysLast + 1;
2048
2049#ifdef IN_RING3
2050 if (pVirt->pfnHandlerR3)
2051 Log(("pgmPhysWriteHandler: overlapping phys and virt handlers at %RGp %R[pgmpage]; cbRange=%#x\n", GCPhys, pPage, cbRange));
2052
2053 STAM_PROFILE_START(&pPhys->Stat, h);
2054 rc = pPhys->CTX_SUFF(pfnHandler)(pVM, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, pPhys->CTX_SUFF(pvUser));
2055 STAM_PROFILE_STOP(&pPhys->Stat, h);
2056 AssertLogRelMsg(rc != VINF_SUCCESS && rc != VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pPhys->pszDesc));
2057 if (pVirt->pfnHandlerR3)
2058 {
2059
2060 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirt->Core.Key & PAGE_BASE_GC_MASK)
2061 + (iVirtPage << PAGE_SHIFT)
2062 + (GCPhys & PAGE_OFFSET_MASK);
2063 STAM_PROFILE_START(&pVirt->Stat, h);
2064 int rc2 = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
2065 STAM_PROFILE_STOP(&pVirt->Stat, h);
2066 AssertLogRelMsg(rc2 != VINF_SUCCESS && rc2 != VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pVirt->pszDesc));
2067 if (rc2 == VINF_SUCCESS && rc == VINF_PGM_HANDLER_DO_DEFAULT)
2068 rc = VINF_SUCCESS;
2069 }
2070#else
2071 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
2072#endif
2073 pPhys = NULL;
2074 pVirt = NULL;
2075 }
2076 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
2077 memcpy(pvDst, pvBuf, cbRange);
2078
2079 /*
2080 * Advance if we've got more stuff to do.
2081 */
2082 if (cbRange >= cbWrite)
2083 return;
2084
2085 cbWrite -= cbRange;
2086 GCPhys += cbRange;
2087 pvBuf = (uint8_t *)pvBuf + cbRange;
2088 pvDst = (uint8_t *)pvDst + cbRange;
2089
2090 offPhys -= cbRange;
2091 offPhysLast -= cbRange;
2092 offVirt -= cbRange;
2093 offVirtLast -= cbRange;
2094 }
2095}
2096
2097
2098/**
2099 * Write to physical memory.
2100 *
2101 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
2102 * want to ignore those.
2103 *
2104 * @param pVM VM Handle.
2105 * @param GCPhys Physical address to write to.
2106 * @param pvBuf What to write.
2107 * @param cbWrite How many bytes to write.
2108 */
2109VMMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2110{
2111 AssertMsg(!pVM->pgm.s.fNoMorePhysWrites, ("Calling PGMPhysWrite after pgmR3Save()!\n"));
2112 AssertMsgReturnVoid(cbWrite > 0, ("don't even think about writing zero bytes!\n"));
2113 LogFlow(("PGMPhysWrite: %RGp %d\n", GCPhys, cbWrite));
2114
2115 pgmLock(pVM);
2116
2117 /*
2118 * Copy loop on ram ranges.
2119 */
2120 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
2121 for (;;)
2122 {
2123 /* Find range. */
2124 while (pRam && GCPhys > pRam->GCPhysLast)
2125 pRam = pRam->CTX_SUFF(pNext);
2126 /* Inside range or not? */
2127 if (pRam && GCPhys >= pRam->GCPhys)
2128 {
2129 /*
2130 * Must work our way thru this page by page.
2131 */
2132 RTGCPTR off = GCPhys - pRam->GCPhys;
2133 while (off < pRam->cb)
2134 {
2135 RTGCPTR iPage = off >> PAGE_SHIFT;
2136 PPGMPAGE pPage = &pRam->aPages[iPage];
2137 size_t cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2138 if (cb > cbWrite)
2139 cb = cbWrite;
2140
2141 /*
2142 * Any active WRITE or ALL access handlers?
2143 */
2144 if (PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage))
2145 pgmPhysWriteHandler(pVM, pPage, pRam->GCPhys + off, pvBuf, cb);
2146 else
2147 {
2148 /*
2149 * Get the pointer to the page.
2150 */
2151 void *pvDst;
2152 int rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, pRam->GCPhys + off, &pvDst);
2153 if (RT_SUCCESS(rc))
2154 memcpy(pvDst, pvBuf, cb);
2155 else
2156 AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
2157 pRam->GCPhys + off, pPage, rc));
2158 }
2159
2160 /* next page */
2161 if (cb >= cbWrite)
2162 {
2163 pgmUnlock(pVM);
2164 return;
2165 }
2166
2167 cbWrite -= cb;
2168 off += cb;
2169 pvBuf = (const char *)pvBuf + cb;
2170 } /* walk pages in ram range */
2171
2172 GCPhys = pRam->GCPhysLast + 1;
2173 }
2174 else
2175 {
2176 /*
2177 * Unassigned address space, skip it.
2178 */
2179 if (!pRam)
2180 break;
2181 size_t cb = pRam->GCPhys - GCPhys;
2182 if (cb >= cbWrite)
2183 break;
2184 cbWrite -= cb;
2185 pvBuf = (const char *)pvBuf + cb;
2186 GCPhys += cb;
2187 }
2188 } /* Ram range walk */
2189
2190 pgmUnlock(pVM);
2191}
2192
2193#else /* Old PGMPhysWrite */
2194
2195/**
2196 * Write to physical memory.
2197 *
2198 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
2199 * want to ignore those.
2200 *
2201 * @param pVM VM Handle.
2202 * @param GCPhys Physical address to write to.
2203 * @param pvBuf What to write.
2204 * @param cbWrite How many bytes to write.
2205 */
2206VMMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2207{
2208#ifdef IN_RING3
2209 bool fGrabbedLock = false;
2210#endif
2211
2212 AssertMsg(!pVM->pgm.s.fNoMorePhysWrites, ("Calling PGMPhysWrite after pgmR3Save()!\n"));
2213 AssertMsg(cbWrite > 0, ("don't even think about writing zero bytes!\n"));
2214 if (cbWrite == 0)
2215 return;
2216
2217 LogFlow(("PGMPhysWrite: %RGp %d\n", GCPhys, cbWrite));
2218
2219#ifdef IN_RING3
2220 if (!VM_IS_EMT(pVM))
2221 {
2222 pgmLock(pVM);
2223 fGrabbedLock = true;
2224 }
2225#endif
2226 /*
2227 * Copy loop on ram ranges.
2228 */
2229 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
2230 for (;;)
2231 {
2232 /* Find range. */
2233 while (pRam && GCPhys > pRam->GCPhysLast)
2234 pRam = pRam->CTX_SUFF(pNext);
2235 /* Inside range or not? */
2236 if (pRam && GCPhys >= pRam->GCPhys)
2237 {
2238 /*
2239 * Must work our way thru this page by page.
2240 */
2241 RTGCPTR off = GCPhys - pRam->GCPhys;
2242 while (off < pRam->cb)
2243 {
2244 RTGCPTR iPage = off >> PAGE_SHIFT;
2245 PPGMPAGE pPage = &pRam->aPages[iPage];
2246
2247 /* Physical chunk in dynamically allocated range not present? */
2248 if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
2249 {
2250 int rc;
2251#ifdef IN_RING3
2252 if (fGrabbedLock)
2253 {
2254 pgmUnlock(pVM);
2255 rc = pgmr3PhysGrowRange(pVM, GCPhys);
2256 if (rc == VINF_SUCCESS)
2257 PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite); /* try again; can't assume pRam is still valid (paranoia) */
2258 return;
2259 }
2260 rc = pgmr3PhysGrowRange(pVM, GCPhys);
2261#else
2262 rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2263#endif
2264 if (rc != VINF_SUCCESS)
2265 goto l_End;
2266 }
2267
2268 size_t cb;
2269 /* temporary hack, will reogranize is later. */
2270 /*
2271 * Virtual handlers
2272 */
2273 if ( PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage)
2274 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
2275 {
2276 if (PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage))
2277 {
2278 /*
2279 * Physical write handler + virtual write handler.
2280 * Consider this a quick workaround for the CSAM + shadow caching problem.
2281 *
2282 * We hand it to the shadow caching first since it requires the unchanged
2283 * data. CSAM will have to put up with it already being changed.
2284 */
2285 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
2286 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2287#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
2288 /* 1. The physical handler */
2289 PPGMPHYSHANDLER pPhysNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
2290 if (pPhysNode && pPhysNode->pfnHandlerR3)
2291 {
2292 size_t cbRange = pPhysNode->Core.KeyLast - GCPhys + 1;
2293 if (cbRange < cb)
2294 cb = cbRange;
2295 if (cb > cbWrite)
2296 cb = cbWrite;
2297
2298 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2299
2300 /* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
2301 rc = pPhysNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pPhysNode->pvUserR3);
2302 }
2303
2304 /* 2. The virtual handler (will see incorrect data) */
2305 PPGMVIRTHANDLER pVirtNode;
2306 unsigned iPage;
2307 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pVirtNode, &iPage);
2308 if (RT_SUCCESS(rc2) && pVirtNode->pfnHandlerR3)
2309 {
2310 size_t cbRange = pVirtNode->Core.KeyLast - GCPhys + 1;
2311 if (cbRange < cb)
2312 cb = cbRange;
2313 if (cb > cbWrite)
2314 cb = cbWrite;
2315 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirtNode->Core.Key & PAGE_BASE_GC_MASK)
2316 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
2317
2318 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2319
2320 /* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
2321 rc2 = pVirtNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
2322 if ( ( rc2 != VINF_PGM_HANDLER_DO_DEFAULT
2323 && rc == VINF_PGM_HANDLER_DO_DEFAULT)
2324 || ( RT_FAILURE(rc2)
2325 && RT_SUCCESS(rc)))
2326 rc = rc2;
2327 }
2328#endif /* IN_RING3 */
2329 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
2330 {
2331#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
2332 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
2333#else
2334 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2335#endif
2336 if (cb >= cbWrite)
2337 {
2338 memcpy(pvDst, pvBuf, cbWrite);
2339 goto l_End;
2340 }
2341 memcpy(pvDst, pvBuf, cb);
2342 }
2343 else if (cb >= cbWrite)
2344 goto l_End;
2345 }
2346 else
2347 {
2348 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
2349 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2350#ifdef IN_RING3
2351/** @todo deal with this in GC and R0! */
2352 /* Search the whole tree for matching physical addresses (rather expensive!) */
2353 PPGMVIRTHANDLER pNode;
2354 unsigned iPage;
2355 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
2356 if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3)
2357 {
2358 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
2359 if (cbRange < cb)
2360 cb = cbRange;
2361 if (cb > cbWrite)
2362 cb = cbWrite;
2363 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->Core.Key & PAGE_BASE_GC_MASK)
2364 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
2365
2366 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2367
2368 /* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
2369 rc = pNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
2370 }
2371#endif /* IN_RING3 */
2372 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
2373 {
2374#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
2375 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
2376#else
2377 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2378#endif
2379 if (cb >= cbWrite)
2380 {
2381 memcpy(pvDst, pvBuf, cbWrite);
2382 goto l_End;
2383 }
2384 memcpy(pvDst, pvBuf, cb);
2385 }
2386 else if (cb >= cbWrite)
2387 goto l_End;
2388 }
2389 }
2390 /*
2391 * Physical handler.
2392 */
2393 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_WRITE)
2394 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
2395 {
2396 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
2397 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2398#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
2399 /* find and call the handler */
2400 PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
2401 if (pNode && pNode->pfnHandlerR3)
2402 {
2403 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
2404 if (cbRange < cb)
2405 cb = cbRange;
2406 if (cb > cbWrite)
2407 cb = cbWrite;
2408
2409 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2410
2411 /** @todo Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
2412 rc = pNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pNode->pvUserR3);
2413 }
2414#endif /* IN_RING3 */
2415 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
2416 {
2417#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
2418 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
2419#else
2420 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2421#endif
2422 if (cb >= cbWrite)
2423 {
2424 memcpy(pvDst, pvBuf, cbWrite);
2425 goto l_End;
2426 }
2427 memcpy(pvDst, pvBuf, cb);
2428 }
2429 else if (cb >= cbWrite)
2430 goto l_End;
2431 }
2432 else
2433 {
2434 /** @todo r=bird: missing MM_RAM_FLAGS_ROM here, we shall not allow anyone to overwrite the ROM! */
2435 switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)) /** @todo PAGE FLAGS */
2436 {
2437 /*
2438 * Normal memory, MMIO2 or writable shadow ROM.
2439 */
2440 case 0:
2441 case MM_RAM_FLAGS_MMIO2:
2442 case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO2: /* shadow rom */
2443 {
2444#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
2445 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
2446#else
2447 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2448#endif
2449 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2450 if (cb >= cbWrite)
2451 {
2452#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
2453 if (cbWrite <= 4 && !fGrabbedLock /* i.e. EMT */)
2454 pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphyswritecache, GCPhys, (uint8_t*)pvDst);
2455#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
2456 memcpy(pvDst, pvBuf, cbWrite);
2457 goto l_End;
2458 }
2459 memcpy(pvDst, pvBuf, cb);
2460 break;
2461 }
2462
2463 /*
2464 * All reserved, nothing there.
2465 */
2466 case MM_RAM_FLAGS_RESERVED:
2467 case MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO2:
2468 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2469 if (cb >= cbWrite)
2470 goto l_End;
2471 break;
2472
2473
2474 /*
2475 * The rest needs to be taken more carefully.
2476 */
2477 default:
2478#if 1 /** @todo r=bird: Can you do this properly please. */
2479 /** @todo Try MMIO; quick hack */
2480 if (cbWrite <= 8 && IOMMMIOWrite(pVM, GCPhys, *(uint32_t *)pvBuf, cbWrite) == VINF_SUCCESS)
2481 goto l_End;
2482#endif
2483
2484 /** @todo fix me later. */
2485 AssertReleaseMsgFailed(("Unknown write at %RGp size %u implement the complex physical writing case %RHp\n",
2486 GCPhys, cbWrite,
2487 (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)))); /** @todo PAGE FLAGS */
2488 /* skip the write */
2489 cb = cbWrite;
2490 break;
2491 }
2492 }
2493
2494 cbWrite -= cb;
2495 off += cb;
2496 pvBuf = (const char *)pvBuf + cb;
2497 }
2498
2499 GCPhys = pRam->GCPhysLast + 1;
2500 }
2501 else
2502 {
2503 /*
2504 * Unassigned address space.
2505 */
2506 size_t cb;
2507 if ( !pRam
2508 || (cb = pRam->GCPhys - GCPhys) >= cbWrite)
2509 goto l_End;
2510
2511 cbWrite -= cb;
2512 pvBuf = (const char *)pvBuf + cb;
2513 GCPhys += cb;
2514 }
2515 }
2516l_End:
2517#ifdef IN_RING3
2518 if (fGrabbedLock)
2519 pgmUnlock(pVM);
2520#endif
2521 return;
2522}
2523
2524#endif /* Old PGMPhysWrite */
2525
2526/**
2527 * Read from guest physical memory by GC physical address, bypassing
2528 * MMIO and access handlers.
2529 *
2530 * @returns VBox status.
2531 * @param pVM VM handle.
2532 * @param pvDst The destination address.
2533 * @param GCPhysSrc The source address (GC physical address).
2534 * @param cb The number of bytes to read.
2535 */
2536VMMDECL(int) PGMPhysSimpleReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb)
2537{
2538 /*
2539 * Treat the first page as a special case.
2540 */
2541 if (!cb)
2542 return VINF_SUCCESS;
2543
2544 /* map the 1st page */
2545 void const *pvSrc;
2546 PGMPAGEMAPLOCK Lock;
2547 int rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhysSrc, &pvSrc, &Lock);
2548 if (RT_FAILURE(rc))
2549 return rc;
2550
2551 /* optimize for the case where access is completely within the first page. */
2552 size_t cbPage = PAGE_SIZE - (GCPhysSrc & PAGE_OFFSET_MASK);
2553 if (RT_LIKELY(cb <= cbPage))
2554 {
2555 memcpy(pvDst, pvSrc, cb);
2556 PGMPhysReleasePageMappingLock(pVM, &Lock);
2557 return VINF_SUCCESS;
2558 }
2559
2560 /* copy to the end of the page. */
2561 memcpy(pvDst, pvSrc, cbPage);
2562 PGMPhysReleasePageMappingLock(pVM, &Lock);
2563 GCPhysSrc += cbPage;
2564 pvDst = (uint8_t *)pvDst + cbPage;
2565 cb -= cbPage;
2566
2567 /*
2568 * Page by page.
2569 */
2570 for (;;)
2571 {
2572 /* map the page */
2573 rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhysSrc, &pvSrc, &Lock);
2574 if (RT_FAILURE(rc))
2575 return rc;
2576
2577 /* last page? */
2578 if (cb <= PAGE_SIZE)
2579 {
2580 memcpy(pvDst, pvSrc, cb);
2581 PGMPhysReleasePageMappingLock(pVM, &Lock);
2582 return VINF_SUCCESS;
2583 }
2584
2585 /* copy the entire page and advance */
2586 memcpy(pvDst, pvSrc, PAGE_SIZE);
2587 PGMPhysReleasePageMappingLock(pVM, &Lock);
2588 GCPhysSrc += PAGE_SIZE;
2589 pvDst = (uint8_t *)pvDst + PAGE_SIZE;
2590 cb -= PAGE_SIZE;
2591 }
2592 /* won't ever get here. */
2593}
2594
2595#ifndef IN_RC /* Ring 0 & 3 only. (Just not needed in GC.) */
2596
2597/**
2598 * Write to guest physical memory referenced by GC pointer.
2599 * Write memory to GC physical address in guest physical memory.
2600 *
2601 * This will bypass MMIO and access handlers.
2602 *
2603 * @returns VBox status.
2604 * @param pVM VM handle.
2605 * @param GCPhysDst The GC physical address of the destination.
2606 * @param pvSrc The source buffer.
2607 * @param cb The number of bytes to write.
2608 */
2609VMMDECL(int) PGMPhysSimpleWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb)
2610{
2611 LogFlow(("PGMPhysSimpleWriteGCPhys: %RGp %zu\n", GCPhysDst, cb));
2612
2613 /*
2614 * Treat the first page as a special case.
2615 */
2616 if (!cb)
2617 return VINF_SUCCESS;
2618
2619 /* map the 1st page */
2620 void *pvDst;
2621 PGMPAGEMAPLOCK Lock;
2622 int rc = PGMPhysGCPhys2CCPtr(pVM, GCPhysDst, &pvDst, &Lock);
2623 if (RT_FAILURE(rc))
2624 return rc;
2625
2626 /* optimize for the case where access is completely within the first page. */
2627 size_t cbPage = PAGE_SIZE - (GCPhysDst & PAGE_OFFSET_MASK);
2628 if (RT_LIKELY(cb <= cbPage))
2629 {
2630 memcpy(pvDst, pvSrc, cb);
2631 PGMPhysReleasePageMappingLock(pVM, &Lock);
2632 return VINF_SUCCESS;
2633 }
2634
2635 /* copy to the end of the page. */
2636 memcpy(pvDst, pvSrc, cbPage);
2637 PGMPhysReleasePageMappingLock(pVM, &Lock);
2638 GCPhysDst += cbPage;
2639 pvSrc = (const uint8_t *)pvSrc + cbPage;
2640 cb -= cbPage;
2641
2642 /*
2643 * Page by page.
2644 */
2645 for (;;)
2646 {
2647 /* map the page */
2648 rc = PGMPhysGCPhys2CCPtr(pVM, GCPhysDst, &pvDst, &Lock);
2649 if (RT_FAILURE(rc))
2650 return rc;
2651
2652 /* last page? */
2653 if (cb <= PAGE_SIZE)
2654 {
2655 memcpy(pvDst, pvSrc, cb);
2656 PGMPhysReleasePageMappingLock(pVM, &Lock);
2657 return VINF_SUCCESS;
2658 }
2659
2660 /* copy the entire page and advance */
2661 memcpy(pvDst, pvSrc, PAGE_SIZE);
2662 PGMPhysReleasePageMappingLock(pVM, &Lock);
2663 GCPhysDst += PAGE_SIZE;
2664 pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2665 cb -= PAGE_SIZE;
2666 }
2667 /* won't ever get here. */
2668}
2669
2670
2671/**
2672 * Read from guest physical memory referenced by GC pointer.
2673 *
2674 * This function uses the current CR3/CR0/CR4 of the guest and will
2675 * bypass access handlers and not set any accessed bits.
2676 *
2677 * @returns VBox status.
2678 * @param pVM VM handle.
2679 * @param pvDst The destination address.
2680 * @param GCPtrSrc The source address (GC pointer).
2681 * @param cb The number of bytes to read.
2682 */
2683VMMDECL(int) PGMPhysSimpleReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
2684{
2685 /*
2686 * Treat the first page as a special case.
2687 */
2688 if (!cb)
2689 return VINF_SUCCESS;
2690
2691 /* map the 1st page */
2692 void const *pvSrc;
2693 PGMPAGEMAPLOCK Lock;
2694 int rc = PGMPhysGCPtr2CCPtrReadOnly(pVM, GCPtrSrc, &pvSrc, &Lock);
2695 if (RT_FAILURE(rc))
2696 return rc;
2697
2698 /* optimize for the case where access is completely within the first page. */
2699 size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
2700 if (RT_LIKELY(cb <= cbPage))
2701 {
2702 memcpy(pvDst, pvSrc, cb);
2703 PGMPhysReleasePageMappingLock(pVM, &Lock);
2704 return VINF_SUCCESS;
2705 }
2706
2707 /* copy to the end of the page. */
2708 memcpy(pvDst, pvSrc, cbPage);
2709 PGMPhysReleasePageMappingLock(pVM, &Lock);
2710 GCPtrSrc = (RTGCPTR)((RTGCUINTPTR)GCPtrSrc + cbPage);
2711 pvDst = (uint8_t *)pvDst + cbPage;
2712 cb -= cbPage;
2713
2714 /*
2715 * Page by page.
2716 */
2717 for (;;)
2718 {
2719 /* map the page */
2720 rc = PGMPhysGCPtr2CCPtrReadOnly(pVM, GCPtrSrc, &pvSrc, &Lock);
2721 if (RT_FAILURE(rc))
2722 return rc;
2723
2724 /* last page? */
2725 if (cb <= PAGE_SIZE)
2726 {
2727 memcpy(pvDst, pvSrc, cb);
2728 PGMPhysReleasePageMappingLock(pVM, &Lock);
2729 return VINF_SUCCESS;
2730 }
2731
2732 /* copy the entire page and advance */
2733 memcpy(pvDst, pvSrc, PAGE_SIZE);
2734 PGMPhysReleasePageMappingLock(pVM, &Lock);
2735 GCPtrSrc = (RTGCPTR)((RTGCUINTPTR)GCPtrSrc + PAGE_SIZE);
2736 pvDst = (uint8_t *)pvDst + PAGE_SIZE;
2737 cb -= PAGE_SIZE;
2738 }
2739 /* won't ever get here. */
2740}
2741
2742
2743/**
2744 * Write to guest physical memory referenced by GC pointer.
2745 *
2746 * This function uses the current CR3/CR0/CR4 of the guest and will
2747 * bypass access handlers and not set dirty or accessed bits.
2748 *
2749 * @returns VBox status.
2750 * @param pVM VM handle.
2751 * @param GCPtrDst The destination address (GC pointer).
2752 * @param pvSrc The source address.
2753 * @param cb The number of bytes to write.
2754 */
2755VMMDECL(int) PGMPhysSimpleWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2756{
2757 /*
2758 * Treat the first page as a special case.
2759 */
2760 if (!cb)
2761 return VINF_SUCCESS;
2762
2763 /* map the 1st page */
2764 void *pvDst;
2765 PGMPAGEMAPLOCK Lock;
2766 int rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2767 if (RT_FAILURE(rc))
2768 return rc;
2769
2770 /* optimize for the case where access is completely within the first page. */
2771 size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2772 if (RT_LIKELY(cb <= cbPage))
2773 {
2774 memcpy(pvDst, pvSrc, cb);
2775 PGMPhysReleasePageMappingLock(pVM, &Lock);
2776 return VINF_SUCCESS;
2777 }
2778
2779 /* copy to the end of the page. */
2780 memcpy(pvDst, pvSrc, cbPage);
2781 PGMPhysReleasePageMappingLock(pVM, &Lock);
2782 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
2783 pvSrc = (const uint8_t *)pvSrc + cbPage;
2784 cb -= cbPage;
2785
2786 /*
2787 * Page by page.
2788 */
2789 for (;;)
2790 {
2791 /* map the page */
2792 rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2793 if (RT_FAILURE(rc))
2794 return rc;
2795
2796 /* last page? */
2797 if (cb <= PAGE_SIZE)
2798 {
2799 memcpy(pvDst, pvSrc, cb);
2800 PGMPhysReleasePageMappingLock(pVM, &Lock);
2801 return VINF_SUCCESS;
2802 }
2803
2804 /* copy the entire page and advance */
2805 memcpy(pvDst, pvSrc, PAGE_SIZE);
2806 PGMPhysReleasePageMappingLock(pVM, &Lock);
2807 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
2808 pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2809 cb -= PAGE_SIZE;
2810 }
2811 /* won't ever get here. */
2812}
2813
2814
2815/**
2816 * Write to guest physical memory referenced by GC pointer and update the PTE.
2817 *
2818 * This function uses the current CR3/CR0/CR4 of the guest and will
2819 * bypass access handlers but will set any dirty and accessed bits in the PTE.
2820 *
2821 * If you don't want to set the dirty bit, use PGMPhysSimpleWriteGCPtr().
2822 *
2823 * @returns VBox status.
2824 * @param pVM VM handle.
2825 * @param GCPtrDst The destination address (GC pointer).
2826 * @param pvSrc The source address.
2827 * @param cb The number of bytes to write.
2828 */
2829VMMDECL(int) PGMPhysSimpleDirtyWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2830{
2831 /*
2832 * Treat the first page as a special case.
2833 * Btw. this is the same code as in PGMPhyssimpleWriteGCPtr excep for the PGMGstModifyPage.
2834 */
2835 if (!cb)
2836 return VINF_SUCCESS;
2837
2838 /* map the 1st page */
2839 void *pvDst;
2840 PGMPAGEMAPLOCK Lock;
2841 int rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2842 if (RT_FAILURE(rc))
2843 return rc;
2844
2845 /* optimize for the case where access is completely within the first page. */
2846 size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2847 if (RT_LIKELY(cb <= cbPage))
2848 {
2849 memcpy(pvDst, pvSrc, cb);
2850 PGMPhysReleasePageMappingLock(pVM, &Lock);
2851 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2852 return VINF_SUCCESS;
2853 }
2854
2855 /* copy to the end of the page. */
2856 memcpy(pvDst, pvSrc, cbPage);
2857 PGMPhysReleasePageMappingLock(pVM, &Lock);
2858 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2859 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
2860 pvSrc = (const uint8_t *)pvSrc + cbPage;
2861 cb -= cbPage;
2862
2863 /*
2864 * Page by page.
2865 */
2866 for (;;)
2867 {
2868 /* map the page */
2869 rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2870 if (RT_FAILURE(rc))
2871 return rc;
2872
2873 /* last page? */
2874 if (cb <= PAGE_SIZE)
2875 {
2876 memcpy(pvDst, pvSrc, cb);
2877 PGMPhysReleasePageMappingLock(pVM, &Lock);
2878 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2879 return VINF_SUCCESS;
2880 }
2881
2882 /* copy the entire page and advance */
2883 memcpy(pvDst, pvSrc, PAGE_SIZE);
2884 PGMPhysReleasePageMappingLock(pVM, &Lock);
2885 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2886 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
2887 pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2888 cb -= PAGE_SIZE;
2889 }
2890 /* won't ever get here. */
2891}
2892
2893
2894/**
2895 * Read from guest physical memory referenced by GC pointer.
2896 *
2897 * This function uses the current CR3/CR0/CR4 of the guest and will
2898 * respect access handlers and set accessed bits.
2899 *
2900 * @returns VBox status.
2901 * @param pVM VM handle.
2902 * @param pvDst The destination address.
2903 * @param GCPtrSrc The source address (GC pointer).
2904 * @param cb The number of bytes to read.
2905 */
2906VMMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
2907{
2908 RTGCPHYS GCPhys;
2909 int rc;
2910
2911 /*
2912 * Anything to do?
2913 */
2914 if (!cb)
2915 return VINF_SUCCESS;
2916
2917 LogFlow(("PGMPhysReadGCPtr: %RGv %zu\n", GCPtrSrc, cb));
2918
2919 /*
2920 * Optimize reads within a single page.
2921 */
2922 if (((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2923 {
2924 /* Convert virtual to physical address */
2925 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2926 AssertRCReturn(rc, rc);
2927
2928 /* mark the guest page as accessed. */
2929 rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2930 AssertRC(rc);
2931
2932 PGMPhysRead(pVM, GCPhys, pvDst, cb);
2933 return VINF_SUCCESS;
2934 }
2935
2936 /*
2937 * Page by page.
2938 */
2939 for (;;)
2940 {
2941 /* Convert virtual to physical address */
2942 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2943 AssertRCReturn(rc, rc);
2944
2945 /* mark the guest page as accessed. */
2946 int rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2947 AssertRC(rc);
2948
2949 /* copy */
2950 size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
2951 if (cbRead >= cb)
2952 {
2953 PGMPhysRead(pVM, GCPhys, pvDst, cb);
2954 return VINF_SUCCESS;
2955 }
2956 PGMPhysRead(pVM, GCPhys, pvDst, cbRead);
2957
2958 /* next */
2959 cb -= cbRead;
2960 pvDst = (uint8_t *)pvDst + cbRead;
2961 GCPtrSrc += cbRead;
2962 }
2963}
2964
2965
2966/**
2967 * Write to guest physical memory referenced by GC pointer.
2968 *
2969 * This function uses the current CR3/CR0/CR4 of the guest and will
2970 * respect access handlers and set dirty and accessed bits.
2971 *
2972 * @returns VBox status.
2973 * @param pVM VM handle.
2974 * @param GCPtrDst The destination address (GC pointer).
2975 * @param pvSrc The source address.
2976 * @param cb The number of bytes to write.
2977 */
2978VMMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2979{
2980 RTGCPHYS GCPhys;
2981 int rc;
2982
2983 /*
2984 * Anything to do?
2985 */
2986 if (!cb)
2987 return VINF_SUCCESS;
2988
2989 LogFlow(("PGMPhysWriteGCPtr: %RGv %zu\n", GCPtrDst, cb));
2990
2991 /*
2992 * Optimize writes within a single page.
2993 */
2994 if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2995 {
2996 /* Convert virtual to physical address */
2997 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
2998 AssertMsgRCReturn(rc, ("PGMPhysGCPtr2GCPhys failed with %Rrc for %RGv\n", rc, GCPtrDst), rc);
2999
3000 /* mark the guest page as accessed and dirty. */
3001 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
3002 AssertRC(rc);
3003
3004 PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
3005 return VINF_SUCCESS;
3006 }
3007
3008 /*
3009 * Page by page.
3010 */
3011 for (;;)
3012 {
3013 /* Convert virtual to physical address */
3014 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
3015 AssertRCReturn(rc, rc);
3016
3017 /* mark the guest page as accessed and dirty. */
3018 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
3019 AssertRC(rc);
3020
3021 /* copy */
3022 size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
3023 if (cbWrite >= cb)
3024 {
3025 PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
3026 return VINF_SUCCESS;
3027 }
3028 PGMPhysWrite(pVM, GCPhys, pvSrc, cbWrite);
3029
3030 /* next */
3031 cb -= cbWrite;
3032 pvSrc = (uint8_t *)pvSrc + cbWrite;
3033 GCPtrDst += cbWrite;
3034 }
3035}
3036
3037#endif /* !IN_RC */
3038
3039/**
3040 * Performs a read of guest virtual memory for instruction emulation.
3041 *
3042 * This will check permissions, raise exceptions and update the access bits.
3043 *
3044 * The current implementation will bypass all access handlers. It may later be
3045 * changed to at least respect MMIO.
3046 *
3047 *
3048 * @returns VBox status code suitable to scheduling.
3049 * @retval VINF_SUCCESS if the read was performed successfully.
3050 * @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
3051 * @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
3052 *
3053 * @param pVM The VM handle.
3054 * @param pCtxCore The context core.
3055 * @param pvDst Where to put the bytes we've read.
3056 * @param GCPtrSrc The source address.
3057 * @param cb The number of bytes to read. Not more than a page.
3058 *
3059 * @remark This function will dynamically map physical pages in GC. This may unmap
3060 * mappings done by the caller. Be careful!
3061 */
3062VMMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb)
3063{
3064 Assert(cb <= PAGE_SIZE);
3065
3066/** @todo r=bird: This isn't perfect!
3067 * -# It's not checking for reserved bits being 1.
3068 * -# It's not correctly dealing with the access bit.
3069 * -# It's not respecting MMIO memory or any other access handlers.
3070 */
3071 /*
3072 * 1. Translate virtual to physical. This may fault.
3073 * 2. Map the physical address.
3074 * 3. Do the read operation.
3075 * 4. Set access bits if required.
3076 */
3077 int rc;
3078 unsigned cb1 = PAGE_SIZE - (GCPtrSrc & PAGE_OFFSET_MASK);
3079 if (cb <= cb1)
3080 {
3081 /*
3082 * Not crossing pages.
3083 */
3084 RTGCPHYS GCPhys;
3085 uint64_t fFlags;
3086 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags, &GCPhys);
3087 if (RT_SUCCESS(rc))
3088 {
3089 /** @todo we should check reserved bits ... */
3090 void *pvSrc;
3091 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys, &pvSrc);
3092 switch (rc)
3093 {
3094 case VINF_SUCCESS:
3095 Log(("PGMPhysInterpretedRead: pvDst=%p pvSrc=%p cb=%d\n", pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb));
3096 memcpy(pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb);
3097 break;
3098 case VERR_PGM_PHYS_PAGE_RESERVED:
3099 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
3100 memset(pvDst, 0, cb); /** @todo this is wrong, it should be 0xff */
3101 break;
3102 default:
3103 return rc;
3104 }
3105
3106 /** @todo access bit emulation isn't 100% correct. */
3107 if (!(fFlags & X86_PTE_A))
3108 {
3109 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
3110 AssertRC(rc);
3111 }
3112 return VINF_SUCCESS;
3113 }
3114 }
3115 else
3116 {
3117 /*
3118 * Crosses pages.
3119 */
3120 size_t cb2 = cb - cb1;
3121 uint64_t fFlags1;
3122 RTGCPHYS GCPhys1;
3123 uint64_t fFlags2;
3124 RTGCPHYS GCPhys2;
3125 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags1, &GCPhys1);
3126 if (RT_SUCCESS(rc))
3127 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
3128 if (RT_SUCCESS(rc))
3129 {
3130 /** @todo we should check reserved bits ... */
3131 AssertMsgFailed(("cb=%d cb1=%d cb2=%d GCPtrSrc=%RGv\n", cb, cb1, cb2, GCPtrSrc));
3132 void *pvSrc1;
3133 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys1, &pvSrc1);
3134 switch (rc)
3135 {
3136 case VINF_SUCCESS:
3137 memcpy(pvDst, (uint8_t *)pvSrc1 + (GCPtrSrc & PAGE_OFFSET_MASK), cb1);
3138 break;
3139 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
3140 memset(pvDst, 0, cb1); /** @todo this is wrong, it should be 0xff */
3141 break;
3142 default:
3143 return rc;
3144 }
3145
3146 void *pvSrc2;
3147 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys2, &pvSrc2);
3148 switch (rc)
3149 {
3150 case VINF_SUCCESS:
3151 memcpy((uint8_t *)pvDst + cb1, pvSrc2, cb2);
3152 break;
3153 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
3154 memset((uint8_t *)pvDst + cb1, 0, cb2); /** @todo this is wrong, it should be 0xff */
3155 break;
3156 default:
3157 return rc;
3158 }
3159
3160 if (!(fFlags1 & X86_PTE_A))
3161 {
3162 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
3163 AssertRC(rc);
3164 }
3165 if (!(fFlags2 & X86_PTE_A))
3166 {
3167 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
3168 AssertRC(rc);
3169 }
3170 return VINF_SUCCESS;
3171 }
3172 }
3173
3174 /*
3175 * Raise a #PF.
3176 */
3177 uint32_t uErr;
3178
3179 /* Get the current privilege level. */
3180 uint32_t cpl = CPUMGetGuestCPL(pVM, pCtxCore);
3181 switch (rc)
3182 {
3183 case VINF_SUCCESS:
3184 uErr = (cpl >= 2) ? X86_TRAP_PF_RSVD | X86_TRAP_PF_US : X86_TRAP_PF_RSVD;
3185 break;
3186
3187 case VERR_PAGE_NOT_PRESENT:
3188 case VERR_PAGE_TABLE_NOT_PRESENT:
3189 uErr = (cpl >= 2) ? X86_TRAP_PF_US : 0;
3190 break;
3191
3192 default:
3193 AssertMsgFailed(("rc=%Rrc GCPtrSrc=%RGv cb=%#x\n", rc, GCPtrSrc, cb));
3194 return rc;
3195 }
3196 Log(("PGMPhysInterpretedRead: GCPtrSrc=%RGv cb=%#x -> #PF(%#x)\n", GCPtrSrc, cb, uErr));
3197 return TRPMRaiseXcptErrCR2(pVM, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
3198}
3199
3200/// @todo VMMDECL(int) PGMPhysInterpretedWrite(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
3201
3202
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