VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp@ 17497

Last change on this file since 17497 was 17485, checked in by vboxsync, 16 years ago

Fixes to pgmPhysWriteHandler and PGMPhysGCPhys2R3Ptr (new phys code).

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File size: 111.6 KB
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1/* $Id: PGMAllPhys.cpp 17485 2009-03-06 16:13:27Z vboxsync $ */
2/** @file
3 * PGM - Page Manager and Monitor, Physical Memory Addressing.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.215389.xyz. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22/*******************************************************************************
23* Defined Constants And Macros *
24*******************************************************************************/
25/** @def PGM_IGNORE_RAM_FLAGS_RESERVED
26 * Don't respect the MM_RAM_FLAGS_RESERVED flag when converting to HC addresses.
27 *
28 * Since this flag is currently incorrectly kept set for ROM regions we will
29 * have to ignore it for now so we don't break stuff.
30 *
31 * @todo this has been fixed now I believe, remove this hack.
32 */
33#define PGM_IGNORE_RAM_FLAGS_RESERVED
34
35
36/*******************************************************************************
37* Header Files *
38*******************************************************************************/
39#define LOG_GROUP LOG_GROUP_PGM_PHYS
40#include <VBox/pgm.h>
41#include <VBox/trpm.h>
42#include <VBox/vmm.h>
43#include <VBox/iom.h>
44#include <VBox/em.h>
45#include <VBox/rem.h>
46#include "PGMInternal.h"
47#include <VBox/vm.h>
48#include <VBox/param.h>
49#include <VBox/err.h>
50#include <iprt/assert.h>
51#include <iprt/string.h>
52#include <iprt/asm.h>
53#include <VBox/log.h>
54#ifdef IN_RING3
55# include <iprt/thread.h>
56#endif
57
58
59
60#ifndef IN_RING3
61
62/**
63 * \#PF Handler callback for Guest ROM range write access.
64 * We simply ignore the writes or fall back to the recompiler if we don't support the instruction.
65 *
66 * @returns VBox status code (appropritate for trap handling and GC return).
67 * @param pVM VM Handle.
68 * @param uErrorCode CPU Error code.
69 * @param pRegFrame Trap register frame.
70 * @param pvFault The fault address (cr2).
71 * @param GCPhysFault The GC physical address corresponding to pvFault.
72 * @param pvUser User argument. Pointer to the ROM range structure.
73 */
74VMMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser)
75{
76 int rc;
77#ifdef VBOX_WITH_NEW_PHYS_CODE
78 PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser;
79 uint32_t iPage = GCPhysFault - pRom->GCPhys;
80 Assert(iPage < (pRom->cb >> PAGE_SHIFT));
81 switch (pRom->aPages[iPage].enmProt)
82 {
83 case PGMROMPROT_READ_ROM_WRITE_IGNORE:
84 case PGMROMPROT_READ_RAM_WRITE_IGNORE:
85 {
86#endif
87 /*
88 * If it's a simple instruction which doesn't change the cpu state
89 * we will simply skip it. Otherwise we'll have to defer it to REM.
90 */
91 uint32_t cbOp;
92 DISCPUSTATE Cpu;
93 rc = EMInterpretDisasOne(pVM, pRegFrame, &Cpu, &cbOp);
94 if ( RT_SUCCESS(rc)
95 && Cpu.mode == CPUMODE_32BIT /** @todo why does this matter? */
96 && !(Cpu.prefix & (PREFIX_REPNE | PREFIX_REP | PREFIX_SEG)))
97 {
98 switch (Cpu.opcode)
99 {
100 /** @todo Find other instructions we can safely skip, possibly
101 * adding this kind of detection to DIS or EM. */
102 case OP_MOV:
103 pRegFrame->rip += cbOp;
104 STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestROMWriteHandled);
105 return VINF_SUCCESS;
106 }
107 }
108 else if (RT_UNLIKELY(rc == VERR_INTERNAL_ERROR))
109 return rc;
110#ifdef VBOX_WITH_NEW_PHYS_CODE
111 break;
112 }
113
114 case PGMROMPROT_READ_RAM_WRITE_RAM:
115 rc = PGMHandlerPhysicalPageTempOff(pVM, pRom->GCPhys, GCPhysFault & X86_PTE_PG_MASK);
116 AssertRC(rc);
117 break; /** @todo Must restart the instruction, not use the interpreter! */
118
119 case PGMROMPROT_READ_ROM_WRITE_RAM:
120 /* Handle it in ring-3 because it's *way* easier there. */
121 break;
122
123 default:
124 AssertMsgFailedReturn(("enmProt=%d iPage=%d GCPhysFault=%RGp\n",
125 pRom->aPages[iPage].enmProt, iPage, GCPhysFault),
126 VERR_INTERNAL_ERROR);
127 }
128#endif
129
130 STAM_COUNTER_INC(&pVM->pgm.s.StatRZGuestROMWriteUnhandled);
131 return VINF_EM_RAW_EMULATE_INSTR;
132}
133
134#endif /* IN_RING3 */
135
136/**
137 * Checks if Address Gate 20 is enabled or not.
138 *
139 * @returns true if enabled.
140 * @returns false if disabled.
141 * @param pVM VM handle.
142 */
143VMMDECL(bool) PGMPhysIsA20Enabled(PVM pVM)
144{
145 LogFlow(("PGMPhysIsA20Enabled %d\n", pVM->pgm.s.fA20Enabled));
146 return !!pVM->pgm.s.fA20Enabled ; /* stupid MS compiler doesn't trust me. */
147}
148
149
150/**
151 * Validates a GC physical address.
152 *
153 * @returns true if valid.
154 * @returns false if invalid.
155 * @param pVM The VM handle.
156 * @param GCPhys The physical address to validate.
157 */
158VMMDECL(bool) PGMPhysIsGCPhysValid(PVM pVM, RTGCPHYS GCPhys)
159{
160 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
161 return pPage != NULL;
162}
163
164
165/**
166 * Checks if a GC physical address is a normal page,
167 * i.e. not ROM, MMIO or reserved.
168 *
169 * @returns true if normal.
170 * @returns false if invalid, ROM, MMIO or reserved page.
171 * @param pVM The VM handle.
172 * @param GCPhys The physical address to check.
173 */
174VMMDECL(bool) PGMPhysIsGCPhysNormal(PVM pVM, RTGCPHYS GCPhys)
175{
176 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhys);
177#ifdef VBOX_WITH_NEW_PHYS_CODE
178 return pPage
179 && PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_RAM;
180#else
181 return pPage
182 && !(pPage->HCPhys & (MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO2));
183#endif
184}
185
186
187/**
188 * Converts a GC physical address to a HC physical address.
189 *
190 * @returns VINF_SUCCESS on success.
191 * @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
192 * page but has no physical backing.
193 * @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
194 * GC physical address.
195 *
196 * @param pVM The VM handle.
197 * @param GCPhys The GC physical address to convert.
198 * @param pHCPhys Where to store the HC physical address on success.
199 */
200VMMDECL(int) PGMPhysGCPhys2HCPhys(PVM pVM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
201{
202 PPGMPAGE pPage;
203 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage);
204 if (RT_FAILURE(rc))
205 return rc;
206
207#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
208 if (RT_UNLIKELY(pPage->HCPhys & MM_RAM_FLAGS_RESERVED)) /** @todo PAGE FLAGS */
209 return VERR_PGM_PHYS_PAGE_RESERVED;
210#endif
211
212 *pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK);
213 return VINF_SUCCESS;
214}
215
216
217/**
218 * Invalidates the GC page mapping TLB.
219 *
220 * @param pVM The VM handle.
221 */
222VMMDECL(void) PGMPhysInvalidatePageGCMapTLB(PVM pVM)
223{
224 /* later */
225 NOREF(pVM);
226}
227
228
229/**
230 * Invalidates the ring-0 page mapping TLB.
231 *
232 * @param pVM The VM handle.
233 */
234VMMDECL(void) PGMPhysInvalidatePageR0MapTLB(PVM pVM)
235{
236 PGMPhysInvalidatePageR3MapTLB(pVM);
237}
238
239
240/**
241 * Invalidates the ring-3 page mapping TLB.
242 *
243 * @param pVM The VM handle.
244 */
245VMMDECL(void) PGMPhysInvalidatePageR3MapTLB(PVM pVM)
246{
247 pgmLock(pVM);
248 for (unsigned i = 0; i < RT_ELEMENTS(pVM->pgm.s.PhysTlbHC.aEntries); i++)
249 {
250 pVM->pgm.s.PhysTlbHC.aEntries[i].GCPhys = NIL_RTGCPHYS;
251 pVM->pgm.s.PhysTlbHC.aEntries[i].pPage = 0;
252 pVM->pgm.s.PhysTlbHC.aEntries[i].pMap = 0;
253 pVM->pgm.s.PhysTlbHC.aEntries[i].pv = 0;
254 }
255 pgmUnlock(pVM);
256}
257
258
259/**
260 * Makes sure that there is at least one handy page ready for use.
261 *
262 * This will also take the appropriate actions when reaching water-marks.
263 *
264 * @returns The following VBox status codes.
265 * @retval VINF_SUCCESS on success.
266 * @retval VERR_EM_NO_MEMORY if we're really out of memory.
267 *
268 * @param pVM The VM handle.
269 *
270 * @remarks Must be called from within the PGM critical section. It may
271 * nip back to ring-3/0 in some cases.
272 */
273static int pgmPhysEnsureHandyPage(PVM pVM)
274{
275 /** @remarks
276 * low-water mark logic for R0 & GC:
277 * - 75%: Set FF.
278 * - 50%: Force return to ring-3 ASAP.
279 *
280 * For ring-3 there is a little problem wrt to the recompiler, so:
281 * - 75%: Set FF.
282 * - 50%: Try allocate pages; on failure we'll force REM to quite ASAP.
283 *
284 * The basic idea is that we should be able to get out of any situation with
285 * only 50% of handy pages remaining.
286 *
287 * At the moment we'll not adjust the number of handy pages relative to the
288 * actual VM RAM committment, that's too much work for now.
289 */
290 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect));
291 Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
292 if ( !pVM->pgm.s.cHandyPages
293#ifdef IN_RING3
294 || pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2 /* 50% */
295#endif
296 )
297 {
298 Log(("PGM: cHandyPages=%u out of %u -> allocate more\n", pVM->pgm.s.cHandyPages, RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
299#ifdef IN_RING3
300 int rc = PGMR3PhysAllocateHandyPages(pVM);
301#elif defined(IN_RING0)
302 int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
303#else
304 int rc = VMMGCCallHost(pVM, VMMCALLHOST_PGM_ALLOCATE_HANDY_PAGES, 0);
305#endif
306 if (RT_UNLIKELY(rc != VINF_SUCCESS))
307 {
308 Assert(rc == VINF_EM_NO_MEMORY);
309 if (!pVM->pgm.s.cHandyPages)
310 {
311 LogRel(("PGM: no more handy pages!\n"));
312 return VERR_EM_NO_MEMORY;
313 }
314 Assert(VM_FF_ISSET(pVM, VM_FF_PGM_NEED_HANDY_PAGES));
315#ifdef IN_RING3
316 REMR3NotifyFF(pVM);
317#else
318 VM_FF_SET(pVM, VM_FF_TO_R3);
319#endif
320 }
321 Assert(pVM->pgm.s.cHandyPages <= RT_ELEMENTS(pVM->pgm.s.aHandyPages));
322 }
323 else if (pVM->pgm.s.cHandyPages - 1 <= (RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 4) * 3) /* 75% */
324 {
325 VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
326#ifndef IN_RING3
327 if (pVM->pgm.s.cHandyPages - 1 <= RT_ELEMENTS(pVM->pgm.s.aHandyPages) / 2)
328 {
329 Log(("PGM: VM_FF_TO_R3 - cHandyPages=%u out of %u\n", pVM->pgm.s.cHandyPages - 1, RT_ELEMENTS(pVM->pgm.s.aHandyPages)));
330 VM_FF_SET(pVM, VM_FF_TO_R3);
331 }
332#endif
333 }
334
335 return VINF_SUCCESS;
336}
337
338
339/**
340 * Replace a zero or shared page with new page that we can write to.
341 *
342 * @returns The following VBox status codes.
343 * @retval VINF_SUCCESS on success, pPage is modified.
344 * @retval VERR_EM_NO_MEMORY if we're totally out of memory.
345 *
346 * @todo Propagate VERR_EM_NO_MEMORY up the call tree.
347 *
348 * @param pVM The VM address.
349 * @param pPage The physical page tracking structure. This will
350 * be modified on success.
351 * @param GCPhys The address of the page.
352 *
353 * @remarks Must be called from within the PGM critical section. It may
354 * nip back to ring-3/0 in some cases.
355 *
356 * @remarks This function shouldn't really fail, however if it does
357 * it probably means we've screwed up the size of the amount
358 * and/or the low-water mark of handy pages. Or, that some
359 * device I/O is causing a lot of pages to be allocated while
360 * while the host is in a low-memory condition.
361 */
362int pgmPhysAllocPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
363{
364 LogFlow(("pgmPhysAllocPage: %R[pgmpage] %RGp\n", pPage, GCPhys));
365
366 /*
367 * Ensure that we've got a page handy, take it and use it.
368 */
369 int rc = pgmPhysEnsureHandyPage(pVM);
370 if (RT_FAILURE(rc))
371 {
372 Assert(rc == VERR_EM_NO_MEMORY);
373 return rc;
374 }
375 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect));
376 AssertMsg(PGM_PAGE_IS_ZERO(pPage) || PGM_PAGE_IS_SHARED(pPage), ("%d %RGp\n", PGM_PAGE_GET_STATE(pPage), GCPhys));
377 Assert(!PGM_PAGE_IS_MMIO(pPage));
378
379 uint32_t iHandyPage = --pVM->pgm.s.cHandyPages;
380 Assert(iHandyPage < RT_ELEMENTS(pVM->pgm.s.aHandyPages));
381 Assert(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys != NIL_RTHCPHYS);
382 Assert(!(pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys & ~X86_PTE_PAE_PG_MASK));
383 Assert(pVM->pgm.s.aHandyPages[iHandyPage].idPage != NIL_GMM_PAGEID);
384 Assert(pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage == NIL_GMM_PAGEID);
385
386 /*
387 * There are one or two action to be taken the next time we allocate handy pages:
388 * - Tell the GMM (global memory manager) what the page is being used for.
389 * (Speeds up replacement operations - sharing and defragmenting.)
390 * - If the current backing is shared, it must be freed.
391 */
392 const RTHCPHYS HCPhys = pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys;
393 pVM->pgm.s.aHandyPages[iHandyPage].HCPhysGCPhys = GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK;
394
395 if (PGM_PAGE_IS_SHARED(pPage))
396 {
397 pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage = PGM_PAGE_GET_PAGEID(pPage);
398 Assert(PGM_PAGE_GET_PAGEID(pPage) != NIL_GMM_PAGEID);
399 VM_FF_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES);
400
401 Log2(("PGM: Replaced shared page %#x at %RGp with %#x / %RHp\n", PGM_PAGE_GET_PAGEID(pPage),
402 GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
403 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,PageReplaceShared));
404 pVM->pgm.s.cSharedPages--;
405 AssertMsgFailed(("TODO: copy shared page content")); /** @todo err.. what about copying the page content? */
406 }
407 else
408 {
409 Log2(("PGM: Replaced zero page %RGp with %#x / %RHp\n", GCPhys, pVM->pgm.s.aHandyPages[iHandyPage].idPage, HCPhys));
410 STAM_COUNTER_INC(&pVM->pgm.s.StatRZPageReplaceZero);
411 pVM->pgm.s.cZeroPages--;
412 Assert(pVM->pgm.s.aHandyPages[iHandyPage].idSharedPage == NIL_GMM_PAGEID);
413 }
414
415 /*
416 * Do the PGMPAGE modifications.
417 */
418 pVM->pgm.s.cPrivatePages++;
419 PGM_PAGE_SET_HCPHYS(pPage, HCPhys);
420 PGM_PAGE_SET_PAGEID(pPage, pVM->pgm.s.aHandyPages[iHandyPage].idPage);
421 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
422
423 return VINF_SUCCESS;
424}
425
426
427/**
428 * Deal with pages that are not writable, i.e. not in the ALLOCATED state.
429 *
430 * @returns VBox status code.
431 * @retval VINF_SUCCESS on success.
432 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
433 *
434 * @param pVM The VM address.
435 * @param pPage The physical page tracking structure.
436 * @param GCPhys The address of the page.
437 *
438 * @remarks Called from within the PGM critical section.
439 */
440int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
441{
442 switch (PGM_PAGE_GET_STATE(pPage))
443 {
444 case PGM_PAGE_STATE_WRITE_MONITORED:
445 PGM_PAGE_SET_WRITTEN_TO(pPage);
446 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
447 /* fall thru */
448 default: /* to shut up GCC */
449 case PGM_PAGE_STATE_ALLOCATED:
450 return VINF_SUCCESS;
451
452 /*
453 * Zero pages can be dummy pages for MMIO or reserved memory,
454 * so we need to check the flags before joining cause with
455 * shared page replacement.
456 */
457 case PGM_PAGE_STATE_ZERO:
458 if (PGM_PAGE_IS_MMIO(pPage))
459 return VERR_PGM_PHYS_PAGE_RESERVED;
460 /* fall thru */
461 case PGM_PAGE_STATE_SHARED:
462 return pgmPhysAllocPage(pVM, pPage, GCPhys);
463 }
464}
465
466
467/**
468 * Wrapper for pgmPhysPageMakeWritable which enters the critsect.
469 *
470 * @returns VBox status code.
471 * @retval VINF_SUCCESS on success.
472 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
473 *
474 * @param pVM The VM address.
475 * @param pPage The physical page tracking structure.
476 * @param GCPhys The address of the page.
477 */
478int pgmPhysPageMakeWritableUnlocked(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys)
479{
480 int rc = pgmLock(pVM);
481 if (RT_SUCCESS(rc))
482 {
483 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
484 pgmUnlock(pVM);
485 }
486 return rc;
487}
488
489
490/**
491 * Internal usage: Map the page specified by its GMM ID.
492 *
493 * This is similar to pgmPhysPageMap
494 *
495 * @returns VBox status code.
496 *
497 * @param pVM The VM handle.
498 * @param idPage The Page ID.
499 * @param HCPhys The physical address (for RC).
500 * @param ppv Where to store the mapping address.
501 *
502 * @remarks Called from within the PGM critical section.
503 */
504int pgmPhysPageMapByPageID(PVM pVM, uint32_t idPage, RTHCPHYS HCPhys, void **ppv)
505{
506 /*
507 * Validation.
508 */
509 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect));
510 AssertReturn(HCPhys && !(HCPhys & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
511 const uint32_t idChunk = idPage >> GMM_CHUNKID_SHIFT;
512 AssertReturn(idChunk != NIL_GMM_CHUNKID, VERR_INVALID_PARAMETER);
513
514#ifdef IN_RC
515 /*
516 * Map it by HCPhys.
517 */
518 return PGMDynMapHCPage(pVM, HCPhys, ppv);
519
520#elif defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
521 /*
522 * Map it by HCPhys.
523 */
524 return pgmR0DynMapHCPageInlined(&pVM->pgm.s, HCPhys, ppv);
525
526#else
527 /*
528 * Find/make Chunk TLB entry for the mapping chunk.
529 */
530 PPGMCHUNKR3MAP pMap;
531 PPGMCHUNKR3MAPTLBE pTlbe = &pVM->pgm.s.ChunkR3Map.Tlb.aEntries[PGM_CHUNKR3MAPTLB_IDX(idChunk)];
532 if (pTlbe->idChunk == idChunk)
533 {
534 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbHits));
535 pMap = pTlbe->pChunk;
536 }
537 else
538 {
539 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbMisses));
540
541 /*
542 * Find the chunk, map it if necessary.
543 */
544 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
545 if (!pMap)
546 {
547# ifdef IN_RING0
548 int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_MAP_CHUNK, idChunk);
549 AssertRCReturn(rc, rc);
550 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
551 Assert(pMap);
552# else
553 int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap);
554 if (RT_FAILURE(rc))
555 return rc;
556# endif
557 }
558
559 /*
560 * Enter it into the Chunk TLB.
561 */
562 pTlbe->idChunk = idChunk;
563 pTlbe->pChunk = pMap;
564 pMap->iAge = 0;
565 }
566
567 *ppv = (uint8_t *)pMap->pv + ((idPage &GMM_PAGEID_IDX_MASK) << PAGE_SHIFT);
568 return VINF_SUCCESS;
569#endif
570}
571
572
573/**
574 * Maps a page into the current virtual address space so it can be accessed.
575 *
576 * @returns VBox status code.
577 * @retval VINF_SUCCESS on success.
578 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
579 *
580 * @param pVM The VM address.
581 * @param pPage The physical page tracking structure.
582 * @param GCPhys The address of the page.
583 * @param ppMap Where to store the address of the mapping tracking structure.
584 * @param ppv Where to store the mapping address of the page. The page
585 * offset is masked off!
586 *
587 * @remarks Called from within the PGM critical section.
588 */
589int pgmPhysPageMap(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv)
590{
591 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect));
592
593#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
594 /*
595 * Just some sketchy GC/R0-darwin code.
596 */
597 *ppMap = NULL;
598 RTHCPHYS HCPhys = PGM_PAGE_GET_HCPHYS(pPage);
599 Assert(HCPhys != pVM->pgm.s.HCPhysZeroPg);
600# ifdef VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0
601 pgmR0DynMapHCPageInlined(&pVM->pgm.s, HCPhys, ppv);
602# else
603 PGMDynMapHCPage(pVM, HCPhys, ppv);
604# endif
605 return VINF_SUCCESS;
606
607#else /* IN_RING3 || IN_RING0 */
608
609
610 /*
611 * Special case: ZERO and MMIO2 pages.
612 */
613 const uint32_t idChunk = PGM_PAGE_GET_CHUNKID(pPage);
614 if (idChunk == NIL_GMM_CHUNKID)
615 {
616 AssertMsgReturn(PGM_PAGE_GET_PAGEID(pPage) == NIL_GMM_PAGEID, ("pPage=%R[pgmpage]\n", pPage), VERR_INTERNAL_ERROR);
617 if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2)
618 {
619 /* Lookup the MMIO2 range and use pvR3 to calc the address. */
620 PPGMRAMRANGE pRam = pgmPhysGetRange(&pVM->pgm.s, GCPhys);
621 AssertMsgReturn(pRam || !pRam->pvR3, ("pRam=%p pPage=%R[pgmpage]\n", pRam, pPage), VERR_INTERNAL_ERROR);
622 *ppv = (void *)((uintptr_t)pRam->pvR3 + (GCPhys - pRam->GCPhys));
623 }
624 else if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
625 {
626 /** @todo deal with aliased MMIO2 pages somehow...
627 * One solution would be to seed MMIO2 pages to GMM and get unique Page IDs for
628 * them, that would also avoid this mess. It would actually be kind of
629 * elegant... */
630 AssertFailedReturn(VERR_INTERNAL_ERROR);
631 }
632 else
633 {
634 /** @todo handle MMIO2 */
635 AssertMsgReturn(PGM_PAGE_IS_ZERO(pPage), ("pPage=%R[pgmpage]\n", pPage), VERR_INTERNAL_ERROR);
636 AssertMsgReturn(PGM_PAGE_GET_HCPHYS(pPage) == pVM->pgm.s.HCPhysZeroPg,
637 ("pPage=%R[pgmpage]\n", pPage),
638 VERR_INTERNAL_ERROR);
639 *ppv = pVM->pgm.s.CTXALLSUFF(pvZeroPg);
640 }
641 *ppMap = NULL;
642 return VINF_SUCCESS;
643 }
644
645 /*
646 * Find/make Chunk TLB entry for the mapping chunk.
647 */
648 PPGMCHUNKR3MAP pMap;
649 PPGMCHUNKR3MAPTLBE pTlbe = &pVM->pgm.s.ChunkR3Map.Tlb.aEntries[PGM_CHUNKR3MAPTLB_IDX(idChunk)];
650 if (pTlbe->idChunk == idChunk)
651 {
652 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbHits));
653 pMap = pTlbe->pChunk;
654 }
655 else
656 {
657 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,ChunkR3MapTlbMisses));
658
659 /*
660 * Find the chunk, map it if necessary.
661 */
662 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
663 if (!pMap)
664 {
665#ifdef IN_RING0
666 int rc = VMMR0CallHost(pVM, VMMCALLHOST_PGM_MAP_CHUNK, idChunk);
667 AssertRCReturn(rc, rc);
668 pMap = (PPGMCHUNKR3MAP)RTAvlU32Get(&pVM->pgm.s.ChunkR3Map.pTree, idChunk);
669 Assert(pMap);
670#else
671 int rc = pgmR3PhysChunkMap(pVM, idChunk, &pMap);
672 if (RT_FAILURE(rc))
673 return rc;
674#endif
675 }
676
677 /*
678 * Enter it into the Chunk TLB.
679 */
680 pTlbe->idChunk = idChunk;
681 pTlbe->pChunk = pMap;
682 pMap->iAge = 0;
683 }
684
685 *ppv = (uint8_t *)pMap->pv + (PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) << PAGE_SHIFT);
686 *ppMap = pMap;
687 return VINF_SUCCESS;
688#endif /* IN_RING3 */
689}
690
691
692#if !defined(IN_RC) && !defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
693/**
694 * Load a guest page into the ring-3 physical TLB.
695 *
696 * @returns VBox status code.
697 * @retval VINF_SUCCESS on success
698 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
699 * @param pPGM The PGM instance pointer.
700 * @param GCPhys The guest physical address in question.
701 */
702int pgmPhysPageLoadIntoTlb(PPGM pPGM, RTGCPHYS GCPhys)
703{
704 STAM_COUNTER_INC(&pPGM->CTX_MID_Z(Stat,PageMapTlbMisses));
705
706 /*
707 * Find the ram range.
708 * 99.8% of requests are expected to be in the first range.
709 */
710 PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRanges);
711 RTGCPHYS off = GCPhys - pRam->GCPhys;
712 if (RT_UNLIKELY(off >= pRam->cb))
713 {
714 do
715 {
716 pRam = pRam->CTX_SUFF(pNext);
717 if (!pRam)
718 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
719 off = GCPhys - pRam->GCPhys;
720 } while (off >= pRam->cb);
721 }
722
723 /*
724 * Map the page.
725 * Make a special case for the zero page as it is kind of special.
726 */
727 PPGMPAGE pPage = &pRam->aPages[off >> PAGE_SHIFT];
728 PPGMPAGEMAPTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
729 if (!PGM_PAGE_IS_ZERO(pPage))
730 {
731 void *pv;
732 PPGMPAGEMAP pMap;
733 int rc = pgmPhysPageMap(PGM2VM(pPGM), pPage, GCPhys, &pMap, &pv);
734 if (RT_FAILURE(rc))
735 return rc;
736 pTlbe->pMap = pMap;
737 pTlbe->pv = pv;
738 }
739 else
740 {
741 Assert(PGM_PAGE_GET_HCPHYS(pPage) == pPGM->HCPhysZeroPg);
742 pTlbe->pMap = NULL;
743 pTlbe->pv = pPGM->CTXALLSUFF(pvZeroPg);
744 }
745 pTlbe->pPage = pPage;
746 return VINF_SUCCESS;
747}
748
749
750/**
751 * Load a guest page into the ring-3 physical TLB.
752 *
753 * @returns VBox status code.
754 * @retval VINF_SUCCESS on success
755 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
756 *
757 * @param pPGM The PGM instance pointer.
758 * @param pPage Pointer to the PGMPAGE structure corresponding to
759 * GCPhys.
760 * @param GCPhys The guest physical address in question.
761 */
762int pgmPhysPageLoadIntoTlbWithPage(PPGM pPGM, PPGMPAGE pPage, RTGCPHYS GCPhys)
763{
764 STAM_COUNTER_INC(&pPGM->CTX_MID_Z(Stat,PageMapTlbMisses));
765
766 /*
767 * Map the page.
768 * Make a special case for the zero page as it is kind of special.
769 */
770 PPGMPAGEMAPTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
771 if (!PGM_PAGE_IS_ZERO(pPage))
772 {
773 void *pv;
774 PPGMPAGEMAP pMap;
775 int rc = pgmPhysPageMap(PGM2VM(pPGM), pPage, GCPhys, &pMap, &pv);
776 if (RT_FAILURE(rc))
777 return rc;
778 pTlbe->pMap = pMap;
779 pTlbe->pv = pv;
780 }
781 else
782 {
783 Assert(PGM_PAGE_GET_HCPHYS(pPage) == pPGM->HCPhysZeroPg);
784 pTlbe->pMap = NULL;
785 pTlbe->pv = pPGM->CTXALLSUFF(pvZeroPg);
786 }
787 pTlbe->pPage = pPage;
788 return VINF_SUCCESS;
789}
790#endif /* !IN_RC && !VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0 */
791
792
793/**
794 * Internal version of PGMPhysGCPhys2CCPtr that expects the caller to
795 * own the PGM lock and therefore not need to lock the mapped page.
796 *
797 * @returns VBox status code.
798 * @retval VINF_SUCCESS on success.
799 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
800 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
801 *
802 * @param pVM The VM handle.
803 * @param GCPhys The guest physical address of the page that should be mapped.
804 * @param pPage Pointer to the PGMPAGE structure for the page.
805 * @param ppv Where to store the address corresponding to GCPhys.
806 *
807 * @internal
808 */
809int pgmPhysGCPhys2CCPtrInternal(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void **ppv)
810{
811 int rc;
812 AssertReturn(pPage, VERR_INTERNAL_ERROR);
813 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect) || VM_IS_EMT(pVM));
814
815 /*
816 * Make sure the page is writable.
817 */
818 if (RT_UNLIKELY(PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED))
819 {
820 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
821 if (RT_FAILURE(rc))
822 return rc;
823 }
824 Assert(PGM_PAGE_GET_HCPHYS(pPage) != 0);
825
826 /*
827 * Get the mapping address.
828 */
829#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
830 *ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK));
831#else
832 PPGMPAGEMAPTLBE pTlbe;
833 rc = pgmPhysPageQueryTlbeWithPage(&pVM->pgm.s, pPage, GCPhys, &pTlbe);
834 if (RT_FAILURE(rc))
835 return rc;
836 *ppv = (void *)((uintptr_t)pTlbe->pv | (GCPhys & PAGE_OFFSET_MASK));
837#endif
838 return VINF_SUCCESS;
839}
840
841
842/**
843 * Internal version of PGMPhysGCPhys2CCPtrReadOnly that expects the caller to
844 * own the PGM lock and therefore not need to lock the mapped page.
845 *
846 * @returns VBox status code.
847 * @retval VINF_SUCCESS on success.
848 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
849 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
850 *
851 * @param pVM The VM handle.
852 * @param GCPhys The guest physical address of the page that should be mapped.
853 * @param pPage Pointer to the PGMPAGE structure for the page.
854 * @param ppv Where to store the address corresponding to GCPhys.
855 *
856 * @internal
857 */
858int pgmPhysGCPhys2CCPtrInternalReadOnly(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, const void **ppv)
859{
860 AssertReturn(pPage, VERR_INTERNAL_ERROR);
861 Assert(PDMCritSectIsOwner(&pVM->pgm.s.CritSect) || VM_IS_EMT(pVM));
862 Assert(PGM_PAGE_GET_HCPHYS(pPage) != 0);
863
864 /*
865 * Get the mapping address.
866 */
867#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
868 *ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
869#else
870 PPGMPAGEMAPTLBE pTlbe;
871 int rc = pgmPhysPageQueryTlbeWithPage(&pVM->pgm.s, pPage, GCPhys, &pTlbe);
872 if (RT_FAILURE(rc))
873 return rc;
874 *ppv = (void *)((uintptr_t)pTlbe->pv | (GCPhys & PAGE_OFFSET_MASK));
875#endif
876 return VINF_SUCCESS;
877}
878
879
880/**
881 * Requests the mapping of a guest page into the current context.
882 *
883 * This API should only be used for very short term, as it will consume
884 * scarse resources (R0 and GC) in the mapping cache. When you're done
885 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
886 *
887 * This API will assume your intention is to write to the page, and will
888 * therefore replace shared and zero pages. If you do not intend to modify
889 * the page, use the PGMPhysGCPhys2CCPtrReadOnly() API.
890 *
891 * @returns VBox status code.
892 * @retval VINF_SUCCESS on success.
893 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
894 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
895 *
896 * @param pVM The VM handle.
897 * @param GCPhys The guest physical address of the page that should be mapped.
898 * @param ppv Where to store the address corresponding to GCPhys.
899 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
900 *
901 * @remark Avoid calling this API from within critical sections (other than
902 * the PGM one) because of the deadlock risk.
903 * @thread Any thread.
904 */
905VMMDECL(int) PGMPhysGCPhys2CCPtr(PVM pVM, RTGCPHYS GCPhys, void **ppv, PPGMPAGEMAPLOCK pLock)
906{
907#ifdef VBOX_WITH_NEW_PHYS_CODE
908# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
909
910 /*
911 * Find the page and make sure it's writable.
912 */
913 PPGMPAGE pPage;
914 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhys, &pPage);
915 if (RT_SUCCESS(rc))
916 {
917 if (RT_UNLIKELY(PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED))
918 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
919 if (RT_SUCCESS(rc))
920 {
921 *ppv = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK)); /** @todo add a read only flag? */
922#if 0
923 pLock->pvMap = 0;
924 pLock->pvPage = pPage;
925#else
926 pLock->u32Dummy = UINT32_MAX;
927#endif
928 }
929 }
930
931# else
932 int rc = pgmLock(pVM);
933 AssertRCReturn(rc, rc);
934
935 /*
936 * Query the Physical TLB entry for the page (may fail).
937 */
938 PPGMPAGEMAPTLBE pTlbe;
939 rc = pgmPhysPageQueryTlbe(&pVM->pgm.s, GCPhys, &pTlbe);
940 if (RT_SUCCESS(rc))
941 {
942 /*
943 * If the page is shared, the zero page, or being write monitored
944 * it must be converted to an page that's writable if possible.
945 */
946 PPGMPAGE pPage = pTlbe->pPage;
947 if (RT_UNLIKELY(PGM_PAGE_GET_STATE(pPage) != PGM_PAGE_STATE_ALLOCATED))
948 {
949 rc = pgmPhysPageMakeWritable(pVM, pPage, GCPhys);
950 if (RT_SUCCESS(rc))
951 rc = pgmPhysPageQueryTlbeWithPage(&pVM->pgm.s, pPage, GCPhys, &pTlbe);
952 }
953 if (RT_SUCCESS(rc))
954 {
955 /*
956 * Now, just perform the locking and calculate the return address.
957 */
958 PPGMPAGEMAP pMap = pTlbe->pMap;
959 pMap->cRefs++;
960#if 0 /** @todo implement locking properly */
961 if (RT_LIKELY(pPage->cLocks != PGM_PAGE_MAX_LOCKS))
962 if (RT_UNLIKELY(++pPage->cLocks == PGM_PAGE_MAX_LOCKS))
963 {
964 AssertMsgFailed(("%RGp is entering permanent locked state!\n", GCPhys));
965 pMap->cRefs++; /* Extra ref to prevent it from going away. */
966 }
967#endif
968 *ppv = (void *)((uintptr_t)pTlbe->pv | (GCPhys & PAGE_OFFSET_MASK));
969 pLock->pvPage = pPage;
970 pLock->pvMap = pMap;
971 }
972 }
973
974 pgmUnlock(pVM);
975#endif /* IN_RING3 || IN_RING0 */
976 return rc;
977
978#else
979 /*
980 * Temporary fallback code.
981 */
982# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
983/** @todo @bugref{3202}: check up this path. */
984 return PGMDynMapGCPageOff(pVM, GCPhys, ppv);
985# else
986 return PGMPhysGCPhys2R3Ptr(pVM, GCPhys, 1, (PRTR3PTR)ppv);
987# endif
988#endif
989}
990
991
992/**
993 * Requests the mapping of a guest page into the current context.
994 *
995 * This API should only be used for very short term, as it will consume
996 * scarse resources (R0 and GC) in the mapping cache. When you're done
997 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
998 *
999 * @returns VBox status code.
1000 * @retval VINF_SUCCESS on success.
1001 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
1002 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
1003 *
1004 * @param pVM The VM handle.
1005 * @param GCPhys The guest physical address of the page that should be mapped.
1006 * @param ppv Where to store the address corresponding to GCPhys.
1007 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
1008 *
1009 * @remark Avoid calling this API from within critical sections (other than
1010 * the PGM one) because of the deadlock risk.
1011 * @thread Any thread.
1012 */
1013VMMDECL(int) PGMPhysGCPhys2CCPtrReadOnly(PVM pVM, RTGCPHYS GCPhys, void const **ppv, PPGMPAGEMAPLOCK pLock)
1014{
1015 /** @todo implement this */
1016 return PGMPhysGCPhys2CCPtr(pVM, GCPhys, (void **)ppv, pLock);
1017}
1018
1019
1020/**
1021 * Requests the mapping of a guest page given by virtual address into the current context.
1022 *
1023 * This API should only be used for very short term, as it will consume
1024 * scarse resources (R0 and GC) in the mapping cache. When you're done
1025 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
1026 *
1027 * This API will assume your intention is to write to the page, and will
1028 * therefore replace shared and zero pages. If you do not intend to modify
1029 * the page, use the PGMPhysGCPtr2CCPtrReadOnly() API.
1030 *
1031 * @returns VBox status code.
1032 * @retval VINF_SUCCESS on success.
1033 * @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
1034 * @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
1035 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
1036 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
1037 *
1038 * @param pVM The VM handle.
1039 * @param GCPhys The guest physical address of the page that should be mapped.
1040 * @param ppv Where to store the address corresponding to GCPhys.
1041 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
1042 *
1043 * @remark Avoid calling this API from within critical sections (other than
1044 * the PGM one) because of the deadlock risk.
1045 * @thread EMT
1046 */
1047VMMDECL(int) PGMPhysGCPtr2CCPtr(PVM pVM, RTGCPTR GCPtr, void **ppv, PPGMPAGEMAPLOCK pLock)
1048{
1049 VM_ASSERT_EMT(pVM);
1050 RTGCPHYS GCPhys;
1051 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
1052 if (RT_SUCCESS(rc))
1053 rc = PGMPhysGCPhys2CCPtr(pVM, GCPhys, ppv, pLock);
1054 return rc;
1055}
1056
1057
1058/**
1059 * Requests the mapping of a guest page given by virtual address into the current context.
1060 *
1061 * This API should only be used for very short term, as it will consume
1062 * scarse resources (R0 and GC) in the mapping cache. When you're done
1063 * with the page, call PGMPhysReleasePageMappingLock() ASAP to release it.
1064 *
1065 * @returns VBox status code.
1066 * @retval VINF_SUCCESS on success.
1067 * @retval VERR_PAGE_TABLE_NOT_PRESENT if the page directory for the virtual address isn't present.
1068 * @retval VERR_PAGE_NOT_PRESENT if the page at the virtual address isn't present.
1069 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical backing.
1070 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
1071 *
1072 * @param pVM The VM handle.
1073 * @param GCPhys The guest physical address of the page that should be mapped.
1074 * @param ppv Where to store the address corresponding to GCPhys.
1075 * @param pLock Where to store the lock information that PGMPhysReleasePageMappingLock needs.
1076 *
1077 * @remark Avoid calling this API from within critical sections (other than
1078 * the PGM one) because of the deadlock risk.
1079 * @thread EMT
1080 */
1081VMMDECL(int) PGMPhysGCPtr2CCPtrReadOnly(PVM pVM, RTGCPTR GCPtr, void const **ppv, PPGMPAGEMAPLOCK pLock)
1082{
1083 VM_ASSERT_EMT(pVM);
1084 RTGCPHYS GCPhys;
1085 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, &GCPhys);
1086 if (RT_SUCCESS(rc))
1087 rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhys, ppv, pLock);
1088 return rc;
1089}
1090
1091
1092/**
1093 * Release the mapping of a guest page.
1094 *
1095 * This is the counter part of PGMPhysGCPhys2CCPtr, PGMPhysGCPhys2CCPtrReadOnly
1096 * PGMPhysGCPtr2CCPtr and PGMPhysGCPtr2CCPtrReadOnly.
1097 *
1098 * @param pVM The VM handle.
1099 * @param pLock The lock structure initialized by the mapping function.
1100 */
1101VMMDECL(void) PGMPhysReleasePageMappingLock(PVM pVM, PPGMPAGEMAPLOCK pLock)
1102{
1103#ifdef VBOX_WITH_NEW_PHYS_CODE
1104#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1105 /* currently nothing to do here. */
1106 Assert(pLock->u32Dummy == UINT32_MAX);
1107 pLock->u32Dummy = 0;
1108
1109#else /* IN_RING3 */
1110 PPGMPAGEMAP pMap = (PPGMPAGEMAP)pLock->pvMap;
1111 if (!pMap)
1112 {
1113 /* The ZERO page and MMIO2 ends up here. */
1114 Assert(pLock->pvPage);
1115 pLock->pvPage = NULL;
1116 }
1117 else
1118 {
1119 pgmLock(pVM);
1120
1121# if 0 /** @todo implement page locking */
1122 PPGMPAGE pPage = (PPGMPAGE)pLock->pvPage;
1123 Assert(pPage->cLocks >= 1);
1124 if (pPage->cLocks != PGM_PAGE_MAX_LOCKS)
1125 pPage->cLocks--;
1126# endif
1127
1128 Assert(pMap->cRefs >= 1);
1129 pMap->cRefs--;
1130 pMap->iAge = 0;
1131
1132 pgmUnlock(pVM);
1133 }
1134#endif /* IN_RING3 */
1135#else
1136 NOREF(pVM);
1137 NOREF(pLock);
1138#endif
1139}
1140
1141
1142/**
1143 * Converts a GC physical address to a HC ring-3 pointer.
1144 *
1145 * @returns VINF_SUCCESS on success.
1146 * @returns VERR_PGM_PHYS_PAGE_RESERVED it it's a valid GC physical
1147 * page but has no physical backing.
1148 * @returns VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid
1149 * GC physical address.
1150 * @returns VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY if the range crosses
1151 * a dynamic ram chunk boundary
1152 *
1153 * @param pVM The VM handle.
1154 * @param GCPhys The GC physical address to convert.
1155 * @param cbRange Physical range
1156 * @param pR3Ptr Where to store the R3 pointer on success.
1157 *
1158 * @deprecated Avoid when possible!
1159 */
1160VMMDECL(int) PGMPhysGCPhys2R3Ptr(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, PRTR3PTR pR3Ptr)
1161{
1162#ifdef VBOX_WITH_NEW_PHYS_CODE
1163/** @todo this is kind of hacky and needs some more work. */
1164 VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
1165
1166 LogAlways(("PGMPhysGCPhys2R3Ptr(,%RGp,%#x,): dont use this API!\n", GCPhys, cbRange)); /** @todo eliminate this API! */
1167# if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1168 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
1169# else
1170 pgmLock(pVM);
1171
1172 PPGMRAMRANGE pRam;
1173 PPGMPAGE pPage;
1174 int rc = pgmPhysGetPageAndRangeEx(&pVM->pgm.s, GCPhys, &pPage, &pRam);
1175 if (RT_SUCCESS(rc))
1176 rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, (void **)pR3Ptr);
1177
1178 pgmUnlock(pVM);
1179 Assert(rc <= VINF_SUCCESS);
1180 return rc;
1181# endif
1182
1183#else /* !VBOX_WITH_NEW_PHYS_CODE */
1184
1185 if ((GCPhys & PGM_DYNAMIC_CHUNK_BASE_MASK) != ((GCPhys+cbRange-1) & PGM_DYNAMIC_CHUNK_BASE_MASK))
1186 {
1187 AssertMsgFailed(("%RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
1188 LogRel(("PGMPhysGCPhys2HCPtr %RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys+cbRange));
1189 return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
1190 }
1191
1192 PPGMRAMRANGE pRam;
1193 PPGMPAGE pPage;
1194 int rc = pgmPhysGetPageAndRangeEx(&pVM->pgm.s, GCPhys, &pPage, &pRam);
1195 if (RT_FAILURE(rc))
1196 return rc;
1197
1198#ifndef PGM_IGNORE_RAM_FLAGS_RESERVED
1199 if (RT_UNLIKELY(PGM_PAGE_IS_RESERVED(pPage)))
1200 return VERR_PGM_PHYS_PAGE_RESERVED;
1201#endif
1202
1203 RTGCPHYS off = GCPhys - pRam->GCPhys;
1204 if (RT_UNLIKELY(off + cbRange > pRam->cb))
1205 {
1206 AssertMsgFailed(("%RGp - %RGp crosses a chunk boundary!!\n", GCPhys, GCPhys + cbRange));
1207 return VERR_PGM_GCPHYS_RANGE_CROSSES_BOUNDARY;
1208 }
1209
1210 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1211 {
1212 unsigned iChunk = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1213#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) /* ASSUMES this is a rare occurence */
1214 PRTR3UINTPTR paChunkR3Ptrs = (PRTR3UINTPTR)MMHyperR3ToCC(pVM, pRam->paChunkR3Ptrs);
1215 *pR3Ptr = (RTR3PTR)(paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1216#else
1217 *pR3Ptr = (RTR3PTR)(pRam->paChunkR3Ptrs[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1218#endif
1219 }
1220 else if (RT_LIKELY(pRam->pvR3))
1221 *pR3Ptr = (RTR3PTR)((RTR3UINTPTR)pRam->pvR3 + off);
1222 else
1223 return VERR_PGM_PHYS_PAGE_RESERVED;
1224 return VINF_SUCCESS;
1225#endif /* !VBOX_WITH_NEW_PHYS_CODE */
1226}
1227
1228
1229#ifdef VBOX_STRICT
1230/**
1231 * PGMPhysGCPhys2R3Ptr convenience for use with assertions.
1232 *
1233 * @returns The R3Ptr, NIL_RTR3PTR on failure.
1234 * @param pVM The VM handle.
1235 * @param GCPhys The GC Physical addresss.
1236 * @param cbRange Physical range.
1237 *
1238 * @deprecated Avoid when possible.
1239 */
1240VMMDECL(RTR3PTR) PGMPhysGCPhys2R3PtrAssert(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange)
1241{
1242 RTR3PTR R3Ptr;
1243 int rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys, cbRange, &R3Ptr);
1244 if (RT_SUCCESS(rc))
1245 return R3Ptr;
1246 return NIL_RTR3PTR;
1247}
1248#endif /* VBOX_STRICT */
1249
1250
1251/**
1252 * Converts a guest pointer to a GC physical address.
1253 *
1254 * This uses the current CR3/CR0/CR4 of the guest.
1255 *
1256 * @returns VBox status code.
1257 * @param pVM The VM Handle
1258 * @param GCPtr The guest pointer to convert.
1259 * @param pGCPhys Where to store the GC physical address.
1260 */
1261VMMDECL(int) PGMPhysGCPtr2GCPhys(PVM pVM, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
1262{
1263 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, pGCPhys);
1264 if (pGCPhys && RT_SUCCESS(rc))
1265 *pGCPhys |= (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
1266 return rc;
1267}
1268
1269
1270/**
1271 * Converts a guest pointer to a HC physical address.
1272 *
1273 * This uses the current CR3/CR0/CR4 of the guest.
1274 *
1275 * @returns VBox status code.
1276 * @param pVM The VM Handle
1277 * @param GCPtr The guest pointer to convert.
1278 * @param pHCPhys Where to store the HC physical address.
1279 */
1280VMMDECL(int) PGMPhysGCPtr2HCPhys(PVM pVM, RTGCPTR GCPtr, PRTHCPHYS pHCPhys)
1281{
1282 RTGCPHYS GCPhys;
1283 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
1284 if (RT_SUCCESS(rc))
1285 rc = PGMPhysGCPhys2HCPhys(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), pHCPhys);
1286 return rc;
1287}
1288
1289
1290/**
1291 * Converts a guest pointer to a R3 pointer.
1292 *
1293 * This uses the current CR3/CR0/CR4 of the guest.
1294 *
1295 * @returns VBox status code.
1296 * @param pVM The VM Handle
1297 * @param GCPtr The guest pointer to convert.
1298 * @param pR3Ptr Where to store the R3 virtual address.
1299 *
1300 * @deprecated Don't use this.
1301 */
1302VMMDECL(int) PGMPhysGCPtr2R3Ptr(PVM pVM, RTGCPTR GCPtr, PRTR3PTR pR3Ptr)
1303{
1304#ifdef VBOX_WITH_NEW_PHYS_CODE
1305 VM_ASSERT_EMT(pVM); /* no longer safe for use outside the EMT thread! */
1306#endif
1307
1308 RTGCPHYS GCPhys;
1309 int rc = PGM_GST_PFN(GetPage,pVM)(pVM, (RTGCUINTPTR)GCPtr, NULL, &GCPhys);
1310 if (RT_SUCCESS(rc))
1311 rc = PGMPhysGCPhys2R3Ptr(pVM, GCPhys | ((RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK), 1 /* we always stay within one page */, pR3Ptr);
1312 return rc;
1313}
1314
1315
1316
1317#undef LOG_GROUP
1318#define LOG_GROUP LOG_GROUP_PGM_PHYS_ACCESS
1319
1320
1321#ifdef IN_RING3
1322/**
1323 * Cache PGMPhys memory access
1324 *
1325 * @param pVM VM Handle.
1326 * @param pCache Cache structure pointer
1327 * @param GCPhys GC physical address
1328 * @param pbHC HC pointer corresponding to physical page
1329 *
1330 * @thread EMT.
1331 */
1332static void pgmPhysCacheAdd(PVM pVM, PGMPHYSCACHE *pCache, RTGCPHYS GCPhys, uint8_t *pbR3)
1333{
1334 uint32_t iCacheIndex;
1335
1336 Assert(VM_IS_EMT(pVM));
1337
1338 GCPhys = PHYS_PAGE_ADDRESS(GCPhys);
1339 pbR3 = (uint8_t *)PAGE_ADDRESS(pbR3);
1340
1341 iCacheIndex = ((GCPhys >> PAGE_SHIFT) & PGM_MAX_PHYSCACHE_ENTRIES_MASK);
1342
1343 ASMBitSet(&pCache->aEntries, iCacheIndex);
1344
1345 pCache->Entry[iCacheIndex].GCPhys = GCPhys;
1346 pCache->Entry[iCacheIndex].pbR3 = pbR3;
1347}
1348#endif /* IN_RING3 */
1349
1350#ifdef VBOX_WITH_NEW_PHYS_CODE
1351
1352/**
1353 * Deals with reading from a page with one or more ALL access handlers.
1354 *
1355 * @param pVM The VM handle.
1356 * @param pPage The page descriptor.
1357 * @param GCPhys The physical address to start reading at.
1358 * @param pvBuf Where to put the bits we read.
1359 * @param cb How much to read - less or equal to a page.
1360 */
1361static void pgmPhysReadHandler(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void *pvBuf, size_t cb)
1362{
1363 /*
1364 * The most frequent access here is MMIO and shadowed ROM.
1365 *
1366 * The current code ASSUMES all these access handlers are page sized
1367 * and that we do NOT use any virtual ones.
1368 */
1369 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_ALL
1370 && PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) != PGM_PAGE_HNDL_VIRT_STATE_ALL)
1371 {
1372#ifdef IN_RING3
1373 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1374 AssertReleaseMsg(pCur, ("GCPhys=%RGp cb=%#x\n", GCPhys, cb));
1375 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1376 Assert(pCur->CTX_SUFF(pfnHandler));
1377
1378 const void *pvSrc;
1379 int rc = pgmPhysGCPhys2CCPtrInternalReadOnly(pVM, pPage, GCPhys, &pvSrc);
1380 if (RT_SUCCESS(rc))
1381 {
1382 STAM_PROFILE_START(&pCur->Stat, h);
1383 int rc = pCur->CTX_SUFF(pfnHandler)(pVM, GCPhys, (void *)pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, pCur->CTX_SUFF(pvUser));
1384 STAM_PROFILE_STOP(&pCur->Stat, h);
1385 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1386 memcpy(pvBuf, pvSrc, cb);
1387 else
1388 AssertLogRelMsg(rc == VINF_SUCCESS, ("rc=%Rrc GCPhys=%RGp\n", rc, GCPhys));
1389 }
1390 else
1391 {
1392 AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternalReadOnly failed on %RGp / %R[pgmpage] -> %Rrc\n",
1393 GCPhys, pPage, rc));
1394 memset(pvBuf, 0xff, cb);
1395 }
1396#else
1397 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cb));
1398#endif
1399 }
1400 else
1401 AssertReleaseMsgFailed(("ALL access virtual handlers are not implemented here\n"));
1402}
1403
1404
1405/**
1406 * Read physical memory.
1407 *
1408 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
1409 * want to ignore those.
1410 *
1411 * @param pVM VM Handle.
1412 * @param GCPhys Physical address start reading from.
1413 * @param pvBuf Where to put the read bits.
1414 * @param cbRead How many bytes to read.
1415 */
1416VMMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1417{
1418 AssertMsgReturnVoid(cbRead > 0, ("don't even think about reading zero bytes!\n"));
1419 LogFlow(("PGMPhysRead: %RGp %d\n", GCPhys, cbRead));
1420
1421 pgmLock(pVM);
1422
1423 /*
1424 * Copy loop on ram ranges.
1425 */
1426 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
1427 for (;;)
1428 {
1429 /* Find range. */
1430 while (pRam && GCPhys > pRam->GCPhysLast)
1431 pRam = pRam->CTX_SUFF(pNext);
1432 /* Inside range or not? */
1433 if (pRam && GCPhys >= pRam->GCPhys)
1434 {
1435 /*
1436 * Must work our way thru this page by page.
1437 */
1438 RTGCPHYS off = GCPhys - pRam->GCPhys;
1439 while (off < pRam->cb)
1440 {
1441 unsigned iPage = off >> PAGE_SHIFT;
1442 PPGMPAGE pPage = &pRam->aPages[iPage];
1443 size_t cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1444 if (cb > cbRead)
1445 cb = cbRead;
1446
1447 /*
1448 * Any ALL access handlers?
1449 */
1450 if (RT_UNLIKELY(PGM_PAGE_HAS_ACTIVE_ALL_HANDLERS(pPage)))
1451 pgmPhysReadHandler(pVM, pPage, pRam->GCPhys + off, pvBuf, cb);
1452 else
1453 {
1454 /*
1455 * Get the pointer to the page.
1456 */
1457 const void *pvSrc;
1458 int rc = pgmPhysGCPhys2CCPtrInternalReadOnly(pVM, pPage, pRam->GCPhys + off, &pvSrc);
1459 if (RT_SUCCESS(rc))
1460 memcpy(pvBuf, pvSrc, cb);
1461 else
1462 AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternalReadOnly failed on %RGp / %R[pgmpage] -> %Rrc\n",
1463 pRam->GCPhys + off, pPage, rc));
1464 }
1465
1466 /* next page */
1467 if (cb >= cbRead)
1468 {
1469 pgmUnlock(pVM);
1470 return;
1471 }
1472 cbRead -= cb;
1473 off += cb;
1474 pvBuf = (char *)pvBuf + cb;
1475 } /* walk pages in ram range. */
1476
1477 GCPhys = pRam->GCPhysLast + 1;
1478 }
1479 else
1480 {
1481 LogFlow(("PGMPhysRead: Unassigned %RGp size=%u\n", GCPhys, cbRead));
1482
1483 /*
1484 * Unassigned address space.
1485 */
1486 if (!pRam)
1487 break;
1488 size_t cb = pRam->GCPhys - GCPhys;
1489 if (cb >= cbRead)
1490 {
1491#if 0 /** @todo enable this later. */
1492 memset(pvBuf, 0xff, cbRead);
1493#else
1494 memset(pvBuf, 0, cbRead);
1495#endif
1496 break;
1497 }
1498
1499#if 0 /** @todo enable this later. */
1500 memset(pvBuf, 0xff, cb);
1501#else
1502 memset(pvBuf, 0, cb);
1503#endif
1504 cbRead -= cb;
1505 pvBuf = (char *)pvBuf + cb;
1506 GCPhys += cb;
1507 }
1508 } /* Ram range walk */
1509
1510 pgmUnlock(pVM);
1511}
1512
1513#else /* Old PGMPhysRead */
1514
1515/**
1516 * Read physical memory.
1517 *
1518 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
1519 * want to ignore those.
1520 *
1521 * @param pVM VM Handle.
1522 * @param GCPhys Physical address start reading from.
1523 * @param pvBuf Where to put the read bits.
1524 * @param cbRead How many bytes to read.
1525 */
1526VMMDECL(void) PGMPhysRead(PVM pVM, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
1527{
1528#ifdef IN_RING3
1529 bool fGrabbedLock = false;
1530#endif
1531
1532 AssertMsg(cbRead > 0, ("don't even think about reading zero bytes!\n"));
1533 if (cbRead == 0)
1534 return;
1535
1536 LogFlow(("PGMPhysRead: %RGp %d\n", GCPhys, cbRead));
1537
1538#ifdef IN_RING3
1539 if (!VM_IS_EMT(pVM))
1540 {
1541 pgmLock(pVM);
1542 fGrabbedLock = true;
1543 }
1544#endif
1545
1546 /*
1547 * Copy loop on ram ranges.
1548 */
1549 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
1550 for (;;)
1551 {
1552 /* Find range. */
1553 while (pRam && GCPhys > pRam->GCPhysLast)
1554 pRam = pRam->CTX_SUFF(pNext);
1555 /* Inside range or not? */
1556 if (pRam && GCPhys >= pRam->GCPhys)
1557 {
1558 /*
1559 * Must work our way thru this page by page.
1560 */
1561 RTGCPHYS off = GCPhys - pRam->GCPhys;
1562 while (off < pRam->cb)
1563 {
1564 unsigned iPage = off >> PAGE_SHIFT;
1565 PPGMPAGE pPage = &pRam->aPages[iPage];
1566 size_t cb;
1567
1568 /* Physical chunk in dynamically allocated range not present? */
1569 if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
1570 {
1571 /* Treat it as reserved; return zeros */
1572 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1573 if (cb >= cbRead)
1574 {
1575 memset(pvBuf, 0, cbRead);
1576 goto l_End;
1577 }
1578 memset(pvBuf, 0, cb);
1579 }
1580 /* temp hacks, will be reorganized. */
1581 /*
1582 * Physical handler.
1583 */
1584 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_ALL)
1585 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1586 {
1587 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1588 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1589
1590#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1591 /* find and call the handler */
1592 PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
1593 if (pNode && pNode->pfnHandlerR3)
1594 {
1595 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1596 if (cbRange < cb)
1597 cb = cbRange;
1598 if (cb > cbRead)
1599 cb = cbRead;
1600
1601 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1602
1603 /* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1604 rc = pNode->pfnHandlerR3(pVM, GCPhys, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, pNode->pvUserR3);
1605 }
1606#endif /* IN_RING3 */
1607 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1608 {
1609#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1610 void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1611#else
1612 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1613#endif
1614
1615 if (cb >= cbRead)
1616 {
1617 memcpy(pvBuf, pvSrc, cbRead);
1618 goto l_End;
1619 }
1620 memcpy(pvBuf, pvSrc, cb);
1621 }
1622 else if (cb >= cbRead)
1623 goto l_End;
1624 }
1625 /*
1626 * Virtual handlers.
1627 */
1628 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) >= PGM_PAGE_HNDL_VIRT_STATE_ALL)
1629 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
1630 {
1631 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
1632 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1633#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
1634 /* Search the whole tree for matching physical addresses (rather expensive!) */
1635 PPGMVIRTHANDLER pNode;
1636 unsigned iPage;
1637 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
1638 if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3)
1639 {
1640 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
1641 if (cbRange < cb)
1642 cb = cbRange;
1643 if (cb > cbRead)
1644 cb = cbRead;
1645 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->Core.Key & PAGE_BASE_GC_MASK)
1646 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
1647
1648 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1649
1650 /* Note! Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
1651 rc = pNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvSrc, pvBuf, cb, PGMACCESSTYPE_READ, 0);
1652 }
1653#endif /* IN_RING3 */
1654 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1655 {
1656#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1657 void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1658#else
1659 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1660#endif
1661 if (cb >= cbRead)
1662 {
1663 memcpy(pvBuf, pvSrc, cbRead);
1664 goto l_End;
1665 }
1666 memcpy(pvBuf, pvSrc, cb);
1667 }
1668 else if (cb >= cbRead)
1669 goto l_End;
1670 }
1671 else
1672 {
1673 switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM)) /** @todo PAGE FLAGS */
1674 {
1675 /*
1676 * Normal memory or ROM.
1677 */
1678 case 0:
1679 case MM_RAM_FLAGS_ROM:
1680 case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_RESERVED:
1681 //case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO2: /* = shadow */ - //MMIO2 isn't in the mask.
1682 case MM_RAM_FLAGS_MMIO2: // MMIO2 isn't in the mask.
1683 {
1684#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
1685 void *pvSrc = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
1686#else
1687 void *pvSrc = PGMRAMRANGE_GETHCPTR(pRam, off)
1688#endif
1689 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1690 if (cb >= cbRead)
1691 {
1692#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
1693 if (cbRead <= 4 && !fGrabbedLock /* i.e. EMT */)
1694 pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphysreadcache, GCPhys, (uint8_t*)pvSrc);
1695#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
1696 memcpy(pvBuf, pvSrc, cbRead);
1697 goto l_End;
1698 }
1699 memcpy(pvBuf, pvSrc, cb);
1700 break;
1701 }
1702
1703 /*
1704 * All reserved, nothing there.
1705 */
1706 case MM_RAM_FLAGS_RESERVED:
1707 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1708 if (cb >= cbRead)
1709 {
1710 memset(pvBuf, 0, cbRead);
1711 goto l_End;
1712 }
1713 memset(pvBuf, 0, cb);
1714 break;
1715
1716 /*
1717 * The rest needs to be taken more carefully.
1718 */
1719 default:
1720#if 1 /** @todo r=bird: Can you do this properly please. */
1721 /** @todo Try MMIO; quick hack */
1722 if (cbRead <= 8 && IOMMMIORead(pVM, GCPhys, (uint32_t *)pvBuf, cbRead) == VINF_SUCCESS)
1723 goto l_End;
1724#endif
1725
1726 /** @todo fix me later. */
1727 AssertReleaseMsgFailed(("Unknown read at %RGp size %u implement the complex physical reading case %RHp\n",
1728 GCPhys, cbRead,
1729 pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_ROM))); /** @todo PAGE FLAGS */
1730 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
1731 break;
1732 }
1733 }
1734
1735 cbRead -= cb;
1736 off += cb;
1737 pvBuf = (char *)pvBuf + cb;
1738 }
1739
1740 GCPhys = pRam->GCPhysLast + 1;
1741 }
1742 else
1743 {
1744 LogFlow(("PGMPhysRead: Unassigned %RGp size=%u\n", GCPhys, cbRead));
1745
1746 /*
1747 * Unassigned address space.
1748 */
1749 size_t cb;
1750 if ( !pRam
1751 || (cb = pRam->GCPhys - GCPhys) >= cbRead)
1752 {
1753 memset(pvBuf, 0, cbRead);
1754 goto l_End;
1755 }
1756
1757 memset(pvBuf, 0, cb); /** @todo this is wrong, unassigne == 0xff not 0x00! */
1758 cbRead -= cb;
1759 pvBuf = (char *)pvBuf + cb;
1760 GCPhys += cb;
1761 }
1762 }
1763l_End:
1764#ifdef IN_RING3
1765 if (fGrabbedLock)
1766 pgmUnlock(pVM);
1767#endif
1768 return;
1769}
1770
1771#endif /* Old PGMPhysRead */
1772#ifdef VBOX_WITH_NEW_PHYS_CODE
1773
1774/**
1775 * Deals with writing to a page with one or more WRITE or ALL access handlers.
1776 *
1777 * @param pVM The VM handle.
1778 * @param pPage The page descriptor.
1779 * @param GCPhys The physical address to start writing at.
1780 * @param pvBuf What to write.
1781 * @param cbWrite How much to write - less or equal to a page.
1782 */
1783static void pgmPhysWriteHandler(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, void const *pvBuf, size_t cbWrite)
1784{
1785 void *pvDst = NULL;
1786 int rc;
1787
1788 /*
1789 * Give priority to physical handlers (like #PF does).
1790 *
1791 * Hope for a lonely physical handler first that covers the whole
1792 * write area. This should be a pretty frequent case with MMIO and
1793 * the heavy usage of full page handlers in the page pool.
1794 */
1795 if ( !PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage)
1796 || PGM_PAGE_IS_MMIO(pPage) /* screw virtual handlers on MMIO pages */)
1797 {
1798 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1799 if (pCur)
1800 {
1801 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1802 Assert(pCur->CTX_SUFF(pfnHandler));
1803
1804 size_t cbRange = pCur->Core.KeyLast - GCPhys + 1;
1805 if (cbRange > cbWrite)
1806 cbRange = cbWrite;
1807
1808#ifdef IN_RING3
1809 if (!PGM_PAGE_IS_MMIO(pPage))
1810 rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, &pvDst);
1811 else
1812 rc = VINF_SUCCESS;
1813 if (RT_SUCCESS(rc))
1814 {
1815 STAM_PROFILE_START(&pCur->Stat, h);
1816 rc = pCur->CTX_SUFF(pfnHandler)(pVM, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, pCur->CTX_SUFF(pvUser));
1817 STAM_PROFILE_STOP(&pCur->Stat, h);
1818 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1819 memcpy(pvDst, pvBuf, cbRange);
1820 else
1821 AssertLogRelMsg(rc == VINF_SUCCESS, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pCur->pszDesc));
1822 }
1823 else
1824 AssertLogRelMsgFailedReturnVoid(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
1825 GCPhys, pPage, rc));
1826#else
1827 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
1828#endif
1829 if (RT_LIKELY(cbRange == cbWrite))
1830 return;
1831
1832 /* more fun to be had below */
1833 cbWrite -= cbRange;
1834 GCPhys += cbRange;
1835 pvBuf = (uint8_t *)pvBuf + cbRange;
1836 pvDst = (uint8_t *)pvDst + cbRange;
1837 }
1838 /* else: the handler is somewhere else in the page, deal with it below. */
1839 Assert(!PGM_PAGE_IS_MMIO(pPage)); /* MMIO handlers are all PAGE_SIZEed! */
1840 }
1841 /*
1842 * A virtual handler without any interfering physical handlers.
1843 * Hopefully it'll conver the whole write.
1844 */
1845 else if (!PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage))
1846 {
1847 unsigned iPage;
1848 PPGMVIRTHANDLER pCur;
1849 rc = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pCur, &iPage);
1850 if (RT_SUCCESS(rc))
1851 {
1852 size_t cbRange = (PAGE_OFFSET_MASK & pCur->Core.KeyLast) - (PAGE_OFFSET_MASK & GCPhys) + 1;
1853 if (cbRange > cbWrite)
1854 cbRange = cbWrite;
1855
1856#ifdef IN_RING3
1857 rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, &pvDst);
1858 if (RT_SUCCESS(rc))
1859 {
1860 rc = VINF_PGM_HANDLER_DO_DEFAULT;
1861 if (pCur->pfnHandlerR3)
1862 {
1863 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pCur->Core.Key & PAGE_BASE_GC_MASK)
1864 + (iPage << PAGE_SHIFT)
1865 + (GCPhys & PAGE_OFFSET_MASK);
1866
1867 STAM_PROFILE_START(&pCur->Stat, h);
1868 rc = pCur->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
1869 STAM_PROFILE_STOP(&pCur->Stat, h);
1870 }
1871 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
1872 memcpy(pvDst, pvBuf, cbRange);
1873 else
1874 AssertLogRelMsg(rc == VINF_SUCCESS, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pCur->pszDesc));
1875 }
1876 else
1877 AssertLogRelMsgFailedReturnVoid(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
1878 GCPhys, pPage, rc));
1879#else
1880 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cbRange));
1881#endif
1882 if (RT_LIKELY(cbRange == cbWrite))
1883 return;
1884
1885 /* more fun to be had below */
1886 cbWrite -= cbRange;
1887 GCPhys += cbRange;
1888 pvBuf = (uint8_t *)pvBuf + cbRange;
1889 pvDst = (uint8_t *)pvDst + cbRange;
1890 }
1891 /* else: the handler is somewhere else in the page, deal with it below. */
1892 }
1893
1894 /*
1895 * Deal with all the odd ends.
1896 */
1897
1898 /* We need a writable destination page. */
1899 if (!pvDst)
1900 {
1901 rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, &pvDst);
1902 AssertLogRelMsgReturnVoid(RT_SUCCESS(rc),
1903 ("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
1904 GCPhys, pPage, rc));
1905 }
1906
1907 /* The loop state (big + ugly). */
1908 unsigned iVirtPage = 0;
1909 PPGMVIRTHANDLER pVirt = NULL;
1910 uint32_t offVirt = PAGE_SIZE;
1911 uint32_t offVirtLast = PAGE_SIZE;
1912 bool fMoreVirt = PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage);
1913
1914 PPGMPHYSHANDLER pPhys = NULL;
1915 uint32_t offPhys = PAGE_SIZE;
1916 uint32_t offPhysLast = PAGE_SIZE;
1917 bool fMorePhys = PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage);
1918
1919 /* The loop. */
1920 for (;;)
1921 {
1922 /*
1923 * Find the closest handler at or above GCPhys.
1924 */
1925 if (fMoreVirt && !pVirt)
1926 {
1927 int rc = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pVirt, &iVirtPage);
1928 if (RT_SUCCESS(rc))
1929 {
1930 offVirt = 0;
1931 offVirtLast = (pVirt->aPhysToVirt[iVirtPage].Core.KeyLast & PAGE_OFFSET_MASK) - (GCPhys & PAGE_OFFSET_MASK);
1932 }
1933 else
1934 {
1935 PPGMPHYS2VIRTHANDLER pVirtPhys;
1936 pVirtPhys = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
1937 GCPhys, true /* fAbove */);
1938 if ( pVirtPhys
1939 && (pVirtPhys->Core.Key >> PAGE_SHIFT) == (GCPhys >> PAGE_SHIFT))
1940 {
1941 /* ASSUME that pVirtPhys only covers one page. */
1942 Assert((pVirtPhys->Core.Key >> PAGE_SHIFT) == (pVirtPhys->Core.KeyLast >> PAGE_SHIFT));
1943 Assert(pVirtPhys->Core.Key > GCPhys);
1944
1945 pVirt = (PPGMVIRTHANDLER)((uintptr_t)pVirtPhys + pVirtPhys->offVirtHandler);
1946 iVirtPage = pVirtPhys - &pVirt->aPhysToVirt[0]; Assert(iVirtPage == 0);
1947 offVirt = (pVirtPhys->Core.Key & PAGE_OFFSET_MASK) - (GCPhys & PAGE_OFFSET_MASK);
1948 offVirtLast = (pVirtPhys->Core.KeyLast & PAGE_OFFSET_MASK) - (GCPhys & PAGE_OFFSET_MASK);
1949 }
1950 else
1951 {
1952 pVirt = NULL;
1953 fMoreVirt = false;
1954 offVirt = offVirtLast = PAGE_SIZE;
1955 }
1956 }
1957 }
1958
1959 if (fMorePhys && !pPhys)
1960 {
1961 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1962 if (pPhys)
1963 {
1964 offPhys = 0;
1965 offPhysLast = pPhys->Core.KeyLast - GCPhys; /* ASSUMES < 4GB handlers... */
1966 }
1967 else
1968 {
1969 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers,
1970 GCPhys, true /* fAbove */);
1971 if ( pPhys
1972 && pPhys->Core.Key <= GCPhys + (cbWrite - 1))
1973 {
1974 offPhys = pPhys->Core.Key - GCPhys;
1975 offPhysLast = pPhys->Core.KeyLast - GCPhys; /* ASSUMES < 4GB handlers... */
1976 }
1977 else
1978 {
1979 pPhys = NULL;
1980 fMorePhys = false;
1981 offPhys = offPhysLast = PAGE_SIZE;
1982 }
1983 }
1984 }
1985
1986 /*
1987 * Handle access to space without handlers (that's easy).
1988 */
1989 rc = VINF_PGM_HANDLER_DO_DEFAULT;
1990 size_t cbRange = cbWrite;
1991 if (offPhys && offVirt)
1992 {
1993 if (cbRange > offPhys)
1994 cbRange = offPhys;
1995 if (cbRange > offVirt)
1996 cbRange = offVirt;
1997 }
1998 /*
1999 * Physical handler.
2000 */
2001 else if (!offPhys && offVirt)
2002 {
2003 if (cbRange > offPhysLast + 1)
2004 cbRange = offPhysLast + 1;
2005 if (cbRange > offVirt)
2006 cbRange = offVirt;
2007#ifdef IN_RING3
2008 STAM_PROFILE_START(&pPhys->Stat, h);
2009 rc = pPhys->CTX_SUFF(pfnHandler)(pVM, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, pPhys->CTX_SUFF(pvUser));
2010 STAM_PROFILE_STOP(&pPhys->Stat, h);
2011 AssertLogRelMsg(rc != VINF_SUCCESS && rc != VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pPhys->pszDesc));
2012#else
2013 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
2014#endif
2015 pPhys = NULL;
2016 }
2017 /*
2018 * Virtual handler.
2019 */
2020 else if (offPhys && !offVirt)
2021 {
2022 if (cbRange > offVirtLast + 1)
2023 cbRange = offVirtLast + 1;
2024 if (cbRange > offPhys)
2025 cbRange = offPhys;
2026#ifdef IN_RING3
2027 if (pVirt->pfnHandlerR3)
2028 {
2029 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirt->Core.Key & PAGE_BASE_GC_MASK)
2030 + (iVirtPage << PAGE_SHIFT)
2031 + (GCPhys & PAGE_OFFSET_MASK);
2032 STAM_PROFILE_START(&pVirt->Stat, h);
2033 rc = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
2034 STAM_PROFILE_STOP(&pVirt->Stat, h);
2035 AssertLogRelMsg(rc != VINF_SUCCESS && rc != VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pVirt->pszDesc));
2036 }
2037#else
2038 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cb=%#x\n", GCPhys, cbRange));
2039#endif
2040 pVirt = NULL;
2041 }
2042 /*
2043 * Both... give the physical one priority.
2044 */
2045 else
2046 {
2047 Assert(!offPhys && !offVirt);
2048 if (cbRange > offVirtLast + 1)
2049 cbRange = offVirtLast + 1;
2050 if (cbRange > offPhysLast + 1)
2051 cbRange = offPhysLast + 1;
2052
2053#ifdef IN_RING3
2054 if (pVirt->pfnHandlerR3)
2055 Log(("pgmPhysWriteHandler: overlapping phys and virt handlers at %RGp %R[pgmpage]; cbRange=%#x\n", GCPhys, pPage, cbRange));
2056
2057 STAM_PROFILE_START(&pPhys->Stat, h);
2058 rc = pPhys->CTX_SUFF(pfnHandler)(pVM, GCPhys, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, pPhys->CTX_SUFF(pvUser));
2059 STAM_PROFILE_STOP(&pPhys->Stat, h);
2060 AssertLogRelMsg(rc != VINF_SUCCESS && rc != VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pPhys->pszDesc));
2061 if (pVirt->pfnHandlerR3)
2062 {
2063
2064 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirt->Core.Key & PAGE_BASE_GC_MASK)
2065 + (iVirtPage << PAGE_SHIFT)
2066 + (GCPhys & PAGE_OFFSET_MASK);
2067 STAM_PROFILE_START(&pVirt->Stat, h);
2068 int rc2 = pVirt->CTX_SUFF(pfnHandler)(pVM, GCPtr, pvDst, (void *)pvBuf, cbRange, PGMACCESSTYPE_WRITE, /*pCur->CTX_SUFF(pvUser)*/ NULL);
2069 STAM_PROFILE_STOP(&pVirt->Stat, h);
2070 AssertLogRelMsg(rc2 != VINF_SUCCESS && rc2 != VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pVirt->pszDesc));
2071 if (rc2 == VINF_SUCCESS && rc == VINF_PGM_HANDLER_DO_DEFAULT)
2072 rc = VINF_SUCCESS;
2073 }
2074#else
2075 AssertReleaseMsgFailed(("Wrong API! GCPhys=%RGp cbRange=%#x\n", GCPhys, cbRange));
2076#endif
2077 pPhys = NULL;
2078 pVirt = NULL;
2079 }
2080 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
2081 memcpy(pvDst, pvBuf, cbRange);
2082
2083 /*
2084 * Advance if we've got more stuff to do.
2085 */
2086 if (cbRange >= cbWrite)
2087 return;
2088
2089 cbWrite -= cbRange;
2090 GCPhys += cbRange;
2091 pvBuf = (uint8_t *)pvBuf + cbRange;
2092 pvDst = (uint8_t *)pvDst + cbRange;
2093
2094 offPhys -= cbRange;
2095 offPhysLast -= cbRange;
2096 offVirt -= cbRange;
2097 offVirtLast -= cbRange;
2098 }
2099}
2100
2101
2102/**
2103 * Write to physical memory.
2104 *
2105 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
2106 * want to ignore those.
2107 *
2108 * @param pVM VM Handle.
2109 * @param GCPhys Physical address to write to.
2110 * @param pvBuf What to write.
2111 * @param cbWrite How many bytes to write.
2112 */
2113VMMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2114{
2115 AssertMsg(!pVM->pgm.s.fNoMorePhysWrites, ("Calling PGMPhysWrite after pgmR3Save()!\n"));
2116 AssertMsgReturnVoid(cbWrite > 0, ("don't even think about writing zero bytes!\n"));
2117 LogFlow(("PGMPhysWrite: %RGp %d\n", GCPhys, cbWrite));
2118
2119 pgmLock(pVM);
2120
2121 /*
2122 * Copy loop on ram ranges.
2123 */
2124 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
2125 for (;;)
2126 {
2127 /* Find range. */
2128 while (pRam && GCPhys > pRam->GCPhysLast)
2129 pRam = pRam->CTX_SUFF(pNext);
2130 /* Inside range or not? */
2131 if (pRam && GCPhys >= pRam->GCPhys)
2132 {
2133 /*
2134 * Must work our way thru this page by page.
2135 */
2136 RTGCPTR off = GCPhys - pRam->GCPhys;
2137 while (off < pRam->cb)
2138 {
2139 RTGCPTR iPage = off >> PAGE_SHIFT;
2140 PPGMPAGE pPage = &pRam->aPages[iPage];
2141 size_t cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2142 if (cb > cbWrite)
2143 cb = cbWrite;
2144
2145 /*
2146 * Any active WRITE or ALL access handlers?
2147 */
2148 if (PGM_PAGE_HAS_ACTIVE_HANDLERS(pPage))
2149 pgmPhysWriteHandler(pVM, pPage, pRam->GCPhys + off, pvBuf, cb);
2150 else
2151 {
2152 /*
2153 * Get the pointer to the page.
2154 */
2155 void *pvDst;
2156 int rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, pRam->GCPhys + off, &pvDst);
2157 if (RT_SUCCESS(rc))
2158 memcpy(pvDst, pvBuf, cb);
2159 else
2160 AssertLogRelMsgFailed(("pgmPhysGCPhys2CCPtrInternal failed on %RGp / %R[pgmpage] -> %Rrc\n",
2161 pRam->GCPhys + off, pPage, rc));
2162 }
2163
2164 /* next page */
2165 if (cb >= cbWrite)
2166 {
2167 pgmUnlock(pVM);
2168 return;
2169 }
2170
2171 cbWrite -= cb;
2172 off += cb;
2173 pvBuf = (const char *)pvBuf + cb;
2174 } /* walk pages in ram range */
2175
2176 GCPhys = pRam->GCPhysLast + 1;
2177 }
2178 else
2179 {
2180 /*
2181 * Unassigned address space, skip it.
2182 */
2183 if (!pRam)
2184 break;
2185 size_t cb = pRam->GCPhys - GCPhys;
2186 if (cb >= cbWrite)
2187 break;
2188 cbWrite -= cb;
2189 pvBuf = (const char *)pvBuf + cb;
2190 GCPhys += cb;
2191 }
2192 } /* Ram range walk */
2193
2194 pgmUnlock(pVM);
2195}
2196
2197#else /* Old PGMPhysWrite */
2198
2199/**
2200 * Write to physical memory.
2201 *
2202 * This API respects access handlers and MMIO. Use PGMPhysSimpleReadGCPhys() if you
2203 * want to ignore those.
2204 *
2205 * @param pVM VM Handle.
2206 * @param GCPhys Physical address to write to.
2207 * @param pvBuf What to write.
2208 * @param cbWrite How many bytes to write.
2209 */
2210VMMDECL(void) PGMPhysWrite(PVM pVM, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2211{
2212#ifdef IN_RING3
2213 bool fGrabbedLock = false;
2214#endif
2215
2216 AssertMsg(!pVM->pgm.s.fNoMorePhysWrites, ("Calling PGMPhysWrite after pgmR3Save()!\n"));
2217 AssertMsg(cbWrite > 0, ("don't even think about writing zero bytes!\n"));
2218 if (cbWrite == 0)
2219 return;
2220
2221 LogFlow(("PGMPhysWrite: %RGp %d\n", GCPhys, cbWrite));
2222
2223#ifdef IN_RING3
2224 if (!VM_IS_EMT(pVM))
2225 {
2226 pgmLock(pVM);
2227 fGrabbedLock = true;
2228 }
2229#endif
2230 /*
2231 * Copy loop on ram ranges.
2232 */
2233 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
2234 for (;;)
2235 {
2236 /* Find range. */
2237 while (pRam && GCPhys > pRam->GCPhysLast)
2238 pRam = pRam->CTX_SUFF(pNext);
2239 /* Inside range or not? */
2240 if (pRam && GCPhys >= pRam->GCPhys)
2241 {
2242 /*
2243 * Must work our way thru this page by page.
2244 */
2245 RTGCPTR off = GCPhys - pRam->GCPhys;
2246 while (off < pRam->cb)
2247 {
2248 RTGCPTR iPage = off >> PAGE_SHIFT;
2249 PPGMPAGE pPage = &pRam->aPages[iPage];
2250
2251 /* Physical chunk in dynamically allocated range not present? */
2252 if (RT_UNLIKELY(!PGM_PAGE_GET_HCPHYS(pPage)))
2253 {
2254 int rc;
2255#ifdef IN_RING3
2256 if (fGrabbedLock)
2257 {
2258 pgmUnlock(pVM);
2259 rc = pgmr3PhysGrowRange(pVM, GCPhys);
2260 if (rc == VINF_SUCCESS)
2261 PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite); /* try again; can't assume pRam is still valid (paranoia) */
2262 return;
2263 }
2264 rc = pgmr3PhysGrowRange(pVM, GCPhys);
2265#else
2266 rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2267#endif
2268 if (rc != VINF_SUCCESS)
2269 goto l_End;
2270 }
2271
2272 size_t cb;
2273 /* temporary hack, will reogranize is later. */
2274 /*
2275 * Virtual handlers
2276 */
2277 if ( PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage)
2278 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
2279 {
2280 if (PGM_PAGE_HAS_ACTIVE_PHYSICAL_HANDLERS(pPage))
2281 {
2282 /*
2283 * Physical write handler + virtual write handler.
2284 * Consider this a quick workaround for the CSAM + shadow caching problem.
2285 *
2286 * We hand it to the shadow caching first since it requires the unchanged
2287 * data. CSAM will have to put up with it already being changed.
2288 */
2289 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
2290 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2291#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
2292 /* 1. The physical handler */
2293 PPGMPHYSHANDLER pPhysNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
2294 if (pPhysNode && pPhysNode->pfnHandlerR3)
2295 {
2296 size_t cbRange = pPhysNode->Core.KeyLast - GCPhys + 1;
2297 if (cbRange < cb)
2298 cb = cbRange;
2299 if (cb > cbWrite)
2300 cb = cbWrite;
2301
2302 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2303
2304 /* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
2305 rc = pPhysNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pPhysNode->pvUserR3);
2306 }
2307
2308 /* 2. The virtual handler (will see incorrect data) */
2309 PPGMVIRTHANDLER pVirtNode;
2310 unsigned iPage;
2311 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pVirtNode, &iPage);
2312 if (RT_SUCCESS(rc2) && pVirtNode->pfnHandlerR3)
2313 {
2314 size_t cbRange = pVirtNode->Core.KeyLast - GCPhys + 1;
2315 if (cbRange < cb)
2316 cb = cbRange;
2317 if (cb > cbWrite)
2318 cb = cbWrite;
2319 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pVirtNode->Core.Key & PAGE_BASE_GC_MASK)
2320 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
2321
2322 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2323
2324 /* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
2325 rc2 = pVirtNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
2326 if ( ( rc2 != VINF_PGM_HANDLER_DO_DEFAULT
2327 && rc == VINF_PGM_HANDLER_DO_DEFAULT)
2328 || ( RT_FAILURE(rc2)
2329 && RT_SUCCESS(rc)))
2330 rc = rc2;
2331 }
2332#endif /* IN_RING3 */
2333 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
2334 {
2335#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
2336 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
2337#else
2338 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2339#endif
2340 if (cb >= cbWrite)
2341 {
2342 memcpy(pvDst, pvBuf, cbWrite);
2343 goto l_End;
2344 }
2345 memcpy(pvDst, pvBuf, cb);
2346 }
2347 else if (cb >= cbWrite)
2348 goto l_End;
2349 }
2350 else
2351 {
2352 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
2353 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2354#ifdef IN_RING3
2355/** @todo deal with this in GC and R0! */
2356 /* Search the whole tree for matching physical addresses (rather expensive!) */
2357 PPGMVIRTHANDLER pNode;
2358 unsigned iPage;
2359 int rc2 = pgmHandlerVirtualFindByPhysAddr(pVM, GCPhys, &pNode, &iPage);
2360 if (RT_SUCCESS(rc2) && pNode->pfnHandlerR3)
2361 {
2362 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
2363 if (cbRange < cb)
2364 cb = cbRange;
2365 if (cb > cbWrite)
2366 cb = cbWrite;
2367 RTGCUINTPTR GCPtr = ((RTGCUINTPTR)pNode->Core.Key & PAGE_BASE_GC_MASK)
2368 + (iPage << PAGE_SHIFT) + (off & PAGE_OFFSET_MASK);
2369
2370 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2371
2372 /* Note! Dangerous assumption that R3 handlers don't do anything that really requires an EMT lock! */
2373 rc = pNode->pfnHandlerR3(pVM, (RTGCPTR)GCPtr, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, 0);
2374 }
2375#endif /* IN_RING3 */
2376 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
2377 {
2378#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
2379 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
2380#else
2381 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2382#endif
2383 if (cb >= cbWrite)
2384 {
2385 memcpy(pvDst, pvBuf, cbWrite);
2386 goto l_End;
2387 }
2388 memcpy(pvDst, pvBuf, cb);
2389 }
2390 else if (cb >= cbWrite)
2391 goto l_End;
2392 }
2393 }
2394 /*
2395 * Physical handler.
2396 */
2397 else if ( RT_UNLIKELY(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) >= PGM_PAGE_HNDL_PHYS_STATE_WRITE)
2398 && !(pPage->HCPhys & MM_RAM_FLAGS_MMIO)) /// @todo PAGE FLAGS
2399 {
2400 int rc = VINF_PGM_HANDLER_DO_DEFAULT;
2401 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2402#ifdef IN_RING3 /** @todo deal with this in GC and R0! */
2403 /* find and call the handler */
2404 PPGMPHYSHANDLER pNode = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.pTreesR3->PhysHandlers, GCPhys);
2405 if (pNode && pNode->pfnHandlerR3)
2406 {
2407 size_t cbRange = pNode->Core.KeyLast - GCPhys + 1;
2408 if (cbRange < cb)
2409 cb = cbRange;
2410 if (cb > cbWrite)
2411 cb = cbWrite;
2412
2413 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2414
2415 /** @todo Dangerous assumption that HC handlers don't do anything that really requires an EMT lock! */
2416 rc = pNode->pfnHandlerR3(pVM, GCPhys, pvDst, (void *)pvBuf, cb, PGMACCESSTYPE_WRITE, pNode->pvUserR3);
2417 }
2418#endif /* IN_RING3 */
2419 if (rc == VINF_PGM_HANDLER_DO_DEFAULT)
2420 {
2421#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
2422 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
2423#else
2424 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2425#endif
2426 if (cb >= cbWrite)
2427 {
2428 memcpy(pvDst, pvBuf, cbWrite);
2429 goto l_End;
2430 }
2431 memcpy(pvDst, pvBuf, cb);
2432 }
2433 else if (cb >= cbWrite)
2434 goto l_End;
2435 }
2436 else
2437 {
2438 /** @todo r=bird: missing MM_RAM_FLAGS_ROM here, we shall not allow anyone to overwrite the ROM! */
2439 switch (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)) /** @todo PAGE FLAGS */
2440 {
2441 /*
2442 * Normal memory, MMIO2 or writable shadow ROM.
2443 */
2444 case 0:
2445 case MM_RAM_FLAGS_MMIO2:
2446 case MM_RAM_FLAGS_ROM | MM_RAM_FLAGS_MMIO2: /* shadow rom */
2447 {
2448#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0)
2449 void *pvDst = pgmDynMapHCPageOff(&pVM->pgm.s, PGM_PAGE_GET_HCPHYS(pPage) + (off & PAGE_OFFSET_MASK));
2450#else
2451 void *pvDst = PGMRAMRANGE_GETHCPTR(pRam, off)
2452#endif
2453 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2454 if (cb >= cbWrite)
2455 {
2456#if defined(IN_RING3) && defined(PGM_PHYSMEMACCESS_CACHING)
2457 if (cbWrite <= 4 && !fGrabbedLock /* i.e. EMT */)
2458 pgmPhysCacheAdd(pVM, &pVM->pgm.s.pgmphyswritecache, GCPhys, (uint8_t*)pvDst);
2459#endif /* IN_RING3 && PGM_PHYSMEMACCESS_CACHING */
2460 memcpy(pvDst, pvBuf, cbWrite);
2461 goto l_End;
2462 }
2463 memcpy(pvDst, pvBuf, cb);
2464 break;
2465 }
2466
2467 /*
2468 * All reserved, nothing there.
2469 */
2470 case MM_RAM_FLAGS_RESERVED:
2471 case MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO2:
2472 cb = PAGE_SIZE - (off & PAGE_OFFSET_MASK);
2473 if (cb >= cbWrite)
2474 goto l_End;
2475 break;
2476
2477
2478 /*
2479 * The rest needs to be taken more carefully.
2480 */
2481 default:
2482#if 1 /** @todo r=bird: Can you do this properly please. */
2483 /** @todo Try MMIO; quick hack */
2484 if (cbWrite <= 8 && IOMMMIOWrite(pVM, GCPhys, *(uint32_t *)pvBuf, cbWrite) == VINF_SUCCESS)
2485 goto l_End;
2486#endif
2487
2488 /** @todo fix me later. */
2489 AssertReleaseMsgFailed(("Unknown write at %RGp size %u implement the complex physical writing case %RHp\n",
2490 GCPhys, cbWrite,
2491 (pPage->HCPhys & (MM_RAM_FLAGS_RESERVED | MM_RAM_FLAGS_MMIO | MM_RAM_FLAGS_MMIO2)))); /** @todo PAGE FLAGS */
2492 /* skip the write */
2493 cb = cbWrite;
2494 break;
2495 }
2496 }
2497
2498 cbWrite -= cb;
2499 off += cb;
2500 pvBuf = (const char *)pvBuf + cb;
2501 }
2502
2503 GCPhys = pRam->GCPhysLast + 1;
2504 }
2505 else
2506 {
2507 /*
2508 * Unassigned address space.
2509 */
2510 size_t cb;
2511 if ( !pRam
2512 || (cb = pRam->GCPhys - GCPhys) >= cbWrite)
2513 goto l_End;
2514
2515 cbWrite -= cb;
2516 pvBuf = (const char *)pvBuf + cb;
2517 GCPhys += cb;
2518 }
2519 }
2520l_End:
2521#ifdef IN_RING3
2522 if (fGrabbedLock)
2523 pgmUnlock(pVM);
2524#endif
2525 return;
2526}
2527
2528#endif /* Old PGMPhysWrite */
2529
2530/**
2531 * Read from guest physical memory by GC physical address, bypassing
2532 * MMIO and access handlers.
2533 *
2534 * @returns VBox status.
2535 * @param pVM VM handle.
2536 * @param pvDst The destination address.
2537 * @param GCPhysSrc The source address (GC physical address).
2538 * @param cb The number of bytes to read.
2539 */
2540VMMDECL(int) PGMPhysSimpleReadGCPhys(PVM pVM, void *pvDst, RTGCPHYS GCPhysSrc, size_t cb)
2541{
2542 /*
2543 * Treat the first page as a special case.
2544 */
2545 if (!cb)
2546 return VINF_SUCCESS;
2547
2548 /* map the 1st page */
2549 void const *pvSrc;
2550 PGMPAGEMAPLOCK Lock;
2551 int rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhysSrc, &pvSrc, &Lock);
2552 if (RT_FAILURE(rc))
2553 return rc;
2554
2555 /* optimize for the case where access is completely within the first page. */
2556 size_t cbPage = PAGE_SIZE - (GCPhysSrc & PAGE_OFFSET_MASK);
2557 if (RT_LIKELY(cb <= cbPage))
2558 {
2559 memcpy(pvDst, pvSrc, cb);
2560 PGMPhysReleasePageMappingLock(pVM, &Lock);
2561 return VINF_SUCCESS;
2562 }
2563
2564 /* copy to the end of the page. */
2565 memcpy(pvDst, pvSrc, cbPage);
2566 PGMPhysReleasePageMappingLock(pVM, &Lock);
2567 GCPhysSrc += cbPage;
2568 pvDst = (uint8_t *)pvDst + cbPage;
2569 cb -= cbPage;
2570
2571 /*
2572 * Page by page.
2573 */
2574 for (;;)
2575 {
2576 /* map the page */
2577 rc = PGMPhysGCPhys2CCPtrReadOnly(pVM, GCPhysSrc, &pvSrc, &Lock);
2578 if (RT_FAILURE(rc))
2579 return rc;
2580
2581 /* last page? */
2582 if (cb <= PAGE_SIZE)
2583 {
2584 memcpy(pvDst, pvSrc, cb);
2585 PGMPhysReleasePageMappingLock(pVM, &Lock);
2586 return VINF_SUCCESS;
2587 }
2588
2589 /* copy the entire page and advance */
2590 memcpy(pvDst, pvSrc, PAGE_SIZE);
2591 PGMPhysReleasePageMappingLock(pVM, &Lock);
2592 GCPhysSrc += PAGE_SIZE;
2593 pvDst = (uint8_t *)pvDst + PAGE_SIZE;
2594 cb -= PAGE_SIZE;
2595 }
2596 /* won't ever get here. */
2597}
2598
2599#ifndef IN_RC /* Ring 0 & 3 only. (Just not needed in GC.) */
2600
2601/**
2602 * Write to guest physical memory referenced by GC pointer.
2603 * Write memory to GC physical address in guest physical memory.
2604 *
2605 * This will bypass MMIO and access handlers.
2606 *
2607 * @returns VBox status.
2608 * @param pVM VM handle.
2609 * @param GCPhysDst The GC physical address of the destination.
2610 * @param pvSrc The source buffer.
2611 * @param cb The number of bytes to write.
2612 */
2613VMMDECL(int) PGMPhysSimpleWriteGCPhys(PVM pVM, RTGCPHYS GCPhysDst, const void *pvSrc, size_t cb)
2614{
2615 LogFlow(("PGMPhysSimpleWriteGCPhys: %RGp %zu\n", GCPhysDst, cb));
2616
2617 /*
2618 * Treat the first page as a special case.
2619 */
2620 if (!cb)
2621 return VINF_SUCCESS;
2622
2623 /* map the 1st page */
2624 void *pvDst;
2625 PGMPAGEMAPLOCK Lock;
2626 int rc = PGMPhysGCPhys2CCPtr(pVM, GCPhysDst, &pvDst, &Lock);
2627 if (RT_FAILURE(rc))
2628 return rc;
2629
2630 /* optimize for the case where access is completely within the first page. */
2631 size_t cbPage = PAGE_SIZE - (GCPhysDst & PAGE_OFFSET_MASK);
2632 if (RT_LIKELY(cb <= cbPage))
2633 {
2634 memcpy(pvDst, pvSrc, cb);
2635 PGMPhysReleasePageMappingLock(pVM, &Lock);
2636 return VINF_SUCCESS;
2637 }
2638
2639 /* copy to the end of the page. */
2640 memcpy(pvDst, pvSrc, cbPage);
2641 PGMPhysReleasePageMappingLock(pVM, &Lock);
2642 GCPhysDst += cbPage;
2643 pvSrc = (const uint8_t *)pvSrc + cbPage;
2644 cb -= cbPage;
2645
2646 /*
2647 * Page by page.
2648 */
2649 for (;;)
2650 {
2651 /* map the page */
2652 rc = PGMPhysGCPhys2CCPtr(pVM, GCPhysDst, &pvDst, &Lock);
2653 if (RT_FAILURE(rc))
2654 return rc;
2655
2656 /* last page? */
2657 if (cb <= PAGE_SIZE)
2658 {
2659 memcpy(pvDst, pvSrc, cb);
2660 PGMPhysReleasePageMappingLock(pVM, &Lock);
2661 return VINF_SUCCESS;
2662 }
2663
2664 /* copy the entire page and advance */
2665 memcpy(pvDst, pvSrc, PAGE_SIZE);
2666 PGMPhysReleasePageMappingLock(pVM, &Lock);
2667 GCPhysDst += PAGE_SIZE;
2668 pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2669 cb -= PAGE_SIZE;
2670 }
2671 /* won't ever get here. */
2672}
2673
2674
2675/**
2676 * Read from guest physical memory referenced by GC pointer.
2677 *
2678 * This function uses the current CR3/CR0/CR4 of the guest and will
2679 * bypass access handlers and not set any accessed bits.
2680 *
2681 * @returns VBox status.
2682 * @param pVM VM handle.
2683 * @param pvDst The destination address.
2684 * @param GCPtrSrc The source address (GC pointer).
2685 * @param cb The number of bytes to read.
2686 */
2687VMMDECL(int) PGMPhysSimpleReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
2688{
2689 /*
2690 * Treat the first page as a special case.
2691 */
2692 if (!cb)
2693 return VINF_SUCCESS;
2694
2695 /* map the 1st page */
2696 void const *pvSrc;
2697 PGMPAGEMAPLOCK Lock;
2698 int rc = PGMPhysGCPtr2CCPtrReadOnly(pVM, GCPtrSrc, &pvSrc, &Lock);
2699 if (RT_FAILURE(rc))
2700 return rc;
2701
2702 /* optimize for the case where access is completely within the first page. */
2703 size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
2704 if (RT_LIKELY(cb <= cbPage))
2705 {
2706 memcpy(pvDst, pvSrc, cb);
2707 PGMPhysReleasePageMappingLock(pVM, &Lock);
2708 return VINF_SUCCESS;
2709 }
2710
2711 /* copy to the end of the page. */
2712 memcpy(pvDst, pvSrc, cbPage);
2713 PGMPhysReleasePageMappingLock(pVM, &Lock);
2714 GCPtrSrc = (RTGCPTR)((RTGCUINTPTR)GCPtrSrc + cbPage);
2715 pvDst = (uint8_t *)pvDst + cbPage;
2716 cb -= cbPage;
2717
2718 /*
2719 * Page by page.
2720 */
2721 for (;;)
2722 {
2723 /* map the page */
2724 rc = PGMPhysGCPtr2CCPtrReadOnly(pVM, GCPtrSrc, &pvSrc, &Lock);
2725 if (RT_FAILURE(rc))
2726 return rc;
2727
2728 /* last page? */
2729 if (cb <= PAGE_SIZE)
2730 {
2731 memcpy(pvDst, pvSrc, cb);
2732 PGMPhysReleasePageMappingLock(pVM, &Lock);
2733 return VINF_SUCCESS;
2734 }
2735
2736 /* copy the entire page and advance */
2737 memcpy(pvDst, pvSrc, PAGE_SIZE);
2738 PGMPhysReleasePageMappingLock(pVM, &Lock);
2739 GCPtrSrc = (RTGCPTR)((RTGCUINTPTR)GCPtrSrc + PAGE_SIZE);
2740 pvDst = (uint8_t *)pvDst + PAGE_SIZE;
2741 cb -= PAGE_SIZE;
2742 }
2743 /* won't ever get here. */
2744}
2745
2746
2747/**
2748 * Write to guest physical memory referenced by GC pointer.
2749 *
2750 * This function uses the current CR3/CR0/CR4 of the guest and will
2751 * bypass access handlers and not set dirty or accessed bits.
2752 *
2753 * @returns VBox status.
2754 * @param pVM VM handle.
2755 * @param GCPtrDst The destination address (GC pointer).
2756 * @param pvSrc The source address.
2757 * @param cb The number of bytes to write.
2758 */
2759VMMDECL(int) PGMPhysSimpleWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2760{
2761 /*
2762 * Treat the first page as a special case.
2763 */
2764 if (!cb)
2765 return VINF_SUCCESS;
2766
2767 /* map the 1st page */
2768 void *pvDst;
2769 PGMPAGEMAPLOCK Lock;
2770 int rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2771 if (RT_FAILURE(rc))
2772 return rc;
2773
2774 /* optimize for the case where access is completely within the first page. */
2775 size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2776 if (RT_LIKELY(cb <= cbPage))
2777 {
2778 memcpy(pvDst, pvSrc, cb);
2779 PGMPhysReleasePageMappingLock(pVM, &Lock);
2780 return VINF_SUCCESS;
2781 }
2782
2783 /* copy to the end of the page. */
2784 memcpy(pvDst, pvSrc, cbPage);
2785 PGMPhysReleasePageMappingLock(pVM, &Lock);
2786 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
2787 pvSrc = (const uint8_t *)pvSrc + cbPage;
2788 cb -= cbPage;
2789
2790 /*
2791 * Page by page.
2792 */
2793 for (;;)
2794 {
2795 /* map the page */
2796 rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2797 if (RT_FAILURE(rc))
2798 return rc;
2799
2800 /* last page? */
2801 if (cb <= PAGE_SIZE)
2802 {
2803 memcpy(pvDst, pvSrc, cb);
2804 PGMPhysReleasePageMappingLock(pVM, &Lock);
2805 return VINF_SUCCESS;
2806 }
2807
2808 /* copy the entire page and advance */
2809 memcpy(pvDst, pvSrc, PAGE_SIZE);
2810 PGMPhysReleasePageMappingLock(pVM, &Lock);
2811 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
2812 pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2813 cb -= PAGE_SIZE;
2814 }
2815 /* won't ever get here. */
2816}
2817
2818
2819/**
2820 * Write to guest physical memory referenced by GC pointer and update the PTE.
2821 *
2822 * This function uses the current CR3/CR0/CR4 of the guest and will
2823 * bypass access handlers but will set any dirty and accessed bits in the PTE.
2824 *
2825 * If you don't want to set the dirty bit, use PGMPhysSimpleWriteGCPtr().
2826 *
2827 * @returns VBox status.
2828 * @param pVM VM handle.
2829 * @param GCPtrDst The destination address (GC pointer).
2830 * @param pvSrc The source address.
2831 * @param cb The number of bytes to write.
2832 */
2833VMMDECL(int) PGMPhysSimpleDirtyWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2834{
2835 /*
2836 * Treat the first page as a special case.
2837 * Btw. this is the same code as in PGMPhyssimpleWriteGCPtr excep for the PGMGstModifyPage.
2838 */
2839 if (!cb)
2840 return VINF_SUCCESS;
2841
2842 /* map the 1st page */
2843 void *pvDst;
2844 PGMPAGEMAPLOCK Lock;
2845 int rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2846 if (RT_FAILURE(rc))
2847 return rc;
2848
2849 /* optimize for the case where access is completely within the first page. */
2850 size_t cbPage = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
2851 if (RT_LIKELY(cb <= cbPage))
2852 {
2853 memcpy(pvDst, pvSrc, cb);
2854 PGMPhysReleasePageMappingLock(pVM, &Lock);
2855 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2856 return VINF_SUCCESS;
2857 }
2858
2859 /* copy to the end of the page. */
2860 memcpy(pvDst, pvSrc, cbPage);
2861 PGMPhysReleasePageMappingLock(pVM, &Lock);
2862 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2863 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + cbPage);
2864 pvSrc = (const uint8_t *)pvSrc + cbPage;
2865 cb -= cbPage;
2866
2867 /*
2868 * Page by page.
2869 */
2870 for (;;)
2871 {
2872 /* map the page */
2873 rc = PGMPhysGCPtr2CCPtr(pVM, GCPtrDst, &pvDst, &Lock);
2874 if (RT_FAILURE(rc))
2875 return rc;
2876
2877 /* last page? */
2878 if (cb <= PAGE_SIZE)
2879 {
2880 memcpy(pvDst, pvSrc, cb);
2881 PGMPhysReleasePageMappingLock(pVM, &Lock);
2882 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2883 return VINF_SUCCESS;
2884 }
2885
2886 /* copy the entire page and advance */
2887 memcpy(pvDst, pvSrc, PAGE_SIZE);
2888 PGMPhysReleasePageMappingLock(pVM, &Lock);
2889 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D)); AssertRC(rc);
2890 GCPtrDst = (RTGCPTR)((RTGCUINTPTR)GCPtrDst + PAGE_SIZE);
2891 pvSrc = (const uint8_t *)pvSrc + PAGE_SIZE;
2892 cb -= PAGE_SIZE;
2893 }
2894 /* won't ever get here. */
2895}
2896
2897
2898/**
2899 * Read from guest physical memory referenced by GC pointer.
2900 *
2901 * This function uses the current CR3/CR0/CR4 of the guest and will
2902 * respect access handlers and set accessed bits.
2903 *
2904 * @returns VBox status.
2905 * @param pVM VM handle.
2906 * @param pvDst The destination address.
2907 * @param GCPtrSrc The source address (GC pointer).
2908 * @param cb The number of bytes to read.
2909 */
2910VMMDECL(int) PGMPhysReadGCPtr(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb)
2911{
2912 RTGCPHYS GCPhys;
2913 int rc;
2914
2915 /*
2916 * Anything to do?
2917 */
2918 if (!cb)
2919 return VINF_SUCCESS;
2920
2921 LogFlow(("PGMPhysReadGCPtr: %RGv %zu\n", GCPtrSrc, cb));
2922
2923 /*
2924 * Optimize reads within a single page.
2925 */
2926 if (((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2927 {
2928 /* Convert virtual to physical address */
2929 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2930 AssertRCReturn(rc, rc);
2931
2932 /* mark the guest page as accessed. */
2933 rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2934 AssertRC(rc);
2935
2936 PGMPhysRead(pVM, GCPhys, pvDst, cb);
2937 return VINF_SUCCESS;
2938 }
2939
2940 /*
2941 * Page by page.
2942 */
2943 for (;;)
2944 {
2945 /* Convert virtual to physical address */
2946 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrSrc, &GCPhys);
2947 AssertRCReturn(rc, rc);
2948
2949 /* mark the guest page as accessed. */
2950 int rc = PGMGstModifyPage(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)(X86_PTE_A));
2951 AssertRC(rc);
2952
2953 /* copy */
2954 size_t cbRead = PAGE_SIZE - ((RTGCUINTPTR)GCPtrSrc & PAGE_OFFSET_MASK);
2955 if (cbRead >= cb)
2956 {
2957 PGMPhysRead(pVM, GCPhys, pvDst, cb);
2958 return VINF_SUCCESS;
2959 }
2960 PGMPhysRead(pVM, GCPhys, pvDst, cbRead);
2961
2962 /* next */
2963 cb -= cbRead;
2964 pvDst = (uint8_t *)pvDst + cbRead;
2965 GCPtrSrc += cbRead;
2966 }
2967}
2968
2969
2970/**
2971 * Write to guest physical memory referenced by GC pointer.
2972 *
2973 * This function uses the current CR3/CR0/CR4 of the guest and will
2974 * respect access handlers and set dirty and accessed bits.
2975 *
2976 * @returns VBox status.
2977 * @param pVM VM handle.
2978 * @param GCPtrDst The destination address (GC pointer).
2979 * @param pvSrc The source address.
2980 * @param cb The number of bytes to write.
2981 */
2982VMMDECL(int) PGMPhysWriteGCPtr(PVM pVM, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
2983{
2984 RTGCPHYS GCPhys;
2985 int rc;
2986
2987 /*
2988 * Anything to do?
2989 */
2990 if (!cb)
2991 return VINF_SUCCESS;
2992
2993 LogFlow(("PGMPhysWriteGCPtr: %RGv %zu\n", GCPtrDst, cb));
2994
2995 /*
2996 * Optimize writes within a single page.
2997 */
2998 if (((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK) + cb <= PAGE_SIZE)
2999 {
3000 /* Convert virtual to physical address */
3001 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
3002 AssertMsgRCReturn(rc, ("PGMPhysGCPtr2GCPhys failed with %Rrc for %RGv\n", rc, GCPtrDst), rc);
3003
3004 /* mark the guest page as accessed and dirty. */
3005 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
3006 AssertRC(rc);
3007
3008 PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
3009 return VINF_SUCCESS;
3010 }
3011
3012 /*
3013 * Page by page.
3014 */
3015 for (;;)
3016 {
3017 /* Convert virtual to physical address */
3018 rc = PGMPhysGCPtr2GCPhys(pVM, GCPtrDst, &GCPhys);
3019 AssertRCReturn(rc, rc);
3020
3021 /* mark the guest page as accessed and dirty. */
3022 rc = PGMGstModifyPage(pVM, GCPtrDst, 1, X86_PTE_A | X86_PTE_D, ~(uint64_t)(X86_PTE_A | X86_PTE_D));
3023 AssertRC(rc);
3024
3025 /* copy */
3026 size_t cbWrite = PAGE_SIZE - ((RTGCUINTPTR)GCPtrDst & PAGE_OFFSET_MASK);
3027 if (cbWrite >= cb)
3028 {
3029 PGMPhysWrite(pVM, GCPhys, pvSrc, cb);
3030 return VINF_SUCCESS;
3031 }
3032 PGMPhysWrite(pVM, GCPhys, pvSrc, cbWrite);
3033
3034 /* next */
3035 cb -= cbWrite;
3036 pvSrc = (uint8_t *)pvSrc + cbWrite;
3037 GCPtrDst += cbWrite;
3038 }
3039}
3040
3041#endif /* !IN_RC */
3042
3043/**
3044 * Performs a read of guest virtual memory for instruction emulation.
3045 *
3046 * This will check permissions, raise exceptions and update the access bits.
3047 *
3048 * The current implementation will bypass all access handlers. It may later be
3049 * changed to at least respect MMIO.
3050 *
3051 *
3052 * @returns VBox status code suitable to scheduling.
3053 * @retval VINF_SUCCESS if the read was performed successfully.
3054 * @retval VINF_EM_RAW_GUEST_TRAP if an exception was raised but not dispatched yet.
3055 * @retval VINF_TRPM_XCPT_DISPATCHED if an exception was raised and dispatched.
3056 *
3057 * @param pVM The VM handle.
3058 * @param pCtxCore The context core.
3059 * @param pvDst Where to put the bytes we've read.
3060 * @param GCPtrSrc The source address.
3061 * @param cb The number of bytes to read. Not more than a page.
3062 *
3063 * @remark This function will dynamically map physical pages in GC. This may unmap
3064 * mappings done by the caller. Be careful!
3065 */
3066VMMDECL(int) PGMPhysInterpretedRead(PVM pVM, PCPUMCTXCORE pCtxCore, void *pvDst, RTGCUINTPTR GCPtrSrc, size_t cb)
3067{
3068 Assert(cb <= PAGE_SIZE);
3069
3070/** @todo r=bird: This isn't perfect!
3071 * -# It's not checking for reserved bits being 1.
3072 * -# It's not correctly dealing with the access bit.
3073 * -# It's not respecting MMIO memory or any other access handlers.
3074 */
3075 /*
3076 * 1. Translate virtual to physical. This may fault.
3077 * 2. Map the physical address.
3078 * 3. Do the read operation.
3079 * 4. Set access bits if required.
3080 */
3081 int rc;
3082 unsigned cb1 = PAGE_SIZE - (GCPtrSrc & PAGE_OFFSET_MASK);
3083 if (cb <= cb1)
3084 {
3085 /*
3086 * Not crossing pages.
3087 */
3088 RTGCPHYS GCPhys;
3089 uint64_t fFlags;
3090 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags, &GCPhys);
3091 if (RT_SUCCESS(rc))
3092 {
3093 /** @todo we should check reserved bits ... */
3094 void *pvSrc;
3095 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys, &pvSrc);
3096 switch (rc)
3097 {
3098 case VINF_SUCCESS:
3099 Log(("PGMPhysInterpretedRead: pvDst=%p pvSrc=%p cb=%d\n", pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb));
3100 memcpy(pvDst, (uint8_t *)pvSrc + (GCPtrSrc & PAGE_OFFSET_MASK), cb);
3101 break;
3102 case VERR_PGM_PHYS_PAGE_RESERVED:
3103 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
3104 memset(pvDst, 0, cb); /** @todo this is wrong, it should be 0xff */
3105 break;
3106 default:
3107 return rc;
3108 }
3109
3110 /** @todo access bit emulation isn't 100% correct. */
3111 if (!(fFlags & X86_PTE_A))
3112 {
3113 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
3114 AssertRC(rc);
3115 }
3116 return VINF_SUCCESS;
3117 }
3118 }
3119 else
3120 {
3121 /*
3122 * Crosses pages.
3123 */
3124 size_t cb2 = cb - cb1;
3125 uint64_t fFlags1;
3126 RTGCPHYS GCPhys1;
3127 uint64_t fFlags2;
3128 RTGCPHYS GCPhys2;
3129 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc, &fFlags1, &GCPhys1);
3130 if (RT_SUCCESS(rc))
3131 rc = PGM_GST_PFN(GetPage,pVM)(pVM, GCPtrSrc + cb1, &fFlags2, &GCPhys2);
3132 if (RT_SUCCESS(rc))
3133 {
3134 /** @todo we should check reserved bits ... */
3135 AssertMsgFailed(("cb=%d cb1=%d cb2=%d GCPtrSrc=%RGv\n", cb, cb1, cb2, GCPtrSrc));
3136 void *pvSrc1;
3137 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys1, &pvSrc1);
3138 switch (rc)
3139 {
3140 case VINF_SUCCESS:
3141 memcpy(pvDst, (uint8_t *)pvSrc1 + (GCPtrSrc & PAGE_OFFSET_MASK), cb1);
3142 break;
3143 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
3144 memset(pvDst, 0, cb1); /** @todo this is wrong, it should be 0xff */
3145 break;
3146 default:
3147 return rc;
3148 }
3149
3150 void *pvSrc2;
3151 rc = PGM_GCPHYS_2_PTR(pVM, GCPhys2, &pvSrc2);
3152 switch (rc)
3153 {
3154 case VINF_SUCCESS:
3155 memcpy((uint8_t *)pvDst + cb1, pvSrc2, cb2);
3156 break;
3157 case VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS:
3158 memset((uint8_t *)pvDst + cb1, 0, cb2); /** @todo this is wrong, it should be 0xff */
3159 break;
3160 default:
3161 return rc;
3162 }
3163
3164 if (!(fFlags1 & X86_PTE_A))
3165 {
3166 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
3167 AssertRC(rc);
3168 }
3169 if (!(fFlags2 & X86_PTE_A))
3170 {
3171 rc = PGM_GST_PFN(ModifyPage,pVM)(pVM, GCPtrSrc + cb1, 1, X86_PTE_A, ~(uint64_t)X86_PTE_A);
3172 AssertRC(rc);
3173 }
3174 return VINF_SUCCESS;
3175 }
3176 }
3177
3178 /*
3179 * Raise a #PF.
3180 */
3181 uint32_t uErr;
3182
3183 /* Get the current privilege level. */
3184 uint32_t cpl = CPUMGetGuestCPL(pVM, pCtxCore);
3185 switch (rc)
3186 {
3187 case VINF_SUCCESS:
3188 uErr = (cpl >= 2) ? X86_TRAP_PF_RSVD | X86_TRAP_PF_US : X86_TRAP_PF_RSVD;
3189 break;
3190
3191 case VERR_PAGE_NOT_PRESENT:
3192 case VERR_PAGE_TABLE_NOT_PRESENT:
3193 uErr = (cpl >= 2) ? X86_TRAP_PF_US : 0;
3194 break;
3195
3196 default:
3197 AssertMsgFailed(("rc=%Rrc GCPtrSrc=%RGv cb=%#x\n", rc, GCPtrSrc, cb));
3198 return rc;
3199 }
3200 Log(("PGMPhysInterpretedRead: GCPtrSrc=%RGv cb=%#x -> #PF(%#x)\n", GCPtrSrc, cb, uErr));
3201 return TRPMRaiseXcptErrCR2(pVM, pCtxCore, X86_XCPT_PF, uErr, GCPtrSrc);
3202}
3203
3204/// @todo VMMDECL(int) PGMPhysInterpretedWrite(PVM pVM, PCPUMCTXCORE pCtxCore, RTGCPTR GCPtrDst, const void *pvSrc, size_t cb)
3205
3206
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