VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/IOM.cpp@ 45301

Last change on this file since 45301 was 45301, checked in by vboxsync, 12 years ago

IOM: Preparing to use read/write critsect.
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1/* $Id: IOM.cpp 45301 2013-04-03 09:51:13Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.215389.xyz. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/** @page pg_iom IOM - The Input / Output Monitor
20 *
21 * The input/output monitor will handle I/O exceptions routing them to the
22 * appropriate device. It implements an API to register and deregister virtual
23 * I/0 port handlers and memory mapped I/O handlers. A handler is PDM devices
24 * and a set of callback functions.
25 *
26 * @see grp_iom
27 *
28 *
29 * @section sec_iom_rawmode Raw-Mode
30 *
31 * In raw-mode I/O port access is trapped (\#GP(0)) by ensuring that the actual
32 * IOPL is 0 regardless of what the guest IOPL is. The \#GP handler use the
33 * disassembler (DIS) to figure which instruction caused it (there are a number
34 * of instructions in addition to the I/O ones) and if it's an I/O port access
35 * it will hand it to IOMRCIOPortHandler (via EMInterpretPortIO).
36 * IOMRCIOPortHandler will lookup the port in the AVL tree of registered
37 * handlers. If found, the handler will be called otherwise default action is
38 * taken. (Default action is to write into the void and read all set bits.)
39 *
40 * Memory Mapped I/O (MMIO) is implemented as a slightly special case of PGM
41 * access handlers. An MMIO range is registered with IOM which then registers it
42 * with the PGM access handler sub-system. The access handler catches all
43 * access and will be called in the context of a \#PF handler. In RC and R0 this
44 * handler is IOMMMIOHandler while in ring-3 it's IOMR3MMIOHandler (although in
45 * ring-3 there can be alternative ways). IOMMMIOHandler will attempt to emulate
46 * the instruction that is doing the access and pass the corresponding reads /
47 * writes to the device.
48 *
49 * Emulating I/O port access is less complex and should be slightly faster than
50 * emulating MMIO, so in most cases we should encourage the OS to use port I/O.
51 * Devices which are frequently accessed should register GC handlers to speed up
52 * execution.
53 *
54 *
55 * @section sec_iom_hm Hardware Assisted Virtualization Mode
56 *
57 * When running in hardware assisted virtualization mode we'll be doing much the
58 * same things as in raw-mode. The main difference is that we're running in the
59 * host ring-0 context and that we don't get faults (\#GP(0) and \#PG) but
60 * exits.
61 *
62 *
63 * @section sec_iom_rem Recompiled Execution Mode
64 *
65 * When running in the recompiler things are different. I/O port access is
66 * handled by calling IOMIOPortRead and IOMIOPortWrite directly. While MMIO can
67 * be handled in one of two ways. The normal way is that we have a registered a
68 * special RAM range with the recompiler and in the three callbacks (for byte,
69 * word and dword access) we call IOMMMIORead and IOMMMIOWrite directly. The
70 * alternative ways that the physical memory access which goes via PGM will take
71 * care of it by calling IOMR3MMIOHandler via the PGM access handler machinery
72 * - this shouldn't happen but it is an alternative...
73 *
74 *
75 * @section sec_iom_other Other Accesses
76 *
77 * I/O ports aren't really exposed in any other way, unless you count the
78 * instruction interpreter in EM, but that's just what we're doing in the
79 * raw-mode \#GP(0) case really. Now, it's possible to call IOMIOPortRead and
80 * IOMIOPortWrite directly to talk to a device, but this is really bad behavior
81 * and should only be done as temporary hacks (the PC BIOS device used to setup
82 * the CMOS this way back in the dark ages).
83 *
84 * MMIO has similar direct routes as the I/O ports and these shouldn't be used
85 * for the same reasons and with the same restrictions. OTOH since MMIO is
86 * mapped into the physical memory address space, it can be accessed in a number
87 * of ways thru PGM.
88 *
89 */
90
91/** @todo MMIO - simplifying the device end.
92 * - Add a return status for doing DBGFSTOP on access where there are no known
93 * registers.
94 * -
95 *
96 * */
97
98
99/*******************************************************************************
100* Header Files *
101*******************************************************************************/
102#define LOG_GROUP LOG_GROUP_IOM
103#include <VBox/vmm/iom.h>
104#include <VBox/vmm/cpum.h>
105#include <VBox/vmm/pgm.h>
106#include <VBox/sup.h>
107#include <VBox/vmm/mm.h>
108#include <VBox/vmm/stam.h>
109#include <VBox/vmm/dbgf.h>
110#include <VBox/vmm/pdmapi.h>
111#include <VBox/vmm/pdmdev.h>
112#include "IOMInternal.h"
113#include <VBox/vmm/vm.h>
114
115#include <VBox/param.h>
116#include <iprt/assert.h>
117#include <iprt/alloc.h>
118#include <iprt/string.h>
119#include <VBox/log.h>
120#include <VBox/err.h>
121
122#include "IOMInline.h"
123
124
125/*******************************************************************************
126* Internal Functions *
127*******************************************************************************/
128static void iomR3FlushCache(PVM pVM);
129static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser);
130static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser);
131static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
132static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
133static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
134static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
135static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
136static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
137
138#ifdef VBOX_WITH_STATISTICS
139static const char *iomR3IOPortGetStandardName(RTIOPORT Port);
140#endif
141
142
143/**
144 * Initializes the IOM.
145 *
146 * @returns VBox status code.
147 * @param pVM Pointer to the VM.
148 */
149VMMR3_INT_DECL(int) IOMR3Init(PVM pVM)
150{
151 LogFlow(("IOMR3Init:\n"));
152
153 /*
154 * Assert alignment and sizes.
155 */
156 AssertCompileMemberAlignment(VM, iom.s, 32);
157 AssertCompile(sizeof(pVM->iom.s) <= sizeof(pVM->iom.padding));
158 AssertCompileMemberAlignment(IOM, CritSect, sizeof(uintptr_t));
159
160 /*
161 * Setup any fixed pointers and offsets.
162 */
163 pVM->iom.s.offVM = RT_OFFSETOF(VM, iom);
164
165 /*
166 * Initialize the REM critical section.
167 */
168#ifdef IOM_WITH_CRIT_SECT_RW
169 int rc = PDMR3CritSectRwInit(pVM, &pVM->iom.s.CritSect, RT_SRC_POS, "IOM Lock");
170#else
171 int rc = PDMR3CritSectInit(pVM, &pVM->iom.s.CritSect, RT_SRC_POS, "IOM Lock");
172#endif
173 AssertRCReturn(rc, rc);
174
175 /*
176 * Allocate the trees structure.
177 */
178 rc = MMHyperAlloc(pVM, sizeof(*pVM->iom.s.pTreesR3), 0, MM_TAG_IOM, (void **)&pVM->iom.s.pTreesR3);
179 if (RT_SUCCESS(rc))
180 {
181 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
182 pVM->iom.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->iom.s.pTreesR3);
183 pVM->iom.s.pfnMMIOHandlerRC = NIL_RTGCPTR;
184 pVM->iom.s.pfnMMIOHandlerR0 = NIL_RTR0PTR;
185
186 /*
187 * Info.
188 */
189 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo);
190 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo);
191
192 /*
193 * Statistics.
194 */
195 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMMMIOHandler() body, only success calls.");
196 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter.");
197 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter.");
198 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter.");
199 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8", STAMUNIT_OCCURENCES, "MMIO access by 8 bytes counter.");
200 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOFailures, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMMMIOHandler() didn't service the request.");
201 STAM_REG(pVM, &pVM->iom.s.StatRZInstMov, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation.");
202 STAM_REG(pVM, &pVM->iom.s.StatRZInstCmp, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation.");
203 STAM_REG(pVM, &pVM->iom.s.StatRZInstAnd, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation.");
204 STAM_REG(pVM, &pVM->iom.s.StatRZInstOr, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/OR", STAMUNIT_TICKS_PER_CALL, "Profiling of the OR instruction emulation.");
205 STAM_REG(pVM, &pVM->iom.s.StatRZInstXor, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XOR", STAMUNIT_TICKS_PER_CALL, "Profiling of the XOR instruction emulation.");
206 STAM_REG(pVM, &pVM->iom.s.StatRZInstBt, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/BT", STAMUNIT_TICKS_PER_CALL, "Profiling of the BT instruction emulation.");
207 STAM_REG(pVM, &pVM->iom.s.StatRZInstTest, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation.");
208 STAM_REG(pVM, &pVM->iom.s.StatRZInstXchg, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation.");
209 STAM_REG(pVM, &pVM->iom.s.StatRZInstStos, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation.");
210 STAM_REG(pVM, &pVM->iom.s.StatRZInstLods, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation.");
211#ifdef IOM_WITH_MOVS_SUPPORT
212 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovs, STAMTYPE_PROFILE_ADV, "/IOM/RZ-MMIOHandler/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");
213 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");
214 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");
215 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");
216#endif
217 STAM_REG(pVM, &pVM->iom.s.StatRZInstOther, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter.");
218 STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler, STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler", STAMUNIT_OCCURENCES, "Number of calls to IOMR3MMIOHandler.");
219 STAM_REG(pVM, &pVM->iom.s.StatInstIn, STAMTYPE_COUNTER, "/IOM/IOWork/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions.");
220 STAM_REG(pVM, &pVM->iom.s.StatInstOut, STAMTYPE_COUNTER, "/IOM/IOWork/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions.");
221 STAM_REG(pVM, &pVM->iom.s.StatInstIns, STAMTYPE_COUNTER, "/IOM/IOWork/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions.");
222 STAM_REG(pVM, &pVM->iom.s.StatInstOuts, STAMTYPE_COUNTER, "/IOM/IOWork/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions.");
223 }
224
225 /* Redundant, but just in case we change something in the future */
226 iomR3FlushCache(pVM);
227
228 LogFlow(("IOMR3Init: returns %Rrc\n", rc));
229 return rc;
230}
231
232
233/**
234 * Flushes the IOM port & statistics lookup cache
235 *
236 * @param pVM The VM.
237 */
238static void iomR3FlushCache(PVM pVM)
239{
240 IOM_LOCK(pVM);
241
242 /*
243 * Caching of port and statistics (saves some time in rep outs/ins instruction emulation)
244 */
245 pVM->iom.s.pRangeLastReadR0 = NIL_RTR0PTR;
246 pVM->iom.s.pRangeLastWriteR0 = NIL_RTR0PTR;
247 pVM->iom.s.pStatsLastReadR0 = NIL_RTR0PTR;
248 pVM->iom.s.pStatsLastWriteR0 = NIL_RTR0PTR;
249 pVM->iom.s.pMMIORangeLastR0 = NIL_RTR0PTR;
250 pVM->iom.s.pMMIOStatsLastR0 = NIL_RTR0PTR;
251
252 pVM->iom.s.pRangeLastReadR3 = NULL;
253 pVM->iom.s.pRangeLastWriteR3 = NULL;
254 pVM->iom.s.pStatsLastReadR3 = NULL;
255 pVM->iom.s.pStatsLastWriteR3 = NULL;
256 pVM->iom.s.pMMIORangeLastR3 = NULL;
257 pVM->iom.s.pMMIOStatsLastR3 = NULL;
258
259 pVM->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
260 pVM->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
261 pVM->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
262 pVM->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
263 pVM->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
264 pVM->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
265
266 IOM_UNLOCK(pVM);
267}
268
269
270/**
271 * The VM is being reset.
272 *
273 * @param pVM Pointer to the VM.
274 */
275VMMR3_INT_DECL(void) IOMR3Reset(PVM pVM)
276{
277 iomR3FlushCache(pVM);
278}
279
280
281/**
282 * Applies relocations to data and code managed by this
283 * component. This function will be called at init and
284 * whenever the VMM need to relocate it self inside the GC.
285 *
286 * The IOM will update the addresses used by the switcher.
287 *
288 * @param pVM The VM.
289 * @param offDelta Relocation delta relative to old location.
290 */
291VMMR3_INT_DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
292{
293 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta));
294
295 /*
296 * Apply relocations to the GC callbacks.
297 */
298 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
299 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3RelocateIOPortCallback, &offDelta);
300 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3RelocateMMIOCallback, &offDelta);
301
302 if (pVM->iom.s.pfnMMIOHandlerRC)
303 pVM->iom.s.pfnMMIOHandlerRC += offDelta;
304
305 /*
306 * Apply relocations to the cached GC handlers
307 */
308 if (pVM->iom.s.pRangeLastReadRC)
309 pVM->iom.s.pRangeLastReadRC += offDelta;
310 if (pVM->iom.s.pRangeLastWriteRC)
311 pVM->iom.s.pRangeLastWriteRC += offDelta;
312 if (pVM->iom.s.pStatsLastReadRC)
313 pVM->iom.s.pStatsLastReadRC += offDelta;
314 if (pVM->iom.s.pStatsLastWriteRC)
315 pVM->iom.s.pStatsLastWriteRC += offDelta;
316 if (pVM->iom.s.pMMIORangeLastRC)
317 pVM->iom.s.pMMIORangeLastRC += offDelta;
318 if (pVM->iom.s.pMMIOStatsLastRC)
319 pVM->iom.s.pMMIOStatsLastRC += offDelta;
320}
321
322
323/**
324 * Callback function for relocating a I/O port range.
325 *
326 * @returns 0 (continue enum)
327 * @param pNode Pointer to a IOMIOPORTRANGERC node.
328 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
329 * not certain the delta will fit in a void pointer for all possible configs.
330 */
331static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser)
332{
333 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
334 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
335
336 Assert(pRange->pDevIns);
337 pRange->pDevIns += offDelta;
338 if (pRange->pfnOutCallback)
339 pRange->pfnOutCallback += offDelta;
340 if (pRange->pfnInCallback)
341 pRange->pfnInCallback += offDelta;
342 if (pRange->pfnOutStrCallback)
343 pRange->pfnOutStrCallback += offDelta;
344 if (pRange->pfnInStrCallback)
345 pRange->pfnInStrCallback += offDelta;
346 if (pRange->pvUser > _64K)
347 pRange->pvUser += offDelta;
348 return 0;
349}
350
351
352/**
353 * Callback function for relocating a MMIO range.
354 *
355 * @returns 0 (continue enum)
356 * @param pNode Pointer to a IOMMMIORANGE node.
357 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
358 * not certain the delta will fit in a void pointer for all possible configs.
359 */
360static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
361{
362 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
363 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
364
365 if (pRange->pDevInsRC)
366 pRange->pDevInsRC += offDelta;
367 if (pRange->pfnWriteCallbackRC)
368 pRange->pfnWriteCallbackRC += offDelta;
369 if (pRange->pfnReadCallbackRC)
370 pRange->pfnReadCallbackRC += offDelta;
371 if (pRange->pfnFillCallbackRC)
372 pRange->pfnFillCallbackRC += offDelta;
373 if (pRange->pvUserRC > _64K)
374 pRange->pvUserRC += offDelta;
375
376 return 0;
377}
378
379
380/**
381 * Terminates the IOM.
382 *
383 * Termination means cleaning up and freeing all resources,
384 * the VM it self is at this point powered off or suspended.
385 *
386 * @returns VBox status code.
387 * @param pVM Pointer to the VM.
388 */
389VMMR3_INT_DECL(int) IOMR3Term(PVM pVM)
390{
391 /*
392 * IOM is not owning anything but automatically freed resources,
393 * so there's nothing to do here.
394 */
395 NOREF(pVM);
396 return VINF_SUCCESS;
397}
398
399#ifdef VBOX_WITH_STATISTICS
400
401/**
402 * Create the statistics node for an I/O port.
403 *
404 * @returns Pointer to new stats node.
405 *
406 * @param pVM Pointer to the VM.
407 * @param Port Port.
408 * @param pszDesc Description.
409 */
410PIOMIOPORTSTATS iomR3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc)
411{
412 Assert(IOM_IS_EXCL_LOCK_OWNER(pVM));
413
414 /* check if it already exists. */
415 PIOMIOPORTSTATS pPort = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.pTreesR3->IOPortStatTree, Port);
416 if (pPort)
417 return pPort;
418
419 /* allocate stats node. */
420 int rc = MMHyperAlloc(pVM, sizeof(*pPort), 0, MM_TAG_IOM_STATS, (void **)&pPort);
421 AssertRC(rc);
422 if (RT_SUCCESS(rc))
423 {
424 /* insert into the tree. */
425 pPort->Core.Key = Port;
426 if (RTAvloIOPortInsert(&pVM->iom.s.pTreesR3->IOPortStatTree, &pPort->Core))
427 {
428 /* put a name on common ports. */
429 if (!pszDesc)
430 pszDesc = iomR3IOPortGetStandardName(Port);
431
432 /* register the statistics counters. */
433 rc = STAMR3RegisterF(pVM, &pPort->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-R3", Port); AssertRC(rc);
434 rc = STAMR3RegisterF(pVM, &pPort->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-R3", Port); AssertRC(rc);
435 rc = STAMR3RegisterF(pVM, &pPort->InRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZ", Port); AssertRC(rc);
436 rc = STAMR3RegisterF(pVM, &pPort->OutRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZ", Port); AssertRC(rc);
437 rc = STAMR3RegisterF(pVM, &pPort->InRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZtoR3", Port); AssertRC(rc);
438 rc = STAMR3RegisterF(pVM, &pPort->OutRZToR3,STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZtoR3", Port); AssertRC(rc);
439
440 /* Profiling */
441 rc = STAMR3RegisterF(pVM, &pPort->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-R3/Prof", Port); AssertRC(rc);
442 rc = STAMR3RegisterF(pVM, &pPort->ProfOutR3,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-R3/Prof", Port); AssertRC(rc);
443 rc = STAMR3RegisterF(pVM, &pPort->ProfInRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-RZ/Prof", Port); AssertRC(rc);
444 rc = STAMR3RegisterF(pVM, &pPort->ProfOutRZ,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-RZ/Prof", Port); AssertRC(rc);
445
446 return pPort;
447 }
448 AssertMsgFailed(("what! Port=%d\n", Port));
449 MMHyperFree(pVM, pPort);
450 }
451 return NULL;
452}
453
454
455/**
456 * Create the statistics node for an MMIO address.
457 *
458 * @returns Pointer to new stats node.
459 *
460 * @param pVM Pointer to the VM.
461 * @param GCPhys The address.
462 * @param pszDesc Description.
463 */
464PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc)
465{
466 Assert(IOM_IS_EXCL_LOCK_OWNER(pVM));
467#ifdef DEBUG_sandervl
468 AssertGCPhys32(GCPhys);
469#endif
470
471 /* check if it already exists. */
472 PIOMMMIOSTATS pStats = (PIOMMMIOSTATS)RTAvloGCPhysGet(&pVM->iom.s.pTreesR3->MmioStatTree, GCPhys);
473 if (pStats)
474 return pStats;
475
476 /* allocate stats node. */
477 int rc = MMHyperAlloc(pVM, sizeof(*pStats), 0, MM_TAG_IOM_STATS, (void **)&pStats);
478 AssertRC(rc);
479 if (RT_SUCCESS(rc))
480 {
481 /* insert into the tree. */
482 pStats->Core.Key = GCPhys;
483 if (RTAvloGCPhysInsert(&pVM->iom.s.pTreesR3->MmioStatTree, &pStats->Core))
484 {
485 rc = STAMR3RegisterF(pVM, &pStats->Accesses, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp", GCPhys); AssertRC(rc);
486 rc = STAMR3RegisterF(pVM, &pStats->ProfReadR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-R3", GCPhys); AssertRC(rc);
487 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-R3", GCPhys); AssertRC(rc);
488 rc = STAMR3RegisterF(pVM, &pStats->ProfReadRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Read-RZ", GCPhys); AssertRC(rc);
489 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp/Write-RZ", GCPhys); AssertRC(rc);
490 rc = STAMR3RegisterF(pVM, &pStats->ReadRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Read-RZtoR3", GCPhys); AssertRC(rc);
491 rc = STAMR3RegisterF(pVM, &pStats->WriteRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp/Write-RZtoR3", GCPhys); AssertRC(rc);
492
493 return pStats;
494 }
495 AssertMsgFailed(("what! GCPhys=%RGp\n", GCPhys));
496 MMHyperFree(pVM, pStats);
497 }
498 return NULL;
499}
500
501#endif /* VBOX_WITH_STATISTICS */
502
503/**
504 * Registers a I/O port ring-3 handler.
505 *
506 * This API is called by PDM on behalf of a device. Devices must first register
507 * ring-3 ranges before any GC and R0 ranges can be registered using IOMR3IOPortRegisterRC()
508 * and IOMR3IOPortRegisterR0().
509 *
510 *
511 * @returns VBox status code.
512 *
513 * @param pVM Pointer to the VM.
514 * @param pDevIns PDM device instance owning the port range.
515 * @param PortStart First port number in the range.
516 * @param cPorts Number of ports to register.
517 * @param pvUser User argument for the callbacks.
518 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in R3.
519 * @param pfnInCallback Pointer to function which is gonna handle IN operations in R3.
520 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in R3.
521 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in R3.
522 * @param pszDesc Pointer to description string. This must not be freed.
523 */
524VMMR3_INT_DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
525 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
526 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
527{
528 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n",
529 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
530
531 /*
532 * Validate input.
533 */
534 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
535 || (RTUINT)PortStart + cPorts > 0x10000)
536 {
537 AssertMsgFailed(("Invalid port range %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
538 return VERR_IOM_INVALID_IOPORT_RANGE;
539 }
540 if (!pfnOutCallback && !pfnInCallback)
541 {
542 AssertMsgFailed(("no handlers specfied for %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
543 return VERR_INVALID_PARAMETER;
544 }
545 if (!pfnOutCallback)
546 pfnOutCallback = iomR3IOPortDummyOut;
547 if (!pfnInCallback)
548 pfnInCallback = iomR3IOPortDummyIn;
549 if (!pfnOutStrCallback)
550 pfnOutStrCallback = iomR3IOPortDummyOutStr;
551 if (!pfnInStrCallback)
552 pfnInStrCallback = iomR3IOPortDummyInStr;
553
554 /* Flush the IO port lookup cache */
555 iomR3FlushCache(pVM);
556
557 /*
558 * Allocate new range record and initialize it.
559 */
560 PIOMIOPORTRANGER3 pRange;
561 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
562 if (RT_SUCCESS(rc))
563 {
564 pRange->Core.Key = PortStart;
565 pRange->Core.KeyLast = PortStart + (cPorts - 1);
566 pRange->Port = PortStart;
567 pRange->cPorts = cPorts;
568 pRange->pvUser = pvUser;
569 pRange->pDevIns = pDevIns;
570 pRange->pfnOutCallback = pfnOutCallback;
571 pRange->pfnInCallback = pfnInCallback;
572 pRange->pfnOutStrCallback = pfnOutStrCallback;
573 pRange->pfnInStrCallback = pfnInStrCallback;
574 pRange->pszDesc = pszDesc;
575
576 /*
577 * Try Insert it.
578 */
579 IOM_LOCK(pVM);
580 if (RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRange->Core))
581 {
582#ifdef VBOX_WITH_STATISTICS
583 for (unsigned iPort = 0; iPort < cPorts; iPort++)
584 iomR3IOPortStatsCreate(pVM, PortStart + iPort, pszDesc);
585#endif
586 IOM_UNLOCK(pVM);
587 return VINF_SUCCESS;
588 }
589 IOM_UNLOCK(pVM);
590
591 /* conflict. */
592 DBGFR3Info(pVM->pUVM, "ioport", NULL, NULL);
593 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
594 MMHyperFree(pVM, pRange);
595 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
596 }
597
598 return rc;
599}
600
601
602/**
603 * Registers a I/O port RC handler.
604 *
605 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
606 * using IOMIOPortRegisterR3() before calling this function.
607 *
608 *
609 * @returns VBox status code.
610 *
611 * @param pVM Pointer to the VM.
612 * @param pDevIns PDM device instance owning the port range.
613 * @param PortStart First port number in the range.
614 * @param cPorts Number of ports to register.
615 * @param pvUser User argument for the callbacks.
616 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
617 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
618 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in GC.
619 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in GC.
620 * @param pszDesc Pointer to description string. This must not be freed.
621 */
622VMMR3_INT_DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,
623 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
624 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
625{
626 LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RRv pfnOutCallback=%RRv pfnInCallback=%RRv pfnOutStrCallback=%RRv pfnInStrCallback=%RRv pszDesc=%s\n",
627 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
628
629 /*
630 * Validate input.
631 */
632 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
633 || (RTUINT)PortStart + cPorts > 0x10000)
634 {
635 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
636 return VERR_IOM_INVALID_IOPORT_RANGE;
637 }
638 RTIOPORT PortLast = PortStart + (cPorts - 1);
639 if (!pfnOutCallback && !pfnInCallback)
640 {
641 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
642 return VERR_INVALID_PARAMETER;
643 }
644
645 IOM_LOCK(pVM);
646
647 /*
648 * Validate that there are ring-3 ranges for the ports.
649 */
650 RTIOPORT Port = PortStart;
651 while (Port <= PortLast && Port >= PortStart)
652 {
653 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
654 if (!pRange)
655 {
656 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
657 IOM_UNLOCK(pVM);
658 return VERR_IOM_NO_R3_IOPORT_RANGE;
659 }
660#ifndef IOM_NO_PDMINS_CHECKS
661# ifndef IN_RC
662 if (pRange->pDevIns != pDevIns)
663# else
664 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
665# endif
666 {
667 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
668 IOM_UNLOCK(pVM);
669 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
670 }
671#endif
672 Port = pRange->Core.KeyLast + 1;
673 }
674
675 /* Flush the IO port lookup cache */
676 iomR3FlushCache(pVM);
677
678 /*
679 * Allocate new range record and initialize it.
680 */
681 PIOMIOPORTRANGERC pRange;
682 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
683 if (RT_SUCCESS(rc))
684 {
685 pRange->Core.Key = PortStart;
686 pRange->Core.KeyLast = PortLast;
687 pRange->Port = PortStart;
688 pRange->cPorts = cPorts;
689 pRange->pvUser = pvUser;
690 pRange->pfnOutCallback = pfnOutCallback;
691 pRange->pfnInCallback = pfnInCallback;
692 pRange->pfnOutStrCallback = pfnOutStrCallback;
693 pRange->pfnInStrCallback = pfnInStrCallback;
694 pRange->pDevIns = MMHyperCCToRC(pVM, pDevIns);
695 pRange->pszDesc = pszDesc;
696
697 /*
698 * Insert it.
699 */
700 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeRC, &pRange->Core))
701 {
702 IOM_UNLOCK(pVM);
703 return VINF_SUCCESS;
704 }
705
706 /* conflict. */
707 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
708 MMHyperFree(pVM, pRange);
709 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
710 }
711 IOM_UNLOCK(pVM);
712 return rc;
713}
714
715
716/**
717 * Registers a Port IO R0 handler.
718 *
719 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
720 * using IOMR3IOPortRegisterR3() before calling this function.
721 *
722 *
723 * @returns VBox status code.
724 *
725 * @param pVM Pointer to the VM.
726 * @param pDevIns PDM device instance owning the port range.
727 * @param PortStart First port number in the range.
728 * @param cPorts Number of ports to register.
729 * @param pvUser User argument for the callbacks.
730 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
731 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
732 * @param pfnOutStrCallback Pointer to function which is gonna handle OUT operations in GC.
733 * @param pfnInStrCallback Pointer to function which is gonna handle IN operations in GC.
734 * @param pszDesc Pointer to description string. This must not be freed.
735 */
736VMMR3_INT_DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,
737 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
738 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
739 const char *pszDesc)
740{
741 LogFlow(("IOMR3IOPortRegisterR0: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%RHv pfnOutCallback=%RHv pfnInCallback=%RHv pfnOutStrCallback=%RHv pfnInStrCallback=%RHv pszDesc=%s\n",
742 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
743
744 /*
745 * Validate input.
746 */
747 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
748 || (RTUINT)PortStart + cPorts > 0x10000)
749 {
750 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
751 return VERR_IOM_INVALID_IOPORT_RANGE;
752 }
753 RTIOPORT PortLast = PortStart + (cPorts - 1);
754 if (!pfnOutCallback && !pfnInCallback)
755 {
756 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
757 return VERR_INVALID_PARAMETER;
758 }
759
760 IOM_LOCK(pVM);
761 /*
762 * Validate that there are ring-3 ranges for the ports.
763 */
764 RTIOPORT Port = PortStart;
765 while (Port <= PortLast && Port >= PortStart)
766 {
767 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
768 if (!pRange)
769 {
770 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
771 IOM_UNLOCK(pVM);
772 return VERR_IOM_NO_R3_IOPORT_RANGE;
773 }
774#ifndef IOM_NO_PDMINS_CHECKS
775# ifndef IN_RC
776 if (pRange->pDevIns != pDevIns)
777# else
778 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
779# endif
780 {
781 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
782 IOM_UNLOCK(pVM);
783 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
784 }
785#endif
786 Port = pRange->Core.KeyLast + 1;
787 }
788
789 /* Flush the IO port lookup cache */
790 iomR3FlushCache(pVM);
791
792 /*
793 * Allocate new range record and initialize it.
794 */
795 PIOMIOPORTRANGER0 pRange;
796 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
797 if (RT_SUCCESS(rc))
798 {
799 pRange->Core.Key = PortStart;
800 pRange->Core.KeyLast = PortLast;
801 pRange->Port = PortStart;
802 pRange->cPorts = cPorts;
803 pRange->pvUser = pvUser;
804 pRange->pfnOutCallback = pfnOutCallback;
805 pRange->pfnInCallback = pfnInCallback;
806 pRange->pfnOutStrCallback = pfnOutStrCallback;
807 pRange->pfnInStrCallback = pfnInStrCallback;
808 pRange->pDevIns = MMHyperR3ToR0(pVM, pDevIns);
809 pRange->pszDesc = pszDesc;
810
811 /*
812 * Insert it.
813 */
814 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR0, &pRange->Core))
815 {
816 IOM_UNLOCK(pVM);
817 return VINF_SUCCESS;
818 }
819
820 /* conflict. */
821 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
822 MMHyperFree(pVM, pRange);
823 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
824 }
825 IOM_UNLOCK(pVM);
826 return rc;
827}
828
829
830/**
831 * Deregisters a I/O Port range.
832 *
833 * The specified range must be registered using IOMR3IOPortRegister previous to
834 * this call. The range does can be a smaller part of the range specified to
835 * IOMR3IOPortRegister, but it can never be larger.
836 *
837 * This function will remove GC, R0 and R3 context port handlers for this range.
838 *
839 * @returns VBox status code.
840 *
841 * @param pVM The virtual machine.
842 * @param pDevIns The device instance associated with the range.
843 * @param PortStart First port number in the range.
844 * @param cPorts Number of ports to remove starting at PortStart.
845 *
846 * @remark This function mainly for PCI PnP Config and will not do
847 * all the checks you might expect it to do.
848 */
849VMMR3_INT_DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)
850{
851 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts));
852
853 /*
854 * Validate input.
855 */
856 if ( (RTUINT)PortStart + cPorts < (RTUINT)PortStart
857 || (RTUINT)PortStart + cPorts > 0x10000)
858 {
859 AssertMsgFailed(("Invalid port range %#x-%#x!\n", PortStart, (unsigned)PortStart + cPorts - 1));
860 return VERR_IOM_INVALID_IOPORT_RANGE;
861 }
862
863 IOM_LOCK(pVM);
864
865 /* Flush the IO port lookup cache */
866 iomR3FlushCache(pVM);
867
868 /*
869 * Check ownership.
870 */
871 RTIOPORT PortLast = PortStart + (cPorts - 1);
872 RTIOPORT Port = PortStart;
873 while (Port <= PortLast && Port >= PortStart)
874 {
875 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
876 if (pRange)
877 {
878 Assert(Port <= pRange->Core.KeyLast);
879#ifndef IOM_NO_PDMINS_CHECKS
880 if (pRange->pDevIns != pDevIns)
881 {
882 AssertMsgFailed(("Removal of ports in range %#x-%#x rejected because not owner of %#x-%#x (%s)\n",
883 PortStart, PortLast, pRange->Core.Key, pRange->Core.KeyLast, pRange->pszDesc));
884 IOM_UNLOCK(pVM);
885 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
886 }
887#endif /* !IOM_NO_PDMINS_CHECKS */
888 Port = pRange->Core.KeyLast;
889 }
890 Port++;
891 }
892
893 /*
894 * Remove any RC ranges first.
895 */
896 int rc = VINF_SUCCESS;
897 Port = PortStart;
898 while (Port <= PortLast && Port >= PortStart)
899 {
900 /*
901 * Try find range.
902 */
903 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
904 if (pRange)
905 {
906 if ( pRange->Core.Key == Port
907 && pRange->Core.KeyLast <= PortLast)
908 {
909 /*
910 * Kick out the entire range.
911 */
912 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
913 Assert(pv == (void *)pRange); NOREF(pv);
914 Port += pRange->cPorts;
915 MMHyperFree(pVM, pRange);
916 }
917 else if (pRange->Core.Key == Port)
918 {
919 /*
920 * Cut of the head of the range, done.
921 */
922 pRange->cPorts -= Port - pRange->Port;
923 pRange->Core.Key = Port;
924 pRange->Port = Port;
925 break;
926 }
927 else if (pRange->Core.KeyLast <= PortLast)
928 {
929 /*
930 * Just cut of the tail.
931 */
932 unsigned c = pRange->Core.KeyLast - Port + 1;
933 pRange->Core.KeyLast -= c;
934 pRange->cPorts -= c;
935 Port += c;
936 }
937 else
938 {
939 /*
940 * Split the range, done.
941 */
942 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
943 /* create tail. */
944 PIOMIOPORTRANGERC pRangeNew;
945 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
946 if (RT_FAILURE(rc2))
947 {
948 IOM_UNLOCK(pVM);
949 return rc2;
950 }
951 *pRangeNew = *pRange;
952 pRangeNew->Core.Key = PortLast;
953 pRangeNew->Port = PortLast;
954 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
955
956 LogFlow(("IOMR3IOPortDeregister (rc): split the range; new %x\n", pRangeNew->Core.Key));
957
958 /* adjust head */
959 pRange->Core.KeyLast = Port - 1;
960 pRange->cPorts = Port - pRange->Port;
961
962 /* insert */
963 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeRC, &pRangeNew->Core))
964 {
965 AssertMsgFailed(("This cannot happen!\n"));
966 MMHyperFree(pVM, pRangeNew);
967 rc = VERR_IOM_IOPORT_IPE_1;
968 }
969 break;
970 }
971 }
972 else /* next port */
973 Port++;
974 } /* for all ports - RC. */
975
976
977 /*
978 * Remove any R0 ranges.
979 */
980 Port = PortStart;
981 while (Port <= PortLast && Port >= PortStart)
982 {
983 /*
984 * Try find range.
985 */
986 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
987 if (pRange)
988 {
989 if ( pRange->Core.Key == Port
990 && pRange->Core.KeyLast <= PortLast)
991 {
992 /*
993 * Kick out the entire range.
994 */
995 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
996 Assert(pv == (void *)pRange); NOREF(pv);
997 Port += pRange->cPorts;
998 MMHyperFree(pVM, pRange);
999 }
1000 else if (pRange->Core.Key == Port)
1001 {
1002 /*
1003 * Cut of the head of the range, done.
1004 */
1005 pRange->cPorts -= Port - pRange->Port;
1006 pRange->Core.Key = Port;
1007 pRange->Port = Port;
1008 break;
1009 }
1010 else if (pRange->Core.KeyLast <= PortLast)
1011 {
1012 /*
1013 * Just cut of the tail.
1014 */
1015 unsigned c = pRange->Core.KeyLast - Port + 1;
1016 pRange->Core.KeyLast -= c;
1017 pRange->cPorts -= c;
1018 Port += c;
1019 }
1020 else
1021 {
1022 /*
1023 * Split the range, done.
1024 */
1025 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1026 /* create tail. */
1027 PIOMIOPORTRANGER0 pRangeNew;
1028 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1029 if (RT_FAILURE(rc2))
1030 {
1031 IOM_UNLOCK(pVM);
1032 return rc2;
1033 }
1034 *pRangeNew = *pRange;
1035 pRangeNew->Core.Key = PortLast;
1036 pRangeNew->Port = PortLast;
1037 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1038
1039 LogFlow(("IOMR3IOPortDeregister (r0): split the range; new %x\n", pRangeNew->Core.Key));
1040
1041 /* adjust head */
1042 pRange->Core.KeyLast = Port - 1;
1043 pRange->cPorts = Port - pRange->Port;
1044
1045 /* insert */
1046 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR0, &pRangeNew->Core))
1047 {
1048 AssertMsgFailed(("This cannot happen!\n"));
1049 MMHyperFree(pVM, pRangeNew);
1050 rc = VERR_IOM_IOPORT_IPE_1;
1051 }
1052 break;
1053 }
1054 }
1055 else /* next port */
1056 Port++;
1057 } /* for all ports - R0. */
1058
1059 /*
1060 * And the same procedure for ring-3 ranges.
1061 */
1062 Port = PortStart;
1063 while (Port <= PortLast && Port >= PortStart)
1064 {
1065 /*
1066 * Try find range.
1067 */
1068 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1069 if (pRange)
1070 {
1071 if ( pRange->Core.Key == Port
1072 && pRange->Core.KeyLast <= PortLast)
1073 {
1074 /*
1075 * Kick out the entire range.
1076 */
1077 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1078 Assert(pv == (void *)pRange); NOREF(pv);
1079 Port += pRange->cPorts;
1080 MMHyperFree(pVM, pRange);
1081 }
1082 else if (pRange->Core.Key == Port)
1083 {
1084 /*
1085 * Cut of the head of the range, done.
1086 */
1087 pRange->cPorts -= Port - pRange->Port;
1088 pRange->Core.Key = Port;
1089 pRange->Port = Port;
1090 break;
1091 }
1092 else if (pRange->Core.KeyLast <= PortLast)
1093 {
1094 /*
1095 * Just cut of the tail.
1096 */
1097 unsigned c = pRange->Core.KeyLast - Port + 1;
1098 pRange->Core.KeyLast -= c;
1099 pRange->cPorts -= c;
1100 Port += c;
1101 }
1102 else
1103 {
1104 /*
1105 * Split the range, done.
1106 */
1107 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1108 /* create tail. */
1109 PIOMIOPORTRANGER3 pRangeNew;
1110 int rc2 = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1111 if (RT_FAILURE(rc2))
1112 {
1113 IOM_UNLOCK(pVM);
1114 return rc2;
1115 }
1116 *pRangeNew = *pRange;
1117 pRangeNew->Core.Key = PortLast;
1118 pRangeNew->Port = PortLast;
1119 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1120
1121 LogFlow(("IOMR3IOPortDeregister (r3): split the range; new %x\n", pRangeNew->Core.Key));
1122
1123 /* adjust head */
1124 pRange->Core.KeyLast = Port - 1;
1125 pRange->cPorts = Port - pRange->Port;
1126
1127 /* insert */
1128 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRangeNew->Core))
1129 {
1130 AssertMsgFailed(("This cannot happen!\n"));
1131 MMHyperFree(pVM, pRangeNew);
1132 rc = VERR_IOM_IOPORT_IPE_1;
1133 }
1134 break;
1135 }
1136 }
1137 else /* next port */
1138 Port++;
1139 } /* for all ports - ring-3. */
1140
1141 /* done */
1142 IOM_UNLOCK(pVM);
1143 return rc;
1144}
1145
1146
1147/**
1148 * Dummy Port I/O Handler for IN operations.
1149 *
1150 * @returns VBox status code.
1151 *
1152 * @param pDevIns The device instance.
1153 * @param pvUser User argument.
1154 * @param Port Port number used for the IN operation.
1155 * @param pu32 Where to store the result.
1156 * @param cb Number of bytes read.
1157 */
1158static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
1159{
1160 NOREF(pDevIns); NOREF(pvUser); NOREF(Port);
1161 switch (cb)
1162 {
1163 case 1: *pu32 = 0xff; break;
1164 case 2: *pu32 = 0xffff; break;
1165 case 4: *pu32 = UINT32_C(0xffffffff); break;
1166 default:
1167 AssertReleaseMsgFailed(("cb=%d\n", cb));
1168 return VERR_IOM_IOPORT_IPE_2;
1169 }
1170 return VINF_SUCCESS;
1171}
1172
1173
1174/**
1175 * Dummy Port I/O Handler for string IN operations.
1176 *
1177 * @returns VBox status code.
1178 *
1179 * @param pDevIns The device instance.
1180 * @param pvUser User argument.
1181 * @param Port Port number used for the string IN operation.
1182 * @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
1183 * @param pcTransfer Pointer to the number of transfer units to read, on return remaining transfer units.
1184 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1185 */
1186static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst,
1187 PRTGCUINTREG pcTransfer, unsigned cb)
1188{
1189 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrDst); NOREF(pcTransfer); NOREF(cb);
1190 return VINF_SUCCESS;
1191}
1192
1193
1194/**
1195 * Dummy Port I/O Handler for OUT operations.
1196 *
1197 * @returns VBox status code.
1198 *
1199 * @param pDevIns The device instance.
1200 * @param pvUser User argument.
1201 * @param Port Port number used for the OUT operation.
1202 * @param u32 The value to output.
1203 * @param cb The value size in bytes.
1204 */
1205static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
1206{
1207 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(u32); NOREF(cb);
1208 return VINF_SUCCESS;
1209}
1210
1211
1212/**
1213 * Dummy Port I/O Handler for string OUT operations.
1214 *
1215 * @returns VBox status code.
1216 *
1217 * @param pDevIns The device instance.
1218 * @param pvUser User argument.
1219 * @param Port Port number used for the string OUT operation.
1220 * @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
1221 * @param pcTransfer Pointer to the number of transfer units to write, on return remaining transfer units.
1222 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1223 */
1224static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc,
1225 PRTGCUINTREG pcTransfer, unsigned cb)
1226{
1227 NOREF(pDevIns); NOREF(pvUser); NOREF(Port); NOREF(pGCPtrSrc); NOREF(pcTransfer); NOREF(cb);
1228 return VINF_SUCCESS;
1229}
1230
1231
1232/**
1233 * Display a single I/O port ring-3 range.
1234 *
1235 * @returns 0
1236 * @param pNode Pointer to I/O port HC range.
1237 * @param pvUser Pointer to info output callback structure.
1238 */
1239static DECLCALLBACK(int) iomR3IOPortInfoOneR3(PAVLROIOPORTNODECORE pNode, void *pvUser)
1240{
1241 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)pNode;
1242 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1243 pHlp->pfnPrintf(pHlp,
1244 "%04x-%04x %p %p %p %p %s\n",
1245 pRange->Core.Key,
1246 pRange->Core.KeyLast,
1247 pRange->pDevIns,
1248 pRange->pfnInCallback,
1249 pRange->pfnOutCallback,
1250 pRange->pvUser,
1251 pRange->pszDesc);
1252 return 0;
1253}
1254
1255
1256/**
1257 * Display a single I/O port GC range.
1258 *
1259 * @returns 0
1260 * @param pNode Pointer to IOPORT GC range.
1261 * @param pvUser Pointer to info output callback structure.
1262 */
1263static DECLCALLBACK(int) iomR3IOPortInfoOneRC(PAVLROIOPORTNODECORE pNode, void *pvUser)
1264{
1265 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
1266 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1267 pHlp->pfnPrintf(pHlp,
1268 "%04x-%04x %RRv %RRv %RRv %RRv %s\n",
1269 pRange->Core.Key,
1270 pRange->Core.KeyLast,
1271 pRange->pDevIns,
1272 pRange->pfnInCallback,
1273 pRange->pfnOutCallback,
1274 pRange->pvUser,
1275 pRange->pszDesc);
1276 return 0;
1277}
1278
1279
1280/**
1281 * Display all registered I/O port ranges.
1282 *
1283 * @param pVM Pointer to the VM.
1284 * @param pHlp The info helpers.
1285 * @param pszArgs Arguments, ignored.
1286 */
1287static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1288{
1289 NOREF(pszArgs);
1290 pHlp->pfnPrintf(pHlp,
1291 "I/O Port R3 ranges (pVM=%p)\n"
1292 "Range %.*s %.*s %.*s %.*s Description\n",
1293 pVM,
1294 sizeof(RTHCPTR) * 2, "pDevIns ",
1295 sizeof(RTHCPTR) * 2, "In ",
1296 sizeof(RTHCPTR) * 2, "Out ",
1297 sizeof(RTHCPTR) * 2, "pvUser ");
1298 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1299
1300 pHlp->pfnPrintf(pHlp,
1301 "I/O Port R0 ranges (pVM=%p)\n"
1302 "Range %.*s %.*s %.*s %.*s Description\n",
1303 pVM,
1304 sizeof(RTHCPTR) * 2, "pDevIns ",
1305 sizeof(RTHCPTR) * 2, "In ",
1306 sizeof(RTHCPTR) * 2, "Out ",
1307 sizeof(RTHCPTR) * 2, "pvUser ");
1308 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1309
1310 pHlp->pfnPrintf(pHlp,
1311 "I/O Port GC ranges (pVM=%p)\n"
1312 "Range %.*s %.*s %.*s %.*s Description\n",
1313 pVM,
1314 sizeof(RTRCPTR) * 2, "pDevIns ",
1315 sizeof(RTRCPTR) * 2, "In ",
1316 sizeof(RTRCPTR) * 2, "Out ",
1317 sizeof(RTRCPTR) * 2, "pvUser ");
1318 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3IOPortInfoOneRC, (void *)pHlp);
1319
1320 if (pVM->iom.s.pRangeLastReadRC)
1321 {
1322 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastReadRC);
1323 pHlp->pfnPrintf(pHlp, "RC Read Ports: %#04x-%#04x %RRv %s\n",
1324 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastReadRC, pRange->pszDesc);
1325 }
1326 if (pVM->iom.s.pStatsLastReadRC)
1327 {
1328 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastReadRC);
1329 pHlp->pfnPrintf(pHlp, "RC Read Stats: %#04x %RRv\n",
1330 pRange->Core.Key, pVM->iom.s.pStatsLastReadRC);
1331 }
1332
1333 if (pVM->iom.s.pRangeLastWriteRC)
1334 {
1335 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastWriteRC);
1336 pHlp->pfnPrintf(pHlp, "RC Write Ports: %#04x-%#04x %RRv %s\n",
1337 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastWriteRC, pRange->pszDesc);
1338 }
1339 if (pVM->iom.s.pStatsLastWriteRC)
1340 {
1341 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastWriteRC);
1342 pHlp->pfnPrintf(pHlp, "RC Write Stats: %#04x %RRv\n",
1343 pRange->Core.Key, pVM->iom.s.pStatsLastWriteRC);
1344 }
1345
1346 if (pVM->iom.s.pRangeLastReadR3)
1347 {
1348 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastReadR3;
1349 pHlp->pfnPrintf(pHlp, "R3 Read Ports: %#04x-%#04x %p %s\n",
1350 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1351 }
1352 if (pVM->iom.s.pStatsLastReadR3)
1353 {
1354 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastReadR3;
1355 pHlp->pfnPrintf(pHlp, "R3 Read Stats: %#04x %p\n",
1356 pRange->Core.Key, pRange);
1357 }
1358
1359 if (pVM->iom.s.pRangeLastWriteR3)
1360 {
1361 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastWriteR3;
1362 pHlp->pfnPrintf(pHlp, "R3 Write Ports: %#04x-%#04x %p %s\n",
1363 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1364 }
1365 if (pVM->iom.s.pStatsLastWriteR3)
1366 {
1367 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastWriteR3;
1368 pHlp->pfnPrintf(pHlp, "R3 Write Stats: %#04x %p\n",
1369 pRange->Core.Key, pRange);
1370 }
1371
1372 if (pVM->iom.s.pRangeLastReadR0)
1373 {
1374 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastReadR0);
1375 pHlp->pfnPrintf(pHlp, "R0 Read Ports: %#04x-%#04x %p %s\n",
1376 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1377 }
1378 if (pVM->iom.s.pStatsLastReadR0)
1379 {
1380 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastReadR0);
1381 pHlp->pfnPrintf(pHlp, "R0 Read Stats: %#04x %p\n",
1382 pRange->Core.Key, pRange);
1383 }
1384
1385 if (pVM->iom.s.pRangeLastWriteR0)
1386 {
1387 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastWriteR0);
1388 pHlp->pfnPrintf(pHlp, "R0 Write Ports: %#04x-%#04x %p %s\n",
1389 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1390 }
1391 if (pVM->iom.s.pStatsLastWriteR0)
1392 {
1393 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastWriteR0);
1394 pHlp->pfnPrintf(pHlp, "R0 Write Stats: %#04x %p\n",
1395 pRange->Core.Key, pRange);
1396 }
1397}
1398
1399
1400/**
1401 * Registers a Memory Mapped I/O R3 handler.
1402 *
1403 * This API is called by PDM on behalf of a device. Devices must register ring-3 ranges
1404 * before any GC and R0 ranges can be registered using IOMR3MMIORegisterRC() and IOMR3MMIORegisterR0().
1405 *
1406 * @returns VBox status code.
1407 *
1408 * @param pVM Pointer to the VM.
1409 * @param pDevIns PDM device instance owning the MMIO range.
1410 * @param GCPhysStart First physical address in the range.
1411 * @param cbRange The size of the range (in bytes).
1412 * @param pvUser User argument for the callbacks.
1413 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1414 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1415 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1416 * @param pszDesc Pointer to description string. This must not be freed.
1417 */
1418VMMR3_INT_DECL(int)
1419IOMR3MmioRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
1420 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1421 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, uint32_t fFlags, const char *pszDesc)
1422{
1423 LogFlow(("IOMR3MmioRegisterR3: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x fFlags=%#x pszDesc=%s\n",
1424 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback, fFlags, pszDesc));
1425 int rc;
1426
1427 /*
1428 * Validate input.
1429 */
1430 AssertMsgReturn(GCPhysStart + (cbRange - 1) >= GCPhysStart,("Wrapped! %RGp %#x bytes\n", GCPhysStart, cbRange),
1431 VERR_IOM_INVALID_MMIO_RANGE);
1432 AssertMsgReturn( !(fFlags & ~IOMMMIO_FLAGS_VALID_MASK)
1433 && (fFlags & IOMMMIO_FLAGS_READ_MODE) <= IOMMMIO_FLAGS_READ_DWORD_QWORD
1434 && (fFlags & IOMMMIO_FLAGS_WRITE_MODE) <= IOMMMIO_FLAGS_WRITE_ONLY_DWORD_QWORD,
1435 ("%#x\n", fFlags),
1436 VERR_INVALID_PARAMETER);
1437
1438 /*
1439 * Resolve the GC/R0 handler addresses lazily because of init order.
1440 */
1441 if (pVM->iom.s.pfnMMIOHandlerR0 == NIL_RTR0PTR)
1442 {
1443 rc = PDMR3LdrGetSymbolRC(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerRC);
1444 AssertLogRelRCReturn(rc, rc);
1445 rc = PDMR3LdrGetSymbolR0(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerR0);
1446 AssertLogRelRCReturn(rc, rc);
1447 }
1448
1449 /*
1450 * Allocate new range record and initialize it.
1451 */
1452 PIOMMMIORANGE pRange;
1453 rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
1454 if (RT_SUCCESS(rc))
1455 {
1456 pRange->Core.Key = GCPhysStart;
1457 pRange->Core.KeyLast = GCPhysStart + (cbRange - 1);
1458 pRange->GCPhys = GCPhysStart;
1459 pRange->cb = cbRange;
1460 pRange->cRefs = 1; /* The tree reference. */
1461 pRange->pszDesc = pszDesc;
1462
1463 //pRange->pvUserR0 = NIL_RTR0PTR;
1464 //pRange->pDevInsR0 = NIL_RTR0PTR;
1465 //pRange->pfnReadCallbackR0 = NIL_RTR0PTR;
1466 //pRange->pfnWriteCallbackR0 = NIL_RTR0PTR;
1467 //pRange->pfnFillCallbackR0 = NIL_RTR0PTR;
1468
1469 //pRange->pvUserRC = NIL_RTRCPTR;
1470 //pRange->pDevInsRC = NIL_RTRCPTR;
1471 //pRange->pfnReadCallbackRC = NIL_RTRCPTR;
1472 //pRange->pfnWriteCallbackRC = NIL_RTRCPTR;
1473 //pRange->pfnFillCallbackRC = NIL_RTRCPTR;
1474
1475 pRange->fFlags = fFlags;
1476
1477 pRange->pvUserR3 = pvUser;
1478 pRange->pDevInsR3 = pDevIns;
1479 pRange->pfnReadCallbackR3 = pfnReadCallback;
1480 pRange->pfnWriteCallbackR3 = pfnWriteCallback;
1481 pRange->pfnFillCallbackR3 = pfnFillCallback;
1482
1483 /*
1484 * Try register it with PGM and then insert it into the tree.
1485 */
1486 IOM_LOCK(pVM);
1487 iomR3FlushCache(pVM);
1488 rc = PGMR3PhysMMIORegister(pVM, GCPhysStart, cbRange,
1489 IOMR3MMIOHandler, pRange,
1490 pVM->iom.s.pfnMMIOHandlerR0, MMHyperR3ToR0(pVM, pRange),
1491 pVM->iom.s.pfnMMIOHandlerRC, MMHyperR3ToRC(pVM, pRange), pszDesc);
1492 if (RT_SUCCESS(rc))
1493 {
1494 if (RTAvlroGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOTree, &pRange->Core))
1495 {
1496 IOM_UNLOCK(pVM);
1497 return VINF_SUCCESS;
1498 }
1499
1500 /* bail out */
1501 IOM_UNLOCK(pVM);
1502 DBGFR3Info(pVM->pUVM, "mmio", NULL, NULL);
1503 AssertMsgFailed(("This cannot happen!\n"));
1504 rc = VERR_IOM_IOPORT_IPE_3;
1505 }
1506 else
1507 IOM_UNLOCK(pVM);
1508
1509 MMHyperFree(pVM, pRange);
1510 }
1511 if (pDevIns->iInstance > 0)
1512 MMR3HeapFree((void *)pszDesc);
1513 return rc;
1514}
1515
1516
1517/**
1518 * Registers a Memory Mapped I/O RC handler range.
1519 *
1520 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1521 * using IOMMMIORegisterR3() before calling this function.
1522 *
1523 *
1524 * @returns VBox status code.
1525 *
1526 * @param pVM Pointer to the VM.
1527 * @param pDevIns PDM device instance owning the MMIO range.
1528 * @param GCPhysStart First physical address in the range.
1529 * @param cbRange The size of the range (in bytes).
1530 * @param pvUser User argument for the callbacks.
1531 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1532 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1533 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1534 */
1535VMMR3_INT_DECL(int)
1536IOMR3MmioRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTGCPTR pvUser,
1537 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1538 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1539{
1540 LogFlow(("IOMR3MmioRegisterRC: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RGv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1541 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1542
1543 /*
1544 * Validate input.
1545 */
1546 if (!pfnWriteCallback && !pfnReadCallback)
1547 {
1548 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1549 return VERR_INVALID_PARAMETER;
1550 }
1551
1552 /*
1553 * Find the MMIO range and check that the input matches.
1554 */
1555 IOM_LOCK(pVM);
1556 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhysStart);
1557 AssertReturnStmt(pRange, IOM_UNLOCK(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1558 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1559 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1560 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1561
1562 pRange->pvUserRC = pvUser;
1563 pRange->pfnReadCallbackRC = pfnReadCallback;
1564 pRange->pfnWriteCallbackRC= pfnWriteCallback;
1565 pRange->pfnFillCallbackRC = pfnFillCallback;
1566 pRange->pDevInsRC = MMHyperCCToRC(pVM, pDevIns);
1567 IOM_UNLOCK(pVM);
1568
1569 return VINF_SUCCESS;
1570}
1571
1572
1573/**
1574 * Registers a Memory Mapped I/O R0 handler range.
1575 *
1576 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1577 * using IOMMR3MIORegisterHC() before calling this function.
1578 *
1579 *
1580 * @returns VBox status code.
1581 *
1582 * @param pVM Pointer to the VM.
1583 * @param pDevIns PDM device instance owning the MMIO range.
1584 * @param GCPhysStart First physical address in the range.
1585 * @param cbRange The size of the range (in bytes).
1586 * @param pvUser User argument for the callbacks.
1587 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1588 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1589 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1590 */
1591VMMR3_INT_DECL(int)
1592IOMR3MmioRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
1593 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
1594 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1595 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1596{
1597 LogFlow(("IOMR3MmioRegisterR0: pDevIns=%p GCPhysStart=%RGp cbRange=%#x pvUser=%RHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1598 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1599
1600 /*
1601 * Validate input.
1602 */
1603 if (!pfnWriteCallback && !pfnReadCallback)
1604 {
1605 AssertMsgFailed(("No callbacks! %RGp LB%#x %s\n", GCPhysStart, cbRange));
1606 return VERR_INVALID_PARAMETER;
1607 }
1608
1609 /*
1610 * Find the MMIO range and check that the input matches.
1611 */
1612 IOM_LOCK(pVM);
1613 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhysStart);
1614 AssertReturnStmt(pRange, IOM_UNLOCK(pVM), VERR_IOM_MMIO_RANGE_NOT_FOUND);
1615 AssertReturnStmt(pRange->pDevInsR3 == pDevIns, IOM_UNLOCK(pVM), VERR_IOM_NOT_MMIO_RANGE_OWNER);
1616 AssertReturnStmt(pRange->GCPhys == GCPhysStart, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1617 AssertReturnStmt(pRange->cb == cbRange, IOM_UNLOCK(pVM), VERR_IOM_INVALID_MMIO_RANGE);
1618
1619 pRange->pvUserR0 = pvUser;
1620 pRange->pfnReadCallbackR0 = pfnReadCallback;
1621 pRange->pfnWriteCallbackR0= pfnWriteCallback;
1622 pRange->pfnFillCallbackR0 = pfnFillCallback;
1623 pRange->pDevInsR0 = MMHyperCCToR0(pVM, pDevIns);
1624 IOM_UNLOCK(pVM);
1625
1626 return VINF_SUCCESS;
1627}
1628
1629
1630/**
1631 * Deregisters a Memory Mapped I/O handler range.
1632 *
1633 * Registered GC, R0, and R3 ranges are affected.
1634 *
1635 * @returns VBox status code.
1636 *
1637 * @param pVM The virtual machine.
1638 * @param pDevIns Device instance which the MMIO region is registered.
1639 * @param GCPhysStart First physical address (GC) in the range.
1640 * @param cbRange Number of bytes to deregister.
1641 *
1642 * @remark This function mainly for PCI PnP Config and will not do
1643 * all the checks you might expect it to do.
1644 */
1645VMMR3_INT_DECL(int) IOMR3MmioDeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
1646{
1647 LogFlow(("IOMR3MmioDeregister: pDevIns=%p GCPhysStart=%RGp cbRange=%#x\n", pDevIns, GCPhysStart, cbRange));
1648
1649 /*
1650 * Validate input.
1651 */
1652 RTGCPHYS GCPhysLast = GCPhysStart + (cbRange - 1);
1653 if (GCPhysLast < GCPhysStart)
1654 {
1655 AssertMsgFailed(("Wrapped! %#x LB%#x\n", GCPhysStart, cbRange));
1656 return VERR_IOM_INVALID_MMIO_RANGE;
1657 }
1658
1659 IOM_LOCK(pVM);
1660
1661 /*
1662 * Check ownership and such for the entire area.
1663 */
1664 RTGCPHYS GCPhys = GCPhysStart;
1665 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1666 {
1667 PIOMMMIORANGE pRange = iomMmioGetRange(pVM, GCPhys);
1668 if (!pRange)
1669 {
1670 IOM_UNLOCK(pVM);
1671 return VERR_IOM_MMIO_RANGE_NOT_FOUND;
1672 }
1673 AssertMsgReturnStmt(pRange->pDevInsR3 == pDevIns,
1674 ("Not owner! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1675 IOM_UNLOCK(pVM),
1676 VERR_IOM_NOT_MMIO_RANGE_OWNER);
1677 AssertMsgReturnStmt(pRange->Core.KeyLast <= GCPhysLast,
1678 ("Incomplete R3 range! GCPhys=%RGp %RGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1679 IOM_UNLOCK(pVM),
1680 VERR_IOM_INCOMPLETE_MMIO_RANGE);
1681
1682 /* next */
1683 Assert(GCPhys <= pRange->Core.KeyLast);
1684 GCPhys = pRange->Core.KeyLast + 1;
1685 }
1686
1687 /*
1688 * Do the actual removing of the MMIO ranges.
1689 */
1690 GCPhys = GCPhysStart;
1691 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1692 {
1693 iomR3FlushCache(pVM);
1694
1695 PIOMMMIORANGE pRange = (PIOMMMIORANGE)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesR3->MMIOTree, GCPhys);
1696 Assert(pRange);
1697 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1698 IOM_UNLOCK(pVM); /** @todo r=bird: Why are we leaving the lock here? We don't leave it when registering the range above... */
1699
1700 /* remove it from PGM */
1701 int rc = PGMR3PhysMMIODeregister(pVM, GCPhys, pRange->cb);
1702 AssertRC(rc);
1703
1704 IOM_LOCK(pVM);
1705
1706 /* advance and free. */
1707 GCPhys = pRange->Core.KeyLast + 1;
1708 if (pDevIns->iInstance > 0)
1709 {
1710 void *pvDesc = ASMAtomicXchgPtr((void * volatile *)&pRange->pszDesc, NULL);
1711 MMR3HeapFree(pvDesc);
1712 }
1713 iomMmioReleaseRange(pVM, pRange);
1714 }
1715
1716 IOM_UNLOCK(pVM);
1717 return VINF_SUCCESS;
1718}
1719
1720
1721/**
1722 * Display a single MMIO range.
1723 *
1724 * @returns 0
1725 * @param pNode Pointer to MMIO R3 range.
1726 * @param pvUser Pointer to info output callback structure.
1727 */
1728static DECLCALLBACK(int) iomR3MMIOInfoOne(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1729{
1730 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
1731 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1732 pHlp->pfnPrintf(pHlp,
1733 "%RGp-%RGp %RHv %RHv %RHv %RHv %RHv %s\n",
1734 pRange->Core.Key,
1735 pRange->Core.KeyLast,
1736 pRange->pDevInsR3,
1737 pRange->pfnReadCallbackR3,
1738 pRange->pfnWriteCallbackR3,
1739 pRange->pfnFillCallbackR3,
1740 pRange->pvUserR3,
1741 pRange->pszDesc);
1742 pHlp->pfnPrintf(pHlp,
1743 "%*s %RHv %RHv %RHv %RHv %RHv\n",
1744 sizeof(RTGCPHYS) * 2 * 2 + 1, "R0",
1745 pRange->pDevInsR0,
1746 pRange->pfnReadCallbackR0,
1747 pRange->pfnWriteCallbackR0,
1748 pRange->pfnFillCallbackR0,
1749 pRange->pvUserR0);
1750 pHlp->pfnPrintf(pHlp,
1751 "%*s %RRv %RRv %RRv %RRv %RRv\n",
1752 sizeof(RTGCPHYS) * 2 * 2 + 1, "RC",
1753 pRange->pDevInsRC,
1754 pRange->pfnReadCallbackRC,
1755 pRange->pfnWriteCallbackRC,
1756 pRange->pfnFillCallbackRC,
1757 pRange->pvUserRC);
1758 return 0;
1759}
1760
1761
1762/**
1763 * Display registered MMIO ranges to the log.
1764 *
1765 * @param pVM Pointer to the VM.
1766 * @param pHlp The info helpers.
1767 * @param pszArgs Arguments, ignored.
1768 */
1769static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1770{
1771 NOREF(pszArgs);
1772 pHlp->pfnPrintf(pHlp,
1773 "MMIO ranges (pVM=%p)\n"
1774 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1775 pVM,
1776 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1777 sizeof(RTHCPTR) * 2, "pDevIns ",
1778 sizeof(RTHCPTR) * 2, "Read ",
1779 sizeof(RTHCPTR) * 2, "Write ",
1780 sizeof(RTHCPTR) * 2, "Fill ",
1781 sizeof(RTHCPTR) * 2, "pvUser ",
1782 "Description");
1783 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3MMIOInfoOne, (void *)pHlp);
1784}
1785
1786
1787#ifdef VBOX_WITH_STATISTICS
1788/**
1789 * Tries to come up with the standard name for a port.
1790 *
1791 * @returns Pointer to readonly string if known.
1792 * @returns NULL if unknown port number.
1793 *
1794 * @param Port The port to name.
1795 */
1796static const char *iomR3IOPortGetStandardName(RTIOPORT Port)
1797{
1798 switch (Port)
1799 {
1800 case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x70:
1801 case 0x01: case 0x11: case 0x21: case 0x31: case 0x41: case 0x51: case 0x61: case 0x71:
1802 case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
1803 case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
1804 case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x74:
1805 case 0x05: case 0x15: case 0x25: case 0x35: case 0x45: case 0x55: case 0x65: case 0x75:
1806 case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
1807 case 0x07: case 0x17: case 0x27: case 0x37: case 0x47: case 0x57: case 0x67: case 0x77:
1808 case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
1809 case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
1810 case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
1811 case 0x0b: case 0x1b: case 0x2b: case 0x3b: case 0x4b: case 0x5b: case 0x6b: case 0x7b:
1812 case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
1813 case 0x0d: case 0x1d: case 0x2d: case 0x3d: case 0x4d: case 0x5d: case 0x6d: case 0x7d:
1814 case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
1815 case 0x0f: case 0x1f: case 0x2f: case 0x3f: case 0x4f: case 0x5f: case 0x6f: case 0x7f:
1816
1817 case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
1818 case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
1819 case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
1820 case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
1821 case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
1822 case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
1823 case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
1824 case 0x87: case 0x97: case 0xa7: case 0xb7: case 0xc7: case 0xd7: case 0xe7: case 0xf7:
1825 case 0x88: case 0x98: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8:
1826 case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9:
1827 case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa:
1828 case 0x8b: case 0x9b: case 0xab: case 0xbb: case 0xcb: case 0xdb: case 0xeb: case 0xfb:
1829 case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc:
1830 case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd: case 0xed: case 0xfd:
1831 case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe:
1832 case 0x8f: case 0x9f: case 0xaf: case 0xbf: case 0xcf: case 0xdf: case 0xef: case 0xff:
1833 return "System Reserved";
1834
1835 case 0x60:
1836 case 0x64:
1837 return "Keyboard & Mouse";
1838
1839 case 0x378:
1840 case 0x379:
1841 case 0x37a:
1842 case 0x37b:
1843 case 0x37c:
1844 case 0x37d:
1845 case 0x37e:
1846 case 0x37f:
1847 case 0x3bc:
1848 case 0x3bd:
1849 case 0x3be:
1850 case 0x3bf:
1851 case 0x278:
1852 case 0x279:
1853 case 0x27a:
1854 case 0x27b:
1855 case 0x27c:
1856 case 0x27d:
1857 case 0x27e:
1858 case 0x27f:
1859 return "LPT1/2/3";
1860
1861 case 0x3f8:
1862 case 0x3f9:
1863 case 0x3fa:
1864 case 0x3fb:
1865 case 0x3fc:
1866 case 0x3fd:
1867 case 0x3fe:
1868 case 0x3ff:
1869 return "COM1";
1870
1871 case 0x2f8:
1872 case 0x2f9:
1873 case 0x2fa:
1874 case 0x2fb:
1875 case 0x2fc:
1876 case 0x2fd:
1877 case 0x2fe:
1878 case 0x2ff:
1879 return "COM2";
1880
1881 case 0x3e8:
1882 case 0x3e9:
1883 case 0x3ea:
1884 case 0x3eb:
1885 case 0x3ec:
1886 case 0x3ed:
1887 case 0x3ee:
1888 case 0x3ef:
1889 return "COM3";
1890
1891 case 0x2e8:
1892 case 0x2e9:
1893 case 0x2ea:
1894 case 0x2eb:
1895 case 0x2ec:
1896 case 0x2ed:
1897 case 0x2ee:
1898 case 0x2ef:
1899 return "COM4";
1900
1901 case 0x200:
1902 case 0x201:
1903 case 0x202:
1904 case 0x203:
1905 case 0x204:
1906 case 0x205:
1907 case 0x206:
1908 case 0x207:
1909 return "Joystick";
1910
1911 case 0x3f0:
1912 case 0x3f1:
1913 case 0x3f2:
1914 case 0x3f3:
1915 case 0x3f4:
1916 case 0x3f5:
1917 case 0x3f6:
1918 case 0x3f7:
1919 return "Floppy";
1920
1921 case 0x1f0:
1922 case 0x1f1:
1923 case 0x1f2:
1924 case 0x1f3:
1925 case 0x1f4:
1926 case 0x1f5:
1927 case 0x1f6:
1928 case 0x1f7:
1929 //case 0x3f6:
1930 //case 0x3f7:
1931 return "IDE 1st";
1932
1933 case 0x170:
1934 case 0x171:
1935 case 0x172:
1936 case 0x173:
1937 case 0x174:
1938 case 0x175:
1939 case 0x176:
1940 case 0x177:
1941 case 0x376:
1942 case 0x377:
1943 return "IDE 2nd";
1944
1945 case 0x1e0:
1946 case 0x1e1:
1947 case 0x1e2:
1948 case 0x1e3:
1949 case 0x1e4:
1950 case 0x1e5:
1951 case 0x1e6:
1952 case 0x1e7:
1953 case 0x3e6:
1954 case 0x3e7:
1955 return "IDE 3rd";
1956
1957 case 0x160:
1958 case 0x161:
1959 case 0x162:
1960 case 0x163:
1961 case 0x164:
1962 case 0x165:
1963 case 0x166:
1964 case 0x167:
1965 case 0x366:
1966 case 0x367:
1967 return "IDE 4th";
1968
1969 case 0x130: case 0x140: case 0x150:
1970 case 0x131: case 0x141: case 0x151:
1971 case 0x132: case 0x142: case 0x152:
1972 case 0x133: case 0x143: case 0x153:
1973 case 0x134: case 0x144: case 0x154:
1974 case 0x135: case 0x145: case 0x155:
1975 case 0x136: case 0x146: case 0x156:
1976 case 0x137: case 0x147: case 0x157:
1977 case 0x138: case 0x148: case 0x158:
1978 case 0x139: case 0x149: case 0x159:
1979 case 0x13a: case 0x14a: case 0x15a:
1980 case 0x13b: case 0x14b: case 0x15b:
1981 case 0x13c: case 0x14c: case 0x15c:
1982 case 0x13d: case 0x14d: case 0x15d:
1983 case 0x13e: case 0x14e: case 0x15e:
1984 case 0x13f: case 0x14f: case 0x15f:
1985 case 0x220: case 0x230:
1986 case 0x221: case 0x231:
1987 case 0x222: case 0x232:
1988 case 0x223: case 0x233:
1989 case 0x224: case 0x234:
1990 case 0x225: case 0x235:
1991 case 0x226: case 0x236:
1992 case 0x227: case 0x237:
1993 case 0x228: case 0x238:
1994 case 0x229: case 0x239:
1995 case 0x22a: case 0x23a:
1996 case 0x22b: case 0x23b:
1997 case 0x22c: case 0x23c:
1998 case 0x22d: case 0x23d:
1999 case 0x22e: case 0x23e:
2000 case 0x22f: case 0x23f:
2001 case 0x330: case 0x340: case 0x350:
2002 case 0x331: case 0x341: case 0x351:
2003 case 0x332: case 0x342: case 0x352:
2004 case 0x333: case 0x343: case 0x353:
2005 case 0x334: case 0x344: case 0x354:
2006 case 0x335: case 0x345: case 0x355:
2007 case 0x336: case 0x346: case 0x356:
2008 case 0x337: case 0x347: case 0x357:
2009 case 0x338: case 0x348: case 0x358:
2010 case 0x339: case 0x349: case 0x359:
2011 case 0x33a: case 0x34a: case 0x35a:
2012 case 0x33b: case 0x34b: case 0x35b:
2013 case 0x33c: case 0x34c: case 0x35c:
2014 case 0x33d: case 0x34d: case 0x35d:
2015 case 0x33e: case 0x34e: case 0x35e:
2016 case 0x33f: case 0x34f: case 0x35f:
2017 return "SCSI (typically)";
2018
2019 case 0x320:
2020 case 0x321:
2021 case 0x322:
2022 case 0x323:
2023 case 0x324:
2024 case 0x325:
2025 case 0x326:
2026 case 0x327:
2027 return "XT HD";
2028
2029 case 0x3b0:
2030 case 0x3b1:
2031 case 0x3b2:
2032 case 0x3b3:
2033 case 0x3b4:
2034 case 0x3b5:
2035 case 0x3b6:
2036 case 0x3b7:
2037 case 0x3b8:
2038 case 0x3b9:
2039 case 0x3ba:
2040 case 0x3bb:
2041 return "VGA";
2042
2043 case 0x3c0: case 0x3d0:
2044 case 0x3c1: case 0x3d1:
2045 case 0x3c2: case 0x3d2:
2046 case 0x3c3: case 0x3d3:
2047 case 0x3c4: case 0x3d4:
2048 case 0x3c5: case 0x3d5:
2049 case 0x3c6: case 0x3d6:
2050 case 0x3c7: case 0x3d7:
2051 case 0x3c8: case 0x3d8:
2052 case 0x3c9: case 0x3d9:
2053 case 0x3ca: case 0x3da:
2054 case 0x3cb: case 0x3db:
2055 case 0x3cc: case 0x3dc:
2056 case 0x3cd: case 0x3dd:
2057 case 0x3ce: case 0x3de:
2058 case 0x3cf: case 0x3df:
2059 return "VGA/EGA";
2060
2061 case 0x240: case 0x260: case 0x280:
2062 case 0x241: case 0x261: case 0x281:
2063 case 0x242: case 0x262: case 0x282:
2064 case 0x243: case 0x263: case 0x283:
2065 case 0x244: case 0x264: case 0x284:
2066 case 0x245: case 0x265: case 0x285:
2067 case 0x246: case 0x266: case 0x286:
2068 case 0x247: case 0x267: case 0x287:
2069 case 0x248: case 0x268: case 0x288:
2070 case 0x249: case 0x269: case 0x289:
2071 case 0x24a: case 0x26a: case 0x28a:
2072 case 0x24b: case 0x26b: case 0x28b:
2073 case 0x24c: case 0x26c: case 0x28c:
2074 case 0x24d: case 0x26d: case 0x28d:
2075 case 0x24e: case 0x26e: case 0x28e:
2076 case 0x24f: case 0x26f: case 0x28f:
2077 case 0x300:
2078 case 0x301:
2079 case 0x388:
2080 case 0x389:
2081 case 0x38a:
2082 case 0x38b:
2083 return "Sound Card (typically)";
2084
2085 default:
2086 return NULL;
2087 }
2088}
2089#endif /* VBOX_WITH_STATISTICS */
2090
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