VirtualBox

source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 40182

Last change on this file since 40182 was 40182, checked in by vboxsync, 13 years ago

protected mode far call and far return.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 42.5 KB
Line 
1/* $Id: IEMInternal.h 40182 2012-02-20 15:22:46Z vboxsync $ */
2/** @file
3 * IEM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2011-2012 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.215389.xyz. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef ___IEMInternal_h
19#define ___IEMInternal_h
20
21#include <VBox/vmm/stam.h>
22#include <VBox/vmm/cpum.h>
23#include <VBox/param.h>
24
25
26RT_C_DECLS_BEGIN
27
28
29/** @defgroup grp_iem_int Internals
30 * @ingroup grp_iem
31 * @internal
32 * @{
33 */
34
35
36/** Finish and move to types.h */
37typedef union
38{
39 uint32_t u32;
40} RTFLOAT32U;
41typedef RTFLOAT32U *PRTFLOAT32U;
42typedef RTFLOAT32U const *PCRTFLOAT32U;
43
44
45/**
46 * Operand or addressing mode.
47 */
48typedef enum IEMMODE
49{
50 IEMMODE_16BIT = 0,
51 IEMMODE_32BIT,
52 IEMMODE_64BIT
53} IEMMODE;
54AssertCompileSize(IEMMODE, 4);
55
56/**
57 * Extended operand mode that includes a representation of 8-bit.
58 *
59 * This is used for packing down modes when invoking some C instruction
60 * implementations.
61 */
62typedef enum IEMMODEX
63{
64 IEMMODEX_16BIT = IEMMODE_16BIT,
65 IEMMODEX_32BIT = IEMMODE_32BIT,
66 IEMMODEX_64BIT = IEMMODE_64BIT,
67 IEMMODEX_8BIT
68} IEMMODEX;
69AssertCompileSize(IEMMODEX, 4);
70
71
72/**
73 * Branch types.
74 */
75typedef enum IEMBRANCH
76{
77 IEMBRANCH_JUMP = 1,
78 IEMBRANCH_CALL,
79 IEMBRANCH_TRAP,
80 IEMBRANCH_SOFTWARE_INT,
81 IEMBRANCH_HARDWARE_INT
82} IEMBRANCH;
83AssertCompileSize(IEMBRANCH, 4);
84
85
86/**
87 * A FPU result.
88 */
89typedef struct IEMFPURESULT
90{
91 /** The output value. */
92 RTFLOAT80U r80Result;
93 /** The output status. */
94 uint16_t FSW;
95} IEMFPURESULT;
96AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
97/** Pointer to a FPU result. */
98typedef IEMFPURESULT *PIEMFPURESULT;
99/** Pointer to a const FPU result. */
100typedef IEMFPURESULT const *PCIEMFPURESULT;
101
102
103#ifdef IEM_VERIFICATION_MODE
104
105/**
106 * Verification event type.
107 */
108typedef enum IEMVERIFYEVENT
109{
110 IEMVERIFYEVENT_INVALID = 0,
111 IEMVERIFYEVENT_IOPORT_READ,
112 IEMVERIFYEVENT_IOPORT_WRITE,
113 IEMVERIFYEVENT_RAM_WRITE,
114 IEMVERIFYEVENT_RAM_READ
115} IEMVERIFYEVENT;
116
117/** Checks if the event type is a RAM read or write. */
118# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE || (a_enmType) == IEMVERIFYEVENT_RAM_READ)
119
120/**
121 * Verification event record.
122 */
123typedef struct IEMVERIFYEVTREC
124{
125 /** Pointer to the next record in the list. */
126 struct IEMVERIFYEVTREC *pNext;
127 /** The event type. */
128 IEMVERIFYEVENT enmEvent;
129 /** The event data. */
130 union
131 {
132 /** IEMVERIFYEVENT_IOPORT_READ */
133 struct
134 {
135 RTIOPORT Port;
136 uint32_t cbValue;
137 } IOPortRead;
138
139 /** IEMVERIFYEVENT_IOPORT_WRITE */
140 struct
141 {
142 RTIOPORT Port;
143 uint32_t cbValue;
144 uint32_t u32Value;
145 } IOPortWrite;
146
147 /** IEMVERIFYEVENT_RAM_READ */
148 struct
149 {
150 RTGCPHYS GCPhys;
151 uint32_t cb;
152 } RamRead;
153
154 /** IEMVERIFYEVENT_RAM_WRITE */
155 struct
156 {
157 RTGCPHYS GCPhys;
158 uint32_t cb;
159 uint8_t ab[32];
160 } RamWrite;
161 } u;
162} IEMVERIFYEVTREC;
163/** Pointer to an IEM event verification records. */
164typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
165
166#endif /* IEM_VERIFICATION_MODE */
167
168
169/**
170 * The per-CPU IEM state.
171 */
172typedef struct IEMCPU
173{
174 /** Pointer to the CPU context - ring-3 contex. */
175 R3PTRTYPE(PCPUMCTX) pCtxR3;
176 /** Pointer to the CPU context - ring-0 contex. */
177 R0PTRTYPE(PCPUMCTX) pCtxR0;
178 /** Pointer to the CPU context - raw-mode contex. */
179 RCPTRTYPE(PCPUMCTX) pCtxRC;
180
181 /** Offset of the VMCPU structure relative to this structure (negative). */
182 int32_t offVMCpu;
183 /** Offset of the VM structure relative to this structure (negative). */
184 int32_t offVM;
185
186 /** Whether to bypass access handlers or not. */
187 bool fByPassHandlers;
188 /** Explicit alignment padding. */
189 bool afAlignment0[3];
190
191 /** The flags of the current exception / interrupt. */
192 uint32_t fCurXcpt;
193 /** The current exception / interrupt. */
194 uint8_t uCurXcpt;
195 /** Exception / interrupt recursion depth. */
196 int8_t cXcptRecursions;
197 /** Explicit alignment padding. */
198 bool afAlignment1[5];
199 /** The CPL. */
200 uint8_t uCpl;
201 /** The current CPU execution mode (CS). */
202 IEMMODE enmCpuMode;
203
204 /** @name Statistics
205 * @{ */
206 /** The number of instructions we've executed. */
207 uint32_t cInstructions;
208 /** The number of potential exits. */
209 uint32_t cPotentialExits;
210#ifdef IEM_VERIFICATION_MODE
211 /** The Number of I/O port reads that has been performed. */
212 uint32_t cIOReads;
213 /** The Number of I/O port writes that has been performed. */
214 uint32_t cIOWrites;
215 /** Set if no comparison to REM is currently performed.
216 * This is used to skip past really slow bits. */
217 bool fNoRem;
218 /** Indicates that RAX and RDX differences should be ignored since RDTSC
219 * and RDTSCP are timing sensitive. */
220 bool fIgnoreRaxRdx;
221 bool afAlignment2[2];
222 /** Mask of undefined eflags.
223 * The verifier will any difference in these flags. */
224 uint32_t fUndefinedEFlags;
225 /** The physical address corresponding to abOpcodes[0]. */
226 RTGCPHYS GCPhysOpcodes;
227#endif
228 /** @} */
229
230 /** @name Decoder state.
231 * @{ */
232
233 /** The default addressing mode . */
234 IEMMODE enmDefAddrMode;
235 /** The effective addressing mode . */
236 IEMMODE enmEffAddrMode;
237 /** The default operand mode . */
238 IEMMODE enmDefOpSize;
239 /** The effective operand mode . */
240 IEMMODE enmEffOpSize;
241
242 /** The prefix mask (IEM_OP_PRF_XXX). */
243 uint32_t fPrefixes;
244 /** The extra REX ModR/M register field bit (REX.R << 3). */
245 uint8_t uRexReg;
246 /** The extra REX ModR/M r/m field, SIB base and opcode reg bit
247 * (REX.B << 3). */
248 uint8_t uRexB;
249 /** The extra REX SIB index field bit (REX.X << 3). */
250 uint8_t uRexIndex;
251 /** The effective segment register (X86_SREG_XXX). */
252 uint8_t iEffSeg;
253
254 /** The current offset into abOpcodes. */
255 uint8_t offOpcode;
256 /** The size of what has currently been fetched into abOpcodes. */
257 uint8_t cbOpcode;
258 /** The opcode bytes. */
259 uint8_t abOpcode[15];
260 /** Offset into abOpcodes where the FPU instruction starts.
261 * Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
262 * instruction result is committed. */
263 uint8_t offFpuOpcode;
264
265 /** @}*/
266
267 /** Alignment padding for aMemMappings. */
268 uint8_t abAlignment2[4];
269
270 /** The number of active guest memory mappings. */
271 uint8_t cActiveMappings;
272 /** The next unused mapping index. */
273 uint8_t iNextMapping;
274 /** Records for tracking guest memory mappings. */
275 struct
276 {
277 /** The address of the mapped bytes. */
278 void *pv;
279#if defined(IN_RC) && HC_ARCH_BITS == 64
280 uint32_t u32Alignment3; /**< Alignment padding. */
281#endif
282 /** The access flags (IEM_ACCESS_XXX).
283 * IEM_ACCESS_INVALID if the entry is unused. */
284 uint32_t fAccess;
285#if HC_ARCH_BITS == 64
286 uint32_t u32Alignment4; /**< Alignment padding. */
287#endif
288 } aMemMappings[3];
289
290 /** Bounce buffer info.
291 * This runs in parallel to aMemMappings. */
292 struct
293 {
294 /** The physical address of the first byte. */
295 RTGCPHYS GCPhysFirst;
296 /** The physical address of the second page. */
297 RTGCPHYS GCPhysSecond;
298 /** The number of bytes in the first page. */
299 uint16_t cbFirst;
300 /** The number of bytes in the second page. */
301 uint16_t cbSecond;
302 /** Whether it's unassigned memory. */
303 bool fUnassigned;
304 /** Explicit alignment padding. */
305 bool afAlignment5[3];
306 } aMemBbMappings[3];
307
308 /** Bounce buffer storage.
309 * This runs in parallel to aMemMappings and aMemBbMappings. */
310 struct
311 {
312 uint8_t ab[512];
313 } aBounceBuffers[3];
314
315#ifdef IEM_VERIFICATION_MODE
316 /** The event verification records for what IEM did (LIFO). */
317 R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
318 /** Insertion point for pIemEvtRecHead. */
319 R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
320 /** The event verification records for what the other party did (FIFO). */
321 R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
322 /** Insertion point for pOtherEvtRecHead. */
323 R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
324 /** List of free event records. */
325 R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
326#endif
327} IEMCPU;
328/** Pointer to the per-CPU IEM state. */
329typedef IEMCPU *PIEMCPU;
330
331/** Converts a IEMCPU pointer to a VMCPU pointer.
332 * @returns VMCPU pointer.
333 * @param a_pIemCpu The IEM per CPU instance data.
334 */
335#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
336
337/** Converts a IEMCPU pointer to a VM pointer.
338 * @returns VM pointer.
339 * @param a_pIemCpu The IEM per CPU instance data.
340 */
341#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
342
343/** @name IEM_ACCESS_XXX - Access details.
344 * @{ */
345#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
346#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
347#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
348#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
349#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
350#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
351#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
352#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
353#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
354#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
355/** Used in aMemMappings to indicate that the entry is bounce buffered. */
356#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000100)
357/** Read+write data alias. */
358#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_DATA)
359/** Write data alias. */
360#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_DATA)
361/** Read data alias. */
362#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_DATA)
363/** Instruction fetch alias. */
364#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC | IEM_ACCESS_WHAT_CODE)
365/** Stack write alias. */
366#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_STACK)
367/** Stack read alias. */
368#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_STACK)
369/** Stack read+write alias. */
370#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_STACK)
371/** Read system table alias. */
372#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_SYS)
373/** Read+write system table alias. */
374#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE | IEM_ACCESS_WHAT_SYS)
375/** @} */
376
377/** @name Prefix constants (IEMCPU::fPrefixes)
378 * @{ */
379#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /**< CS segment prefix (0x2e). */
380#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /**< SS segment prefix (0x36). */
381#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /**< DS segment prefix (0x3e). */
382#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /**< ES segment prefix (0x26). */
383#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /**< FS segment prefix (0x64). */
384#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /**< GS segment prefix (0x65). */
385#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
386
387#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /**< Operand size prefix (0x66). */
388#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /**< REX.W prefix (0x48-0x4f). */
389#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /**< Address size prefix (0x67). */
390
391#define IEM_OP_PRF_LOCK RT_BIT_32(16) /**< Lock prefix (0xf0). */
392#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /**< Repeat-not-zero prefix (0xf2). */
393#define IEM_OP_PRF_REPZ RT_BIT_32(18) /**< Repeat-if-zero prefix (0xf3). */
394
395#define IEM_OP_PRF_REX RT_BIT_32(24) /**< Any REX prefix (0x40-0x4f). */
396#define IEM_OP_PRF_REX_R RT_BIT_32(25) /**< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). */
397#define IEM_OP_PRF_REX_B RT_BIT_32(26) /**< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). */
398#define IEM_OP_PRF_REX_X RT_BIT_32(27) /**< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). */
399/** @} */
400
401/**
402 * Tests if verification mode is enabled.
403 *
404 * This expands to @c false when IEM_VERIFICATION_MODE is not defined and
405 * should therefore cause the compiler to eliminate the verification branch
406 * of an if statement. */
407#ifdef IEM_VERIFICATION_MODE
408# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
409#else
410# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
411#endif
412
413/**
414 * Indicates to the verifier that the given flag set is undefined.
415 *
416 * Can be invoked again to add more flags.
417 *
418 * This is a NOOP if the verifier isn't compiled in.
419 */
420#ifdef IEM_VERIFICATION_MODE
421# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags |= (a_fEfl); } while (0)
422#else
423# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
424#endif
425
426
427/** @def IEM_DECL_IMPL_TYPE
428 * For typedef'ing an instruction implementation function.
429 *
430 * @param a_RetType The return type.
431 * @param a_Name The name of the type.
432 * @param a_ArgList The argument list enclosed in parentheses.
433 */
434
435/** @def IEM_DECL_IMPL_DEF
436 * For defining an instruction implementation function.
437 *
438 * @param a_RetType The return type.
439 * @param a_Name The name of the type.
440 * @param a_ArgList The argument list enclosed in parentheses.
441 */
442
443#if defined(__GNUC__) && defined(RT_ARCH_X86)
444# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
445 __attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
446# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
447 __attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
448
449#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
450# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
451 a_RetType (__fastcall a_Name) a_ArgList
452# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
453 a_RetType __fastcall a_Name a_ArgList
454
455#else
456# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
457 a_RetType (VBOXCALL a_Name) a_ArgList
458# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
459 a_RetType VBOXCALL a_Name a_ArgList
460
461#endif
462
463/** @name Arithmetic assignment operations on bytes (binary).
464 * @{ */
465typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t *pu8Dst, uint8_t u8Src, uint32_t *pEFlags));
466typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
467FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
468FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
469FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
470FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
471FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
472FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
473FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
474/** @} */
475
476/** @name Arithmetic assignment operations on words (binary).
477 * @{ */
478typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t *pu16Dst, uint16_t u16Src, uint32_t *pEFlags));
479typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
480FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
481FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
482FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
483FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
484FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
485FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
486FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
487/** @} */
488
489/** @name Arithmetic assignment operations on double words (binary).
490 * @{ */
491typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t *pu32Dst, uint32_t u32Src, uint32_t *pEFlags));
492typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
493FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
494FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
495FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
496FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
497FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
498FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
499FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
500/** @} */
501
502/** @name Arithmetic assignment operations on quad words (binary).
503 * @{ */
504typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t *pu64Dst, uint64_t u64Src, uint32_t *pEFlags));
505typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
506FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
507FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
508FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
509FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
510FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
511FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
512FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
513/** @} */
514
515/** @name Compare operations (thrown in with the binary ops).
516 * @{ */
517FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
518FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
519FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
520FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
521/** @} */
522
523/** @name Test operations (thrown in with the binary ops).
524 * @{ */
525FNIEMAIMPLBINU8 iemAImpl_test_u8;
526FNIEMAIMPLBINU16 iemAImpl_test_u16;
527FNIEMAIMPLBINU32 iemAImpl_test_u32;
528FNIEMAIMPLBINU64 iemAImpl_test_u64;
529/** @} */
530
531/** @name Bit operations operations (thrown in with the binary ops).
532 * @{ */
533FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
534FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
535FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
536FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
537FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
538FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
539FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
540FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
541FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
542FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
543FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
544FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
545/** @} */
546
547/** @name Exchange memory with register operations.
548 * @{ */
549IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t *pu8Mem, uint8_t *pu8Reg));
550IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t *pu16Mem, uint16_t *pu16Reg));
551IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t *pu32Mem, uint32_t *pu32Reg));
552IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t *pu64Mem, uint64_t *pu64Reg));
553/** @} */
554
555/** @name Exchange and add operations.
556 * @{ */
557IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t *pu8Dst, uint8_t *pu8Reg, uint32_t *pEFlags));
558IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t *pu16Dst, uint16_t *pu16Reg, uint32_t *pEFlags));
559IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t *pu32Dst, uint32_t *pu32Reg, uint32_t *pEFlags));
560IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t *pu64Dst, uint64_t *pu64Reg, uint32_t *pEFlags));
561IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t *pu8Dst, uint8_t *pu8Reg, uint32_t *pEFlags));
562IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t *pu16Dst, uint16_t *pu16Reg, uint32_t *pEFlags));
563IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t *pu32Dst, uint32_t *pu32Reg, uint32_t *pEFlags));
564IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t *pu64Dst, uint64_t *pu64Reg, uint32_t *pEFlags));
565/** @} */
566
567/** @name Double precision shifts
568 * @{ */
569typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t *pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t *pEFlags));
570typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
571typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t *pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t *pEFlags));
572typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
573typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t *pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t *pEFlags));
574typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
575FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
576FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
577FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
578FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
579FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
580FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
581/** @} */
582
583
584/** @name Bit search operations (thrown in with the binary ops).
585 * @{ */
586FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
587FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
588FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
589FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
590FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
591FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
592/** @} */
593
594/** @name Signed multiplication operations (thrown in with the binary ops).
595 * @{ */
596FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
597FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
598FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
599/** @} */
600
601/** @name Arithmetic assignment operations on bytes (unary).
602 * @{ */
603typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t *pu8Dst, uint32_t *pEFlags));
604typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
605FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
606FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
607FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
608FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
609/** @} */
610
611/** @name Arithmetic assignment operations on words (unary).
612 * @{ */
613typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t *pu16Dst, uint32_t *pEFlags));
614typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
615FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
616FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
617FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
618FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
619/** @} */
620
621/** @name Arithmetic assignment operations on double words (unary).
622 * @{ */
623typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t *pu32Dst, uint32_t *pEFlags));
624typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
625FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
626FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
627FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
628FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
629/** @} */
630
631/** @name Arithmetic assignment operations on quad words (unary).
632 * @{ */
633typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t *pu64Dst, uint32_t *pEFlags));
634typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
635FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
636FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
637FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
638FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
639/** @} */
640
641
642/** @name Shift operations on bytes (Group 2).
643 * @{ */
644typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t *pu8Dst, uint8_t cShift, uint32_t *pEFlags));
645typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
646FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
647FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
648FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
649FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
650FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
651FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
652FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
653/** @} */
654
655/** @name Shift operations on words (Group 2).
656 * @{ */
657typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t *pu16Dst, uint8_t cShift, uint32_t *pEFlags));
658typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
659FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
660FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
661FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
662FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
663FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
664FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
665FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
666/** @} */
667
668/** @name Shift operations on double words (Group 2).
669 * @{ */
670typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t *pu32Dst, uint8_t cShift, uint32_t *pEFlags));
671typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
672FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
673FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
674FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
675FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
676FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
677FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
678FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
679/** @} */
680
681/** @name Shift operations on words (Group 2).
682 * @{ */
683typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t *pu64Dst, uint8_t cShift, uint32_t *pEFlags));
684typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
685FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
686FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
687FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
688FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
689FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
690FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
691FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
692/** @} */
693
694/** @name Multiplication and division operations.
695 * @{ */
696typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t *pu16AX, uint8_t u8FactorDivisor, uint32_t *pEFlags));
697typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
698FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
699FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
700
701typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t *pu16AX, uint16_t *pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
702typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
703FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
704FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
705
706typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t *pu32EAX, uint32_t *pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
707typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
708FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
709FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
710
711typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t *pu64RAX, uint64_t *pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
712typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
713FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
714FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
715/** @} */
716
717/** @name Byte Swap.
718 * @{ */
719IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t *pu32Dst)); /* Yes, 32-bit register access. */
720IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
721IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
722/** @} */
723
724
725/** @name FPU operations taking a 32-bit float argument
726 * @{ */
727typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, RTFLOAT32U r32Val));
728typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
729FNIEMAIMPLFPUR32 iemAImpl_fpu_r32_to_r80;
730/** @} */
731
732/** @name FPU operations taking a 64-bit float argument
733 * @{ */
734typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
735 PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
736typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
737typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64U,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
738typedef FNIEMAIMPLFPUR64U *PFNIEMAIMPLFPUR64U;
739FNIEMAIMPLFPUR64U iemAImpl_fpu_r64_to_r80;
740FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
741FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
742FNIEMAIMPLFPUR64 iemAImpl_fcom_r80_by_r64;
743FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
744FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
745FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
746FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
747
748/** @} */
749
750/** @name FPU operations taking a 80-bit float argument
751 * @{ */
752typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
753 PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
754typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
755FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
756FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
757FNIEMAIMPLFPUR80 iemAImpl_fcom_r80_by_r80;
758FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
759FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
760FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
761FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
762
763/** @} */
764
765/** @name FPU operations taking a 32-bit signed integer argument
766 * @{ */
767typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUS32OUT,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
768 int32_t *pi32Dst, PCRTFLOAT80U pr80Value));
769typedef FNIEMAIMPLFPUS32OUT *PFNIEMAIMPLFPUS32OUT;
770
771FNIEMAIMPLFPUS32OUT iemAImpl_fpu_r80_to_i32;
772
773/** @} */
774
775
776/** @name Function tables.
777 * @{
778 */
779
780/**
781 * Function table for a binary operator providing implementation based on
782 * operand size.
783 */
784typedef struct IEMOPBINSIZES
785{
786 PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
787 PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
788 PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
789 PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
790} IEMOPBINSIZES;
791/** Pointer to a binary operator function table. */
792typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
793
794
795/**
796 * Function table for a unary operator providing implementation based on
797 * operand size.
798 */
799typedef struct IEMOPUNARYSIZES
800{
801 PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
802 PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
803 PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
804 PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
805} IEMOPUNARYSIZES;
806/** Pointer to a unary operator function table. */
807typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
808
809
810/**
811 * Function table for a shift operator providing implementation based on
812 * operand size.
813 */
814typedef struct IEMOPSHIFTSIZES
815{
816 PFNIEMAIMPLSHIFTU8 pfnNormalU8;
817 PFNIEMAIMPLSHIFTU16 pfnNormalU16;
818 PFNIEMAIMPLSHIFTU32 pfnNormalU32;
819 PFNIEMAIMPLSHIFTU64 pfnNormalU64;
820} IEMOPSHIFTSIZES;
821/** Pointer to a shift operator function table. */
822typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
823
824
825/**
826 * Function table for a multiplication or division operation.
827 */
828typedef struct IEMOPMULDIVSIZES
829{
830 PFNIEMAIMPLMULDIVU8 pfnU8;
831 PFNIEMAIMPLMULDIVU16 pfnU16;
832 PFNIEMAIMPLMULDIVU32 pfnU32;
833 PFNIEMAIMPLMULDIVU64 pfnU64;
834} IEMOPMULDIVSIZES;
835/** Pointer to a multiplication or division operation function table. */
836typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
837
838
839/**
840 * Function table for a double precision shift operator providing implementation
841 * based on operand size.
842 */
843typedef struct IEMOPSHIFTDBLSIZES
844{
845 PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
846 PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
847 PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
848} IEMOPSHIFTDBLSIZES;
849/** Pointer to a double precision shift function table. */
850typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
851
852
853/** @} */
854
855
856/** @name C instruction implementations for anything slightly complicated.
857 * @{ */
858
859/**
860 * For typedef'ing or declaring a C instruction implementation function taking
861 * no extra arguments.
862 *
863 * @param a_Name The name of the type.
864 */
865# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
866 IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
867/**
868 * For defining a C instruction implementation function taking no extra
869 * arguments.
870 *
871 * @param a_Name The name of the function
872 */
873# define IEM_CIMPL_DEF_0(a_Name) \
874 IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
875/**
876 * For calling a C instruction implementation function taking no extra
877 * arguments.
878 *
879 * This special call macro adds default arguments to the call and allow us to
880 * change these later.
881 *
882 * @param a_fn The name of the function.
883 */
884# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
885
886/**
887 * For typedef'ing or declaring a C instruction implementation function taking
888 * one extra argument.
889 *
890 * @param a_Name The name of the type.
891 * @param a_Type0 The argument type.
892 * @param a_Arg0 The argument name.
893 */
894# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
895 IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
896/**
897 * For defining a C instruction implementation function taking one extra
898 * argument.
899 *
900 * @param a_Name The name of the function
901 * @param a_Type0 The argument type.
902 * @param a_Arg0 The argument name.
903 */
904# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
905 IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
906/**
907 * For calling a C instruction implementation function taking one extra
908 * argument.
909 *
910 * This special call macro adds default arguments to the call and allow us to
911 * change these later.
912 *
913 * @param a_fn The name of the function.
914 * @param a0 The name of the 1st argument.
915 */
916# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
917
918/**
919 * For typedef'ing or declaring a C instruction implementation function taking
920 * two extra arguments.
921 *
922 * @param a_Name The name of the type.
923 * @param a_Type0 The type of the 1st argument
924 * @param a_Arg0 The name of the 1st argument.
925 * @param a_Type1 The type of the 2nd argument.
926 * @param a_Arg1 The name of the 2nd argument.
927 */
928# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
929 IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
930/**
931 * For defining a C instruction implementation function taking two extra
932 * arguments.
933 *
934 * @param a_Name The name of the function.
935 * @param a_Type0 The type of the 1st argument
936 * @param a_Arg0 The name of the 1st argument.
937 * @param a_Type1 The type of the 2nd argument.
938 * @param a_Arg1 The name of the 2nd argument.
939 */
940# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
941 IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
942/**
943 * For calling a C instruction implementation function taking two extra
944 * arguments.
945 *
946 * This special call macro adds default arguments to the call and allow us to
947 * change these later.
948 *
949 * @param a_fn The name of the function.
950 * @param a0 The name of the 1st argument.
951 * @param a1 The name of the 2nd argument.
952 */
953# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
954
955/**
956 * For typedef'ing or declaring a C instruction implementation function taking
957 * three extra arguments.
958 *
959 * @param a_Name The name of the type.
960 * @param a_Type0 The type of the 1st argument
961 * @param a_Arg0 The name of the 1st argument.
962 * @param a_Type1 The type of the 2nd argument.
963 * @param a_Arg1 The name of the 2nd argument.
964 * @param a_Type2 The type of the 3rd argument.
965 * @param a_Arg2 The name of the 3rd argument.
966 */
967# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
968 IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
969/**
970 * For defining a C instruction implementation function taking three extra
971 * arguments.
972 *
973 * @param a_Name The name of the function.
974 * @param a_Type0 The type of the 1st argument
975 * @param a_Arg0 The name of the 1st argument.
976 * @param a_Type1 The type of the 2nd argument.
977 * @param a_Arg1 The name of the 2nd argument.
978 * @param a_Type2 The type of the 3rd argument.
979 * @param a_Arg2 The name of the 3rd argument.
980 */
981# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
982 IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
983/**
984 * For calling a C instruction implementation function taking three extra
985 * arguments.
986 *
987 * This special call macro adds default arguments to the call and allow us to
988 * change these later.
989 *
990 * @param a_fn The name of the function.
991 * @param a0 The name of the 1st argument.
992 * @param a1 The name of the 2nd argument.
993 * @param a2 The name of the 3rd argument.
994 */
995# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
996
997
998/**
999 * For typedef'ing or declaring a C instruction implementation function taking
1000 * four extra arguments.
1001 *
1002 * @param a_Name The name of the type.
1003 * @param a_Type0 The type of the 1st argument
1004 * @param a_Arg0 The name of the 1st argument.
1005 * @param a_Type1 The type of the 2nd argument.
1006 * @param a_Arg1 The name of the 2nd argument.
1007 * @param a_Type2 The type of the 3rd argument.
1008 * @param a_Arg2 The name of the 3rd argument.
1009 * @param a_Type3 The type of the 4th argument.
1010 * @param a_Arg3 The name of the 4th argument.
1011 */
1012# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1013 IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1014/**
1015 * For defining a C instruction implementation function taking four extra
1016 * arguments.
1017 *
1018 * @param a_Name The name of the function.
1019 * @param a_Type0 The type of the 1st argument
1020 * @param a_Arg0 The name of the 1st argument.
1021 * @param a_Type1 The type of the 2nd argument.
1022 * @param a_Arg1 The name of the 2nd argument.
1023 * @param a_Type2 The type of the 3rd argument.
1024 * @param a_Arg2 The name of the 3rd argument.
1025 * @param a_Type3 The type of the 4th argument.
1026 * @param a_Arg3 The name of the 4th argument.
1027 */
1028# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1029 IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1030 a_Type2 a_Arg2, a_Type3 a_Arg3))
1031/**
1032 * For calling a C instruction implementation function taking four extra
1033 * arguments.
1034 *
1035 * This special call macro adds default arguments to the call and allow us to
1036 * change these later.
1037 *
1038 * @param a_fn The name of the function.
1039 * @param a0 The name of the 1st argument.
1040 * @param a1 The name of the 2nd argument.
1041 * @param a2 The name of the 3rd argument.
1042 * @param a3 The name of the 4th argument.
1043 */
1044# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1045
1046
1047/**
1048 * For typedef'ing or declaring a C instruction implementation function taking
1049 * five extra arguments.
1050 *
1051 * @param a_Name The name of the type.
1052 * @param a_Type0 The type of the 1st argument
1053 * @param a_Arg0 The name of the 1st argument.
1054 * @param a_Type1 The type of the 2nd argument.
1055 * @param a_Arg1 The name of the 2nd argument.
1056 * @param a_Type2 The type of the 3rd argument.
1057 * @param a_Arg2 The name of the 3rd argument.
1058 * @param a_Type3 The type of the 4th argument.
1059 * @param a_Arg3 The name of the 4th argument.
1060 * @param a_Type4 The type of the 5th argument.
1061 * @param a_Arg4 The name of the 5th argument.
1062 */
1063# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1064 IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1065 a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1066 a_Type3 a_Arg3, a_Type4 a_Arg4))
1067/**
1068 * For defining a C instruction implementation function taking five extra
1069 * arguments.
1070 *
1071 * @param a_Name The name of the function.
1072 * @param a_Type0 The type of the 1st argument
1073 * @param a_Arg0 The name of the 1st argument.
1074 * @param a_Type1 The type of the 2nd argument.
1075 * @param a_Arg1 The name of the 2nd argument.
1076 * @param a_Type2 The type of the 3rd argument.
1077 * @param a_Arg2 The name of the 3rd argument.
1078 * @param a_Type3 The type of the 4th argument.
1079 * @param a_Arg3 The name of the 4th argument.
1080 * @param a_Type4 The type of the 5th argument.
1081 * @param a_Arg4 The name of the 5th argument.
1082 */
1083# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1084 IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1085 a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1086 a_Type3 a_Arg3, a_Type4 a_Arg4))
1087/**
1088 * For calling a C instruction implementation function taking five extra
1089 * arguments.
1090 *
1091 * This special call macro adds default arguments to the call and allow us to
1092 * change these later.
1093 *
1094 * @param a_fn The name of the function.
1095 * @param a0 The name of the 1st argument.
1096 * @param a1 The name of the 2nd argument.
1097 * @param a2 The name of the 3rd argument.
1098 * @param a3 The name of the 4th argument.
1099 * @param a4 The name of the 5th argument.
1100 */
1101# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1102
1103/** @} */
1104
1105
1106/** @} */
1107
1108RT_C_DECLS_END
1109
1110#endif
1111
Note: See TracBrowser for help on using the repository browser.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette