IEMInternal.h@ 40209

Last change on this file since 40209 was 40209, checked in by vboxsync, 13 years ago
IEM: Implemented missing FPU instructions starting with 0xd8 and adjusted fld m32r and fld m64r.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 43.7 KB

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1	/* $Id: IEMInternal.h 40209 2012-02-22 12:14:21Z vboxsync $ */
2	/** @file
3	* IEM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2011-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.215389.xyz. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___IEMInternal_h
19	#define ___IEMInternal_h
20
21	#include <VBox/vmm/stam.h>
22	#include <VBox/vmm/cpum.h>
23	#include <VBox/param.h>
24
25
26	RT_C_DECLS_BEGIN
27
28
29	/** @defgroup grp_iem_int Internals
30	* @ingroup grp_iem
31	* @internal
32	* @{
33	*/
34
35
36	/** Finish and move to types.h */
37	typedef union
38	{
39	uint32_t u32;
40	} RTFLOAT32U;
41	typedef RTFLOAT32U *PRTFLOAT32U;
42	typedef RTFLOAT32U const *PCRTFLOAT32U;
43
44
45	/**
46	* Operand or addressing mode.
47	*/
48	typedef enum IEMMODE
49	{
50	IEMMODE_16BIT = 0,
51	IEMMODE_32BIT,
52	IEMMODE_64BIT
53	} IEMMODE;
54	AssertCompileSize(IEMMODE, 4);
55
56	/**
57	* Extended operand mode that includes a representation of 8-bit.
58	*
59	* This is used for packing down modes when invoking some C instruction
60	* implementations.
61	*/
62	typedef enum IEMMODEX
63	{
64	IEMMODEX_16BIT = IEMMODE_16BIT,
65	IEMMODEX_32BIT = IEMMODE_32BIT,
66	IEMMODEX_64BIT = IEMMODE_64BIT,
67	IEMMODEX_8BIT
68	} IEMMODEX;
69	AssertCompileSize(IEMMODEX, 4);
70
71
72	/**
73	* Branch types.
74	*/
75	typedef enum IEMBRANCH
76	{
77	IEMBRANCH_JUMP = 1,
78	IEMBRANCH_CALL,
79	IEMBRANCH_TRAP,
80	IEMBRANCH_SOFTWARE_INT,
81	IEMBRANCH_HARDWARE_INT
82	} IEMBRANCH;
83	AssertCompileSize(IEMBRANCH, 4);
84
85
86	/**
87	* A FPU result.
88	*/
89	typedef struct IEMFPURESULT
90	{
91	/** The output value. */
92	RTFLOAT80U r80Result;
93	/** The output status. */
94	uint16_t FSW;
95	} IEMFPURESULT;
96	AssertCompileMemberOffset(IEMFPURESULT, FSW, 10);
97	/** Pointer to a FPU result. */
98	typedef IEMFPURESULT *PIEMFPURESULT;
99	/** Pointer to a const FPU result. */
100	typedef IEMFPURESULT const *PCIEMFPURESULT;
101
102
103	#ifdef IEM_VERIFICATION_MODE
104
105	/**
106	* Verification event type.
107	*/
108	typedef enum IEMVERIFYEVENT
109	{
110	IEMVERIFYEVENT_INVALID = 0,
111	IEMVERIFYEVENT_IOPORT_READ,
112	IEMVERIFYEVENT_IOPORT_WRITE,
113	IEMVERIFYEVENT_RAM_WRITE,
114	IEMVERIFYEVENT_RAM_READ
115	} IEMVERIFYEVENT;
116
117	/** Checks if the event type is a RAM read or write. */
118	# define IEMVERIFYEVENT_IS_RAM(a_enmType) ((a_enmType) == IEMVERIFYEVENT_RAM_WRITE \|\| (a_enmType) == IEMVERIFYEVENT_RAM_READ)
119
120	/**
121	* Verification event record.
122	*/
123	typedef struct IEMVERIFYEVTREC
124	{
125	/** Pointer to the next record in the list. */
126	struct IEMVERIFYEVTREC *pNext;
127	/** The event type. */
128	IEMVERIFYEVENT enmEvent;
129	/** The event data. */
130	union
131	{
132	/** IEMVERIFYEVENT_IOPORT_READ */
133	struct
134	{
135	RTIOPORT Port;
136	uint32_t cbValue;
137	} IOPortRead;
138
139	/** IEMVERIFYEVENT_IOPORT_WRITE */
140	struct
141	{
142	RTIOPORT Port;
143	uint32_t cbValue;
144	uint32_t u32Value;
145	} IOPortWrite;
146
147	/** IEMVERIFYEVENT_RAM_READ */
148	struct
149	{
150	RTGCPHYS GCPhys;
151	uint32_t cb;
152	} RamRead;
153
154	/** IEMVERIFYEVENT_RAM_WRITE */
155	struct
156	{
157	RTGCPHYS GCPhys;
158	uint32_t cb;
159	uint8_t ab[512];
160	} RamWrite;
161	} u;
162	} IEMVERIFYEVTREC;
163	/** Pointer to an IEM event verification records. */
164	typedef IEMVERIFYEVTREC *PIEMVERIFYEVTREC;
165
166	#endif /* IEM_VERIFICATION_MODE */
167
168
169	/**
170	* The per-CPU IEM state.
171	*/
172	typedef struct IEMCPU
173	{
174	/** Pointer to the CPU context - ring-3 contex. */
175	R3PTRTYPE(PCPUMCTX) pCtxR3;
176	/** Pointer to the CPU context - ring-0 contex. */
177	R0PTRTYPE(PCPUMCTX) pCtxR0;
178	/** Pointer to the CPU context - raw-mode contex. */
179	RCPTRTYPE(PCPUMCTX) pCtxRC;
180
181	/** Offset of the VMCPU structure relative to this structure (negative). */
182	int32_t offVMCpu;
183	/** Offset of the VM structure relative to this structure (negative). */
184	int32_t offVM;
185
186	/** Whether to bypass access handlers or not. */
187	bool fByPassHandlers;
188	/** Explicit alignment padding. */
189	bool afAlignment0[3];
190
191	/** The flags of the current exception / interrupt. */
192	uint32_t fCurXcpt;
193	/** The current exception / interrupt. */
194	uint8_t uCurXcpt;
195	/** Exception / interrupt recursion depth. */
196	int8_t cXcptRecursions;
197	/** Explicit alignment padding. */
198	bool afAlignment1[5];
199	/** The CPL. */
200	uint8_t uCpl;
201	/** The current CPU execution mode (CS). */
202	IEMMODE enmCpuMode;
203
204	/** @name Statistics
205	* @{ */
206	/** The number of instructions we've executed. */
207	uint32_t cInstructions;
208	/** The number of potential exits. */
209	uint32_t cPotentialExits;
210	#ifdef IEM_VERIFICATION_MODE
211	/** The Number of I/O port reads that has been performed. */
212	uint32_t cIOReads;
213	/** The Number of I/O port writes that has been performed. */
214	uint32_t cIOWrites;
215	/** Set if no comparison to REM is currently performed.
216	* This is used to skip past really slow bits. */
217	bool fNoRem;
218	/** Indicates that RAX and RDX differences should be ignored since RDTSC
219	* and RDTSCP are timing sensitive. */
220	bool fIgnoreRaxRdx;
221	bool afAlignment2[2];
222	/** Mask of undefined eflags.
223	* The verifier will any difference in these flags. */
224	uint32_t fUndefinedEFlags;
225	/** The physical address corresponding to abOpcodes[0]. */
226	RTGCPHYS GCPhysOpcodes;
227	#endif
228	/** @} */
229
230	/** @name Decoder state.
231	* @{ */
232
233	/** The default addressing mode . */
234	IEMMODE enmDefAddrMode;
235	/** The effective addressing mode . */
236	IEMMODE enmEffAddrMode;
237	/** The default operand mode . */
238	IEMMODE enmDefOpSize;
239	/** The effective operand mode . */
240	IEMMODE enmEffOpSize;
241
242	/** The prefix mask (IEM_OP_PRF_XXX). */
243	uint32_t fPrefixes;
244	/** The extra REX ModR/M register field bit (REX.R << 3). */
245	uint8_t uRexReg;
246	/** The extra REX ModR/M r/m field, SIB base and opcode reg bit
247	* (REX.B << 3). */
248	uint8_t uRexB;
249	/** The extra REX SIB index field bit (REX.X << 3). */
250	uint8_t uRexIndex;
251	/** The effective segment register (X86_SREG_XXX). */
252	uint8_t iEffSeg;
253
254	/** The current offset into abOpcodes. */
255	uint8_t offOpcode;
256	/** The size of what has currently been fetched into abOpcodes. */
257	uint8_t cbOpcode;
258	/** The opcode bytes. */
259	uint8_t abOpcode[15];
260	/** Offset into abOpcodes where the FPU instruction starts.
261	* Only set by the FPU escape opcodes (0xd8-0xdf) and used later on when the
262	* instruction result is committed. */
263	uint8_t offFpuOpcode;
264
265	/** @}*/
266
267	/** Alignment padding for aMemMappings. */
268	uint8_t abAlignment2[4];
269
270	/** The number of active guest memory mappings. */
271	uint8_t cActiveMappings;
272	/** The next unused mapping index. */
273	uint8_t iNextMapping;
274	/** Records for tracking guest memory mappings. */
275	struct
276	{
277	/** The address of the mapped bytes. */
278	void *pv;
279	#if defined(IN_RC) && HC_ARCH_BITS == 64
280	uint32_t u32Alignment3; /*< Alignment padding. /
281	#endif
282	/** The access flags (IEM_ACCESS_XXX).
283	* IEM_ACCESS_INVALID if the entry is unused. */
284	uint32_t fAccess;
285	#if HC_ARCH_BITS == 64
286	uint32_t u32Alignment4; /*< Alignment padding. /
287	#endif
288	} aMemMappings[3];
289
290	/** Bounce buffer info.
291	* This runs in parallel to aMemMappings. */
292	struct
293	{
294	/** The physical address of the first byte. */
295	RTGCPHYS GCPhysFirst;
296	/** The physical address of the second page. */
297	RTGCPHYS GCPhysSecond;
298	/** The number of bytes in the first page. */
299	uint16_t cbFirst;
300	/** The number of bytes in the second page. */
301	uint16_t cbSecond;
302	/** Whether it's unassigned memory. */
303	bool fUnassigned;
304	/** Explicit alignment padding. */
305	bool afAlignment5[3];
306	} aMemBbMappings[3];
307
308	/** Bounce buffer storage.
309	* This runs in parallel to aMemMappings and aMemBbMappings. */
310	struct
311	{
312	uint8_t ab[512];
313	} aBounceBuffers[3];
314
315	#ifdef IEM_VERIFICATION_MODE
316	/** The event verification records for what IEM did (LIFO). */
317	R3PTRTYPE(PIEMVERIFYEVTREC) pIemEvtRecHead;
318	/** Insertion point for pIemEvtRecHead. */
319	R3PTRTYPE(PIEMVERIFYEVTREC *) ppIemEvtRecNext;
320	/** The event verification records for what the other party did (FIFO). */
321	R3PTRTYPE(PIEMVERIFYEVTREC) pOtherEvtRecHead;
322	/** Insertion point for pOtherEvtRecHead. */
323	R3PTRTYPE(PIEMVERIFYEVTREC *) ppOtherEvtRecNext;
324	/** List of free event records. */
325	R3PTRTYPE(PIEMVERIFYEVTREC) pFreeEvtRec;
326	#endif
327	} IEMCPU;
328	/** Pointer to the per-CPU IEM state. */
329	typedef IEMCPU *PIEMCPU;
330
331	/** Converts a IEMCPU pointer to a VMCPU pointer.
332	* @returns VMCPU pointer.
333	* @param a_pIemCpu The IEM per CPU instance data.
334	*/
335	#define IEMCPU_TO_VMCPU(a_pIemCpu) ((PVMCPU)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVMCpu ))
336
337	/** Converts a IEMCPU pointer to a VM pointer.
338	* @returns VM pointer.
339	* @param a_pIemCpu The IEM per CPU instance data.
340	*/
341	#define IEMCPU_TO_VM(a_pIemCpu) ((PVM)( (uintptr_t)(a_pIemCpu) + a_pIemCpu->offVM ))
342
343	/** @name IEM_ACCESS_XXX - Access details.
344	* @{ */
345	#define IEM_ACCESS_INVALID UINT32_C(0x000000ff)
346	#define IEM_ACCESS_TYPE_READ UINT32_C(0x00000001)
347	#define IEM_ACCESS_TYPE_WRITE UINT32_C(0x00000002)
348	#define IEM_ACCESS_TYPE_EXEC UINT32_C(0x00000004)
349	#define IEM_ACCESS_TYPE_MASK UINT32_C(0x00000007)
350	#define IEM_ACCESS_WHAT_CODE UINT32_C(0x00000010)
351	#define IEM_ACCESS_WHAT_DATA UINT32_C(0x00000020)
352	#define IEM_ACCESS_WHAT_STACK UINT32_C(0x00000030)
353	#define IEM_ACCESS_WHAT_SYS UINT32_C(0x00000040)
354	#define IEM_ACCESS_WHAT_MASK UINT32_C(0x00000070)
355	/** The writes are partial, so if initialize the bounce buffer with the
356	* orignal RAM content. */
357	#define IEM_ACCESS_PARTIAL_WRITE UINT32_C(0x00000100)
358	/** Used in aMemMappings to indicate that the entry is bounce buffered. */
359	#define IEM_ACCESS_BOUNCE_BUFFERED UINT32_C(0x00000200)
360	/** Read+write data alias. */
361	#define IEM_ACCESS_DATA_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
362	/** Write data alias. */
363	#define IEM_ACCESS_DATA_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_DATA)
364	/** Read data alias. */
365	#define IEM_ACCESS_DATA_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_DATA)
366	/** Instruction fetch alias. */
367	#define IEM_ACCESS_INSTRUCTION (IEM_ACCESS_TYPE_EXEC \| IEM_ACCESS_WHAT_CODE)
368	/** Stack write alias. */
369	#define IEM_ACCESS_STACK_W (IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
370	/** Stack read alias. */
371	#define IEM_ACCESS_STACK_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_STACK)
372	/** Stack read+write alias. */
373	#define IEM_ACCESS_STACK_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_STACK)
374	/** Read system table alias. */
375	#define IEM_ACCESS_SYS_R (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_WHAT_SYS)
376	/** Read+write system table alias. */
377	#define IEM_ACCESS_SYS_RW (IEM_ACCESS_TYPE_READ \| IEM_ACCESS_TYPE_WRITE \| IEM_ACCESS_WHAT_SYS)
378	/** @} */
379
380	/** @name Prefix constants (IEMCPU::fPrefixes)
381	* @{ */
382	#define IEM_OP_PRF_SEG_CS RT_BIT_32(0) /*< CS segment prefix (0x2e). /
383	#define IEM_OP_PRF_SEG_SS RT_BIT_32(1) /*< SS segment prefix (0x36). /
384	#define IEM_OP_PRF_SEG_DS RT_BIT_32(2) /*< DS segment prefix (0x3e). /
385	#define IEM_OP_PRF_SEG_ES RT_BIT_32(3) /*< ES segment prefix (0x26). /
386	#define IEM_OP_PRF_SEG_FS RT_BIT_32(4) /*< FS segment prefix (0x64). /
387	#define IEM_OP_PRF_SEG_GS RT_BIT_32(5) /*< GS segment prefix (0x65). /
388	#define IEM_OP_PRF_SEG_MASK UINT32_C(0x3f)
389
390	#define IEM_OP_PRF_SIZE_OP RT_BIT_32(8) /*< Operand size prefix (0x66). /
391	#define IEM_OP_PRF_SIZE_REX_W RT_BIT_32(9) /*< REX.W prefix (0x48-0x4f). /
392	#define IEM_OP_PRF_SIZE_ADDR RT_BIT_32(10) /*< Address size prefix (0x67). /
393
394	#define IEM_OP_PRF_LOCK RT_BIT_32(16) /*< Lock prefix (0xf0). /
395	#define IEM_OP_PRF_REPNZ RT_BIT_32(17) /*< Repeat-not-zero prefix (0xf2). /
396	#define IEM_OP_PRF_REPZ RT_BIT_32(18) /*< Repeat-if-zero prefix (0xf3). /
397
398	#define IEM_OP_PRF_REX RT_BIT_32(24) /*< Any REX prefix (0x40-0x4f). /
399	#define IEM_OP_PRF_REX_R RT_BIT_32(25) /*< REX.R prefix (0x44,0x45,0x46,0x47,0x4c,0x4d,0x4e,0x4f). /
400	#define IEM_OP_PRF_REX_B RT_BIT_32(26) /*< REX.B prefix (0x41,0x43,0x45,0x47,0x49,0x4b,0x4d,0x4f). /
401	#define IEM_OP_PRF_REX_X RT_BIT_32(27) /*< REX.X prefix (0x42,0x43,0x46,0x47,0x4a,0x4b,0x4e,0x4f). /
402	/** @} */
403
404	/**
405	* Tests if verification mode is enabled.
406	*
407	* This expands to @c false when IEM_VERIFICATION_MODE is not defined and
408	* should therefore cause the compiler to eliminate the verification branch
409	* of an if statement. */
410	#ifdef IEM_VERIFICATION_MODE
411	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (!(a_pIemCpu)->fNoRem)
412	#else
413	# define IEM_VERIFICATION_ENABLED(a_pIemCpu) (false)
414	#endif
415
416	/**
417	* Indicates to the verifier that the given flag set is undefined.
418	*
419	* Can be invoked again to add more flags.
420	*
421	* This is a NOOP if the verifier isn't compiled in.
422	*/
423	#ifdef IEM_VERIFICATION_MODE
424	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { pIemCpu->fUndefinedEFlags \|= (a_fEfl); } while (0)
425	#else
426	# define IEMOP_VERIFICATION_UNDEFINED_EFLAGS(a_fEfl) do { } while (0)
427	#endif
428
429
430	/** @def IEM_DECL_IMPL_TYPE
431	* For typedef'ing an instruction implementation function.
432	*
433	* @param a_RetType The return type.
434	* @param a_Name The name of the type.
435	* @param a_ArgList The argument list enclosed in parentheses.
436	*/
437
438	/** @def IEM_DECL_IMPL_DEF
439	* For defining an instruction implementation function.
440	*
441	* @param a_RetType The return type.
442	* @param a_Name The name of the type.
443	* @param a_ArgList The argument list enclosed in parentheses.
444	*/
445
446	#if defined(__GNUC__) && defined(RT_ARCH_X86)
447	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
448	__attribute__((__fastcall__)) a_RetType (a_Name) a_ArgList
449	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
450	__attribute__((__fastcall__, __nothrow__)) a_RetType a_Name a_ArgList
451
452	#elif defined(_MSC_VER) && defined(RT_ARCH_X86)
453	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
454	a_RetType (__fastcall a_Name) a_ArgList
455	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
456	a_RetType __fastcall a_Name a_ArgList
457
458	#else
459	# define IEM_DECL_IMPL_TYPE(a_RetType, a_Name, a_ArgList) \
460	a_RetType (VBOXCALL a_Name) a_ArgList
461	# define IEM_DECL_IMPL_DEF(a_RetType, a_Name, a_ArgList) \
462	a_RetType VBOXCALL a_Name a_ArgList
463
464	#endif
465
466	/** @name Arithmetic assignment operations on bytes (binary).
467	* @{ */
468	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU8, (uint8_t pu8Dst, uint8_t u8Src, uint32_t pEFlags));
469	typedef FNIEMAIMPLBINU8 *PFNIEMAIMPLBINU8;
470	FNIEMAIMPLBINU8 iemAImpl_add_u8, iemAImpl_add_u8_locked;
471	FNIEMAIMPLBINU8 iemAImpl_adc_u8, iemAImpl_adc_u8_locked;
472	FNIEMAIMPLBINU8 iemAImpl_sub_u8, iemAImpl_sub_u8_locked;
473	FNIEMAIMPLBINU8 iemAImpl_sbb_u8, iemAImpl_sbb_u8_locked;
474	FNIEMAIMPLBINU8 iemAImpl_or_u8, iemAImpl_or_u8_locked;
475	FNIEMAIMPLBINU8 iemAImpl_xor_u8, iemAImpl_xor_u8_locked;
476	FNIEMAIMPLBINU8 iemAImpl_and_u8, iemAImpl_and_u8_locked;
477	/** @} */
478
479	/** @name Arithmetic assignment operations on words (binary).
480	* @{ */
481	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU16, (uint16_t pu16Dst, uint16_t u16Src, uint32_t pEFlags));
482	typedef FNIEMAIMPLBINU16 *PFNIEMAIMPLBINU16;
483	FNIEMAIMPLBINU16 iemAImpl_add_u16, iemAImpl_add_u16_locked;
484	FNIEMAIMPLBINU16 iemAImpl_adc_u16, iemAImpl_adc_u16_locked;
485	FNIEMAIMPLBINU16 iemAImpl_sub_u16, iemAImpl_sub_u16_locked;
486	FNIEMAIMPLBINU16 iemAImpl_sbb_u16, iemAImpl_sbb_u16_locked;
487	FNIEMAIMPLBINU16 iemAImpl_or_u16, iemAImpl_or_u16_locked;
488	FNIEMAIMPLBINU16 iemAImpl_xor_u16, iemAImpl_xor_u16_locked;
489	FNIEMAIMPLBINU16 iemAImpl_and_u16, iemAImpl_and_u16_locked;
490	/** @} */
491
492	/** @name Arithmetic assignment operations on double words (binary).
493	* @{ */
494	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU32, (uint32_t pu32Dst, uint32_t u32Src, uint32_t pEFlags));
495	typedef FNIEMAIMPLBINU32 *PFNIEMAIMPLBINU32;
496	FNIEMAIMPLBINU32 iemAImpl_add_u32, iemAImpl_add_u32_locked;
497	FNIEMAIMPLBINU32 iemAImpl_adc_u32, iemAImpl_adc_u32_locked;
498	FNIEMAIMPLBINU32 iemAImpl_sub_u32, iemAImpl_sub_u32_locked;
499	FNIEMAIMPLBINU32 iemAImpl_sbb_u32, iemAImpl_sbb_u32_locked;
500	FNIEMAIMPLBINU32 iemAImpl_or_u32, iemAImpl_or_u32_locked;
501	FNIEMAIMPLBINU32 iemAImpl_xor_u32, iemAImpl_xor_u32_locked;
502	FNIEMAIMPLBINU32 iemAImpl_and_u32, iemAImpl_and_u32_locked;
503	/** @} */
504
505	/** @name Arithmetic assignment operations on quad words (binary).
506	* @{ */
507	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLBINU64, (uint64_t pu64Dst, uint64_t u64Src, uint32_t pEFlags));
508	typedef FNIEMAIMPLBINU64 *PFNIEMAIMPLBINU64;
509	FNIEMAIMPLBINU64 iemAImpl_add_u64, iemAImpl_add_u64_locked;
510	FNIEMAIMPLBINU64 iemAImpl_adc_u64, iemAImpl_adc_u64_locked;
511	FNIEMAIMPLBINU64 iemAImpl_sub_u64, iemAImpl_sub_u64_locked;
512	FNIEMAIMPLBINU64 iemAImpl_sbb_u64, iemAImpl_sbb_u64_locked;
513	FNIEMAIMPLBINU64 iemAImpl_or_u64, iemAImpl_or_u64_locked;
514	FNIEMAIMPLBINU64 iemAImpl_xor_u64, iemAImpl_xor_u64_locked;
515	FNIEMAIMPLBINU64 iemAImpl_and_u64, iemAImpl_and_u64_locked;
516	/** @} */
517
518	/** @name Compare operations (thrown in with the binary ops).
519	* @{ */
520	FNIEMAIMPLBINU8 iemAImpl_cmp_u8;
521	FNIEMAIMPLBINU16 iemAImpl_cmp_u16;
522	FNIEMAIMPLBINU32 iemAImpl_cmp_u32;
523	FNIEMAIMPLBINU64 iemAImpl_cmp_u64;
524	/** @} */
525
526	/** @name Test operations (thrown in with the binary ops).
527	* @{ */
528	FNIEMAIMPLBINU8 iemAImpl_test_u8;
529	FNIEMAIMPLBINU16 iemAImpl_test_u16;
530	FNIEMAIMPLBINU32 iemAImpl_test_u32;
531	FNIEMAIMPLBINU64 iemAImpl_test_u64;
532	/** @} */
533
534	/** @name Bit operations operations (thrown in with the binary ops).
535	* @{ */
536	FNIEMAIMPLBINU16 iemAImpl_bt_u16, iemAImpl_bt_u16_locked;
537	FNIEMAIMPLBINU32 iemAImpl_bt_u32, iemAImpl_bt_u32_locked;
538	FNIEMAIMPLBINU64 iemAImpl_bt_u64, iemAImpl_bt_u64_locked;
539	FNIEMAIMPLBINU16 iemAImpl_btc_u16, iemAImpl_btc_u16_locked;
540	FNIEMAIMPLBINU32 iemAImpl_btc_u32, iemAImpl_btc_u32_locked;
541	FNIEMAIMPLBINU64 iemAImpl_btc_u64, iemAImpl_btc_u64_locked;
542	FNIEMAIMPLBINU16 iemAImpl_btr_u16, iemAImpl_btr_u16_locked;
543	FNIEMAIMPLBINU32 iemAImpl_btr_u32, iemAImpl_btr_u32_locked;
544	FNIEMAIMPLBINU64 iemAImpl_btr_u64, iemAImpl_btr_u64_locked;
545	FNIEMAIMPLBINU16 iemAImpl_bts_u16, iemAImpl_bts_u16_locked;
546	FNIEMAIMPLBINU32 iemAImpl_bts_u32, iemAImpl_bts_u32_locked;
547	FNIEMAIMPLBINU64 iemAImpl_bts_u64, iemAImpl_bts_u64_locked;
548	/** @} */
549
550	/** @name Exchange memory with register operations.
551	* @{ */
552	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u8, (uint8_t pu8Mem, uint8_t pu8Reg));
553	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u16,(uint16_t pu16Mem, uint16_t pu16Reg));
554	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u32,(uint32_t pu32Mem, uint32_t pu32Reg));
555	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t pu64Mem, uint64_t pu64Reg));
556	/** @} */
557
558	/** @name Exchange and add operations.
559	* @{ */
560	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
561	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
562	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
563	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
564	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u8_locked, (uint8_t pu8Dst, uint8_t pu8Reg, uint32_t *pEFlags));
565	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u16_locked,(uint16_t pu16Dst, uint16_t pu16Reg, uint32_t *pEFlags));
566	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u32_locked,(uint32_t pu32Dst, uint32_t pu32Reg, uint32_t *pEFlags));
567	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t pu64Dst, uint64_t pu64Reg, uint32_t *pEFlags));
568	/** @} */
569
570	/** @name Double precision shifts
571	* @{ */
572	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU16,(uint16_t pu16Dst, uint16_t u16Src, uint8_t cShift, uint32_t pEFlags));
573	typedef FNIEMAIMPLSHIFTDBLU16 *PFNIEMAIMPLSHIFTDBLU16;
574	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU32,(uint32_t pu32Dst, uint32_t u32Src, uint8_t cShift, uint32_t pEFlags));
575	typedef FNIEMAIMPLSHIFTDBLU32 *PFNIEMAIMPLSHIFTDBLU32;
576	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTDBLU64,(uint64_t pu64Dst, uint64_t u64Src, uint8_t cShift, uint32_t pEFlags));
577	typedef FNIEMAIMPLSHIFTDBLU64 *PFNIEMAIMPLSHIFTDBLU64;
578	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shld_u16;
579	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shld_u32;
580	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shld_u64;
581	FNIEMAIMPLSHIFTDBLU16 iemAImpl_shrd_u16;
582	FNIEMAIMPLSHIFTDBLU32 iemAImpl_shrd_u32;
583	FNIEMAIMPLSHIFTDBLU64 iemAImpl_shrd_u64;
584	/** @} */
585
586
587	/** @name Bit search operations (thrown in with the binary ops).
588	* @{ */
589	FNIEMAIMPLBINU16 iemAImpl_bsf_u16;
590	FNIEMAIMPLBINU32 iemAImpl_bsf_u32;
591	FNIEMAIMPLBINU64 iemAImpl_bsf_u64;
592	FNIEMAIMPLBINU16 iemAImpl_bsr_u16;
593	FNIEMAIMPLBINU32 iemAImpl_bsr_u32;
594	FNIEMAIMPLBINU64 iemAImpl_bsr_u64;
595	/** @} */
596
597	/** @name Signed multiplication operations (thrown in with the binary ops).
598	* @{ */
599	FNIEMAIMPLBINU16 iemAImpl_imul_two_u16;
600	FNIEMAIMPLBINU32 iemAImpl_imul_two_u32;
601	FNIEMAIMPLBINU64 iemAImpl_imul_two_u64;
602	/** @} */
603
604	/** @name Arithmetic assignment operations on bytes (unary).
605	* @{ */
606	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU8, (uint8_t pu8Dst, uint32_t pEFlags));
607	typedef FNIEMAIMPLUNARYU8 *PFNIEMAIMPLUNARYU8;
608	FNIEMAIMPLUNARYU8 iemAImpl_inc_u8, iemAImpl_inc_u8_locked;
609	FNIEMAIMPLUNARYU8 iemAImpl_dec_u8, iemAImpl_dec_u8_locked;
610	FNIEMAIMPLUNARYU8 iemAImpl_not_u8, iemAImpl_not_u8_locked;
611	FNIEMAIMPLUNARYU8 iemAImpl_neg_u8, iemAImpl_neg_u8_locked;
612	/** @} */
613
614	/** @name Arithmetic assignment operations on words (unary).
615	* @{ */
616	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU16, (uint16_t pu16Dst, uint32_t pEFlags));
617	typedef FNIEMAIMPLUNARYU16 *PFNIEMAIMPLUNARYU16;
618	FNIEMAIMPLUNARYU16 iemAImpl_inc_u16, iemAImpl_inc_u16_locked;
619	FNIEMAIMPLUNARYU16 iemAImpl_dec_u16, iemAImpl_dec_u16_locked;
620	FNIEMAIMPLUNARYU16 iemAImpl_not_u16, iemAImpl_not_u16_locked;
621	FNIEMAIMPLUNARYU16 iemAImpl_neg_u16, iemAImpl_neg_u16_locked;
622	/** @} */
623
624	/** @name Arithmetic assignment operations on double words (unary).
625	* @{ */
626	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU32, (uint32_t pu32Dst, uint32_t pEFlags));
627	typedef FNIEMAIMPLUNARYU32 *PFNIEMAIMPLUNARYU32;
628	FNIEMAIMPLUNARYU32 iemAImpl_inc_u32, iemAImpl_inc_u32_locked;
629	FNIEMAIMPLUNARYU32 iemAImpl_dec_u32, iemAImpl_dec_u32_locked;
630	FNIEMAIMPLUNARYU32 iemAImpl_not_u32, iemAImpl_not_u32_locked;
631	FNIEMAIMPLUNARYU32 iemAImpl_neg_u32, iemAImpl_neg_u32_locked;
632	/** @} */
633
634	/** @name Arithmetic assignment operations on quad words (unary).
635	* @{ */
636	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLUNARYU64, (uint64_t pu64Dst, uint32_t pEFlags));
637	typedef FNIEMAIMPLUNARYU64 *PFNIEMAIMPLUNARYU64;
638	FNIEMAIMPLUNARYU64 iemAImpl_inc_u64, iemAImpl_inc_u64_locked;
639	FNIEMAIMPLUNARYU64 iemAImpl_dec_u64, iemAImpl_dec_u64_locked;
640	FNIEMAIMPLUNARYU64 iemAImpl_not_u64, iemAImpl_not_u64_locked;
641	FNIEMAIMPLUNARYU64 iemAImpl_neg_u64, iemAImpl_neg_u64_locked;
642	/** @} */
643
644
645	/** @name Shift operations on bytes (Group 2).
646	* @{ */
647	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU8,(uint8_t pu8Dst, uint8_t cShift, uint32_t pEFlags));
648	typedef FNIEMAIMPLSHIFTU8 *PFNIEMAIMPLSHIFTU8;
649	FNIEMAIMPLSHIFTU8 iemAImpl_rol_u8;
650	FNIEMAIMPLSHIFTU8 iemAImpl_ror_u8;
651	FNIEMAIMPLSHIFTU8 iemAImpl_rcl_u8;
652	FNIEMAIMPLSHIFTU8 iemAImpl_rcr_u8;
653	FNIEMAIMPLSHIFTU8 iemAImpl_shl_u8;
654	FNIEMAIMPLSHIFTU8 iemAImpl_shr_u8;
655	FNIEMAIMPLSHIFTU8 iemAImpl_sar_u8;
656	/** @} */
657
658	/** @name Shift operations on words (Group 2).
659	* @{ */
660	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU16,(uint16_t pu16Dst, uint8_t cShift, uint32_t pEFlags));
661	typedef FNIEMAIMPLSHIFTU16 *PFNIEMAIMPLSHIFTU16;
662	FNIEMAIMPLSHIFTU16 iemAImpl_rol_u16;
663	FNIEMAIMPLSHIFTU16 iemAImpl_ror_u16;
664	FNIEMAIMPLSHIFTU16 iemAImpl_rcl_u16;
665	FNIEMAIMPLSHIFTU16 iemAImpl_rcr_u16;
666	FNIEMAIMPLSHIFTU16 iemAImpl_shl_u16;
667	FNIEMAIMPLSHIFTU16 iemAImpl_shr_u16;
668	FNIEMAIMPLSHIFTU16 iemAImpl_sar_u16;
669	/** @} */
670
671	/** @name Shift operations on double words (Group 2).
672	* @{ */
673	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU32,(uint32_t pu32Dst, uint8_t cShift, uint32_t pEFlags));
674	typedef FNIEMAIMPLSHIFTU32 *PFNIEMAIMPLSHIFTU32;
675	FNIEMAIMPLSHIFTU32 iemAImpl_rol_u32;
676	FNIEMAIMPLSHIFTU32 iemAImpl_ror_u32;
677	FNIEMAIMPLSHIFTU32 iemAImpl_rcl_u32;
678	FNIEMAIMPLSHIFTU32 iemAImpl_rcr_u32;
679	FNIEMAIMPLSHIFTU32 iemAImpl_shl_u32;
680	FNIEMAIMPLSHIFTU32 iemAImpl_shr_u32;
681	FNIEMAIMPLSHIFTU32 iemAImpl_sar_u32;
682	/** @} */
683
684	/** @name Shift operations on words (Group 2).
685	* @{ */
686	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLSHIFTU64,(uint64_t pu64Dst, uint8_t cShift, uint32_t pEFlags));
687	typedef FNIEMAIMPLSHIFTU64 *PFNIEMAIMPLSHIFTU64;
688	FNIEMAIMPLSHIFTU64 iemAImpl_rol_u64;
689	FNIEMAIMPLSHIFTU64 iemAImpl_ror_u64;
690	FNIEMAIMPLSHIFTU64 iemAImpl_rcl_u64;
691	FNIEMAIMPLSHIFTU64 iemAImpl_rcr_u64;
692	FNIEMAIMPLSHIFTU64 iemAImpl_shl_u64;
693	FNIEMAIMPLSHIFTU64 iemAImpl_shr_u64;
694	FNIEMAIMPLSHIFTU64 iemAImpl_sar_u64;
695	/** @} */
696
697	/** @name Multiplication and division operations.
698	* @{ */
699	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU8,(uint16_t pu16AX, uint8_t u8FactorDivisor, uint32_t pEFlags));
700	typedef FNIEMAIMPLMULDIVU8 *PFNIEMAIMPLMULDIVU8;
701	FNIEMAIMPLMULDIVU8 iemAImpl_mul_u8, iemAImpl_imul_u8;
702	FNIEMAIMPLMULDIVU8 iemAImpl_div_u8, iemAImpl_idiv_u8;
703
704	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU16,(uint16_t pu16AX, uint16_t pu16DX, uint16_t u16FactorDivisor, uint32_t *pEFlags));
705	typedef FNIEMAIMPLMULDIVU16 *PFNIEMAIMPLMULDIVU16;
706	FNIEMAIMPLMULDIVU16 iemAImpl_mul_u16, iemAImpl_imul_u16;
707	FNIEMAIMPLMULDIVU16 iemAImpl_div_u16, iemAImpl_idiv_u16;
708
709	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU32,(uint32_t pu32EAX, uint32_t pu32EDX, uint32_t u32FactorDivisor, uint32_t *pEFlags));
710	typedef FNIEMAIMPLMULDIVU32 *PFNIEMAIMPLMULDIVU32;
711	FNIEMAIMPLMULDIVU32 iemAImpl_mul_u32, iemAImpl_imul_u32;
712	FNIEMAIMPLMULDIVU32 iemAImpl_div_u32, iemAImpl_idiv_u32;
713
714	typedef IEM_DECL_IMPL_TYPE(int, FNIEMAIMPLMULDIVU64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64FactorDivisor, uint32_t *pEFlags));
715	typedef FNIEMAIMPLMULDIVU64 *PFNIEMAIMPLMULDIVU64;
716	FNIEMAIMPLMULDIVU64 iemAImpl_mul_u64, iemAImpl_imul_u64;
717	FNIEMAIMPLMULDIVU64 iemAImpl_div_u64, iemAImpl_idiv_u64;
718	/** @} */
719
720	/** @name Byte Swap.
721	* @{ */
722	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u16,(uint32_t pu32Dst)); / Yes, 32-bit register access. */
723	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u32,(uint32_t *pu32Dst));
724	IEM_DECL_IMPL_TYPE(void, iemAImpl_bswap_u64,(uint64_t *pu64Dst));
725	/** @} */
726
727
728	/** @name FPU operations taking a 32-bit float argument
729	* @{ */
730	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32U,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT32U pr32Val));
731	typedef FNIEMAIMPLFPUR32U *PFNIEMAIMPLFPUR32U;
732	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
733	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
734	typedef FNIEMAIMPLFPUR32FSW *PFNIEMAIMPLFPUR32FSW;
735	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
736	PCRTFLOAT80U pr80Val1, PCRTFLOAT32U pr32Val2));
737	typedef FNIEMAIMPLFPUR32 *PFNIEMAIMPLFPUR32;
738
739	FNIEMAIMPLFPUR32U iemAImpl_fld_r32_to_r80;
740	FNIEMAIMPLFPUR32FSW iemAImpl_fcom_r80_by_r32;
741	FNIEMAIMPLFPUR32 iemAImpl_fadd_r80_by_r32;
742	FNIEMAIMPLFPUR32 iemAImpl_fmul_r80_by_r32;
743	FNIEMAIMPLFPUR32 iemAImpl_fsub_r80_by_r32;
744	FNIEMAIMPLFPUR32 iemAImpl_fsubr_r80_by_r32;
745	FNIEMAIMPLFPUR32 iemAImpl_fdiv_r80_by_r32;
746	FNIEMAIMPLFPUR32 iemAImpl_fdivr_r80_by_r32;
747	/** @} */
748
749	/** @name FPU operations taking a 64-bit float argument
750	* @{ */
751	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
752	PCRTFLOAT80U pr80Val1, PCRTFLOAT64U pr64Val2));
753	typedef FNIEMAIMPLFPUR64 *PFNIEMAIMPLFPUR64;
754	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR64U,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTFLOAT64U pr64Val));
755	typedef FNIEMAIMPLFPUR64U *PFNIEMAIMPLFPUR64U;
756
757	FNIEMAIMPLFPUR64U iemAImpl_fld_r64_to_r80;
758	FNIEMAIMPLFPUR64 iemAImpl_fadd_r80_by_r64;
759	FNIEMAIMPLFPUR64 iemAImpl_fmul_r80_by_r64;
760	FNIEMAIMPLFPUR64 iemAImpl_fcom_r80_by_r64;
761	FNIEMAIMPLFPUR64 iemAImpl_fsub_r80_by_r64;
762	FNIEMAIMPLFPUR64 iemAImpl_fsubr_r80_by_r64;
763	FNIEMAIMPLFPUR64 iemAImpl_fdiv_r80_by_r64;
764	FNIEMAIMPLFPUR64 iemAImpl_fdivr_r80_by_r64;
765	/** @} */
766
767	/** @name FPU operations taking a 80-bit float argument
768	* @{ */
769	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80FSW,(PCX86FXSTATE pFpuState, uint16_t *pFSW,
770	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
771	typedef FNIEMAIMPLFPUR80FSW *PFNIEMAIMPLFPUR80FSW;
772	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUR80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes,
773	PCRTFLOAT80U pr80Val1, PCRTFLOAT80U pr80Val2));
774	typedef FNIEMAIMPLFPUR80 *PFNIEMAIMPLFPUR80;
775
776	FNIEMAIMPLFPUR80FSW iemAImpl_fcom_r80_by_r80;
777	FNIEMAIMPLFPUR80 iemAImpl_fadd_r80_by_r80;
778	FNIEMAIMPLFPUR80 iemAImpl_fmul_r80_by_r80;
779	FNIEMAIMPLFPUR80 iemAImpl_fsub_r80_by_r80;
780	FNIEMAIMPLFPUR80 iemAImpl_fsubr_r80_by_r80;
781	FNIEMAIMPLFPUR80 iemAImpl_fdiv_r80_by_r80;
782	FNIEMAIMPLFPUR80 iemAImpl_fdivr_r80_by_r80;
783	/** @} */
784
785	/** @name FPU operations taking a 32-bit signed integer argument
786	* @{ */
787	typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLFPUS32OUT,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,
788	int32_t *pi32Dst, PCRTFLOAT80U pr80Value));
789	typedef FNIEMAIMPLFPUS32OUT *PFNIEMAIMPLFPUS32OUT;
790
791	FNIEMAIMPLFPUS32OUT iemAImpl_fpu_r80_to_i32;
792
793	/** @} */
794
795
796	/** @name Function tables.
797	* @{
798	*/
799
800	/**
801	* Function table for a binary operator providing implementation based on
802	* operand size.
803	*/
804	typedef struct IEMOPBINSIZES
805	{
806	PFNIEMAIMPLBINU8 pfnNormalU8, pfnLockedU8;
807	PFNIEMAIMPLBINU16 pfnNormalU16, pfnLockedU16;
808	PFNIEMAIMPLBINU32 pfnNormalU32, pfnLockedU32;
809	PFNIEMAIMPLBINU64 pfnNormalU64, pfnLockedU64;
810	} IEMOPBINSIZES;
811	/** Pointer to a binary operator function table. */
812	typedef IEMOPBINSIZES const *PCIEMOPBINSIZES;
813
814
815	/**
816	* Function table for a unary operator providing implementation based on
817	* operand size.
818	*/
819	typedef struct IEMOPUNARYSIZES
820	{
821	PFNIEMAIMPLUNARYU8 pfnNormalU8, pfnLockedU8;
822	PFNIEMAIMPLUNARYU16 pfnNormalU16, pfnLockedU16;
823	PFNIEMAIMPLUNARYU32 pfnNormalU32, pfnLockedU32;
824	PFNIEMAIMPLUNARYU64 pfnNormalU64, pfnLockedU64;
825	} IEMOPUNARYSIZES;
826	/** Pointer to a unary operator function table. */
827	typedef IEMOPUNARYSIZES const *PCIEMOPUNARYSIZES;
828
829
830	/**
831	* Function table for a shift operator providing implementation based on
832	* operand size.
833	*/
834	typedef struct IEMOPSHIFTSIZES
835	{
836	PFNIEMAIMPLSHIFTU8 pfnNormalU8;
837	PFNIEMAIMPLSHIFTU16 pfnNormalU16;
838	PFNIEMAIMPLSHIFTU32 pfnNormalU32;
839	PFNIEMAIMPLSHIFTU64 pfnNormalU64;
840	} IEMOPSHIFTSIZES;
841	/** Pointer to a shift operator function table. */
842	typedef IEMOPSHIFTSIZES const *PCIEMOPSHIFTSIZES;
843
844
845	/**
846	* Function table for a multiplication or division operation.
847	*/
848	typedef struct IEMOPMULDIVSIZES
849	{
850	PFNIEMAIMPLMULDIVU8 pfnU8;
851	PFNIEMAIMPLMULDIVU16 pfnU16;
852	PFNIEMAIMPLMULDIVU32 pfnU32;
853	PFNIEMAIMPLMULDIVU64 pfnU64;
854	} IEMOPMULDIVSIZES;
855	/** Pointer to a multiplication or division operation function table. */
856	typedef IEMOPMULDIVSIZES const *PCIEMOPMULDIVSIZES;
857
858
859	/**
860	* Function table for a double precision shift operator providing implementation
861	* based on operand size.
862	*/
863	typedef struct IEMOPSHIFTDBLSIZES
864	{
865	PFNIEMAIMPLSHIFTDBLU16 pfnNormalU16;
866	PFNIEMAIMPLSHIFTDBLU32 pfnNormalU32;
867	PFNIEMAIMPLSHIFTDBLU64 pfnNormalU64;
868	} IEMOPSHIFTDBLSIZES;
869	/** Pointer to a double precision shift function table. */
870	typedef IEMOPSHIFTDBLSIZES const *PCIEMOPSHIFTDBLSIZES;
871
872
873	/** @} */
874
875
876	/** @name C instruction implementations for anything slightly complicated.
877	* @{ */
878
879	/**
880	* For typedef'ing or declaring a C instruction implementation function taking
881	* no extra arguments.
882	*
883	* @param a_Name The name of the type.
884	*/
885	# define IEM_CIMPL_DECL_TYPE_0(a_Name) \
886	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
887	/**
888	* For defining a C instruction implementation function taking no extra
889	* arguments.
890	*
891	* @param a_Name The name of the function
892	*/
893	# define IEM_CIMPL_DEF_0(a_Name) \
894	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr))
895	/**
896	* For calling a C instruction implementation function taking no extra
897	* arguments.
898	*
899	* This special call macro adds default arguments to the call and allow us to
900	* change these later.
901	*
902	* @param a_fn The name of the function.
903	*/
904	# define IEM_CIMPL_CALL_0(a_fn) a_fn(pIemCpu, cbInstr)
905
906	/**
907	* For typedef'ing or declaring a C instruction implementation function taking
908	* one extra argument.
909	*
910	* @param a_Name The name of the type.
911	* @param a_Type0 The argument type.
912	* @param a_Arg0 The argument name.
913	*/
914	# define IEM_CIMPL_DECL_TYPE_1(a_Name, a_Type0, a_Arg0) \
915	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
916	/**
917	* For defining a C instruction implementation function taking one extra
918	* argument.
919	*
920	* @param a_Name The name of the function
921	* @param a_Type0 The argument type.
922	* @param a_Arg0 The argument name.
923	*/
924	# define IEM_CIMPL_DEF_1(a_Name, a_Type0, a_Arg0) \
925	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0))
926	/**
927	* For calling a C instruction implementation function taking one extra
928	* argument.
929	*
930	* This special call macro adds default arguments to the call and allow us to
931	* change these later.
932	*
933	* @param a_fn The name of the function.
934	* @param a0 The name of the 1st argument.
935	*/
936	# define IEM_CIMPL_CALL_1(a_fn, a0) a_fn(pIemCpu, cbInstr, (a0))
937
938	/**
939	* For typedef'ing or declaring a C instruction implementation function taking
940	* two extra arguments.
941	*
942	* @param a_Name The name of the type.
943	* @param a_Type0 The type of the 1st argument
944	* @param a_Arg0 The name of the 1st argument.
945	* @param a_Type1 The type of the 2nd argument.
946	* @param a_Arg1 The name of the 2nd argument.
947	*/
948	# define IEM_CIMPL_DECL_TYPE_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
949	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
950	/**
951	* For defining a C instruction implementation function taking two extra
952	* arguments.
953	*
954	* @param a_Name The name of the function.
955	* @param a_Type0 The type of the 1st argument
956	* @param a_Arg0 The name of the 1st argument.
957	* @param a_Type1 The type of the 2nd argument.
958	* @param a_Arg1 The name of the 2nd argument.
959	*/
960	# define IEM_CIMPL_DEF_2(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1) \
961	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1))
962	/**
963	* For calling a C instruction implementation function taking two extra
964	* arguments.
965	*
966	* This special call macro adds default arguments to the call and allow us to
967	* change these later.
968	*
969	* @param a_fn The name of the function.
970	* @param a0 The name of the 1st argument.
971	* @param a1 The name of the 2nd argument.
972	*/
973	# define IEM_CIMPL_CALL_2(a_fn, a0, a1) a_fn(pIemCpu, cbInstr, (a0), (a1))
974
975	/**
976	* For typedef'ing or declaring a C instruction implementation function taking
977	* three extra arguments.
978	*
979	* @param a_Name The name of the type.
980	* @param a_Type0 The type of the 1st argument
981	* @param a_Arg0 The name of the 1st argument.
982	* @param a_Type1 The type of the 2nd argument.
983	* @param a_Arg1 The name of the 2nd argument.
984	* @param a_Type2 The type of the 3rd argument.
985	* @param a_Arg2 The name of the 3rd argument.
986	*/
987	# define IEM_CIMPL_DECL_TYPE_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
988	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
989	/**
990	* For defining a C instruction implementation function taking three extra
991	* arguments.
992	*
993	* @param a_Name The name of the function.
994	* @param a_Type0 The type of the 1st argument
995	* @param a_Arg0 The name of the 1st argument.
996	* @param a_Type1 The type of the 2nd argument.
997	* @param a_Arg1 The name of the 2nd argument.
998	* @param a_Type2 The type of the 3rd argument.
999	* @param a_Arg2 The name of the 3rd argument.
1000	*/
1001	# define IEM_CIMPL_DEF_3(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2) \
1002	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2))
1003	/**
1004	* For calling a C instruction implementation function taking three extra
1005	* arguments.
1006	*
1007	* This special call macro adds default arguments to the call and allow us to
1008	* change these later.
1009	*
1010	* @param a_fn The name of the function.
1011	* @param a0 The name of the 1st argument.
1012	* @param a1 The name of the 2nd argument.
1013	* @param a2 The name of the 3rd argument.
1014	*/
1015	# define IEM_CIMPL_CALL_3(a_fn, a0, a1, a2) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2))
1016
1017
1018	/**
1019	* For typedef'ing or declaring a C instruction implementation function taking
1020	* four extra arguments.
1021	*
1022	* @param a_Name The name of the type.
1023	* @param a_Type0 The type of the 1st argument
1024	* @param a_Arg0 The name of the 1st argument.
1025	* @param a_Type1 The type of the 2nd argument.
1026	* @param a_Arg1 The name of the 2nd argument.
1027	* @param a_Type2 The type of the 3rd argument.
1028	* @param a_Arg2 The name of the 3rd argument.
1029	* @param a_Type3 The type of the 4th argument.
1030	* @param a_Arg3 The name of the 4th argument.
1031	*/
1032	# define IEM_CIMPL_DECL_TYPE_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1033	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, a_Type3 a_Arg3))
1034	/**
1035	* For defining a C instruction implementation function taking four extra
1036	* arguments.
1037	*
1038	* @param a_Name The name of the function.
1039	* @param a_Type0 The type of the 1st argument
1040	* @param a_Arg0 The name of the 1st argument.
1041	* @param a_Type1 The type of the 2nd argument.
1042	* @param a_Arg1 The name of the 2nd argument.
1043	* @param a_Type2 The type of the 3rd argument.
1044	* @param a_Arg2 The name of the 3rd argument.
1045	* @param a_Type3 The type of the 4th argument.
1046	* @param a_Arg3 The name of the 4th argument.
1047	*/
1048	# define IEM_CIMPL_DEF_4(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3) \
1049	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, a_Type0 a_Arg0, a_Type1 a_Arg1, \
1050	a_Type2 a_Arg2, a_Type3 a_Arg3))
1051	/**
1052	* For calling a C instruction implementation function taking four extra
1053	* arguments.
1054	*
1055	* This special call macro adds default arguments to the call and allow us to
1056	* change these later.
1057	*
1058	* @param a_fn The name of the function.
1059	* @param a0 The name of the 1st argument.
1060	* @param a1 The name of the 2nd argument.
1061	* @param a2 The name of the 3rd argument.
1062	* @param a3 The name of the 4th argument.
1063	*/
1064	# define IEM_CIMPL_CALL_4(a_fn, a0, a1, a2, a3) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3))
1065
1066
1067	/**
1068	* For typedef'ing or declaring a C instruction implementation function taking
1069	* five extra arguments.
1070	*
1071	* @param a_Name The name of the type.
1072	* @param a_Type0 The type of the 1st argument
1073	* @param a_Arg0 The name of the 1st argument.
1074	* @param a_Type1 The type of the 2nd argument.
1075	* @param a_Arg1 The name of the 2nd argument.
1076	* @param a_Type2 The type of the 3rd argument.
1077	* @param a_Arg2 The name of the 3rd argument.
1078	* @param a_Type3 The type of the 4th argument.
1079	* @param a_Arg3 The name of the 4th argument.
1080	* @param a_Type4 The type of the 5th argument.
1081	* @param a_Arg4 The name of the 5th argument.
1082	*/
1083	# define IEM_CIMPL_DECL_TYPE_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1084	IEM_DECL_IMPL_TYPE(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1085	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1086	a_Type3 a_Arg3, a_Type4 a_Arg4))
1087	/**
1088	* For defining a C instruction implementation function taking five extra
1089	* arguments.
1090	*
1091	* @param a_Name The name of the function.
1092	* @param a_Type0 The type of the 1st argument
1093	* @param a_Arg0 The name of the 1st argument.
1094	* @param a_Type1 The type of the 2nd argument.
1095	* @param a_Arg1 The name of the 2nd argument.
1096	* @param a_Type2 The type of the 3rd argument.
1097	* @param a_Arg2 The name of the 3rd argument.
1098	* @param a_Type3 The type of the 4th argument.
1099	* @param a_Arg3 The name of the 4th argument.
1100	* @param a_Type4 The type of the 5th argument.
1101	* @param a_Arg4 The name of the 5th argument.
1102	*/
1103	# define IEM_CIMPL_DEF_5(a_Name, a_Type0, a_Arg0, a_Type1, a_Arg1, a_Type2, a_Arg2, a_Type3, a_Arg3, a_Type4, a_Arg4) \
1104	IEM_DECL_IMPL_DEF(VBOXSTRICTRC, a_Name, (PIEMCPU pIemCpu, uint8_t cbInstr, \
1105	a_Type0 a_Arg0, a_Type1 a_Arg1, a_Type2 a_Arg2, \
1106	a_Type3 a_Arg3, a_Type4 a_Arg4))
1107	/**
1108	* For calling a C instruction implementation function taking five extra
1109	* arguments.
1110	*
1111	* This special call macro adds default arguments to the call and allow us to
1112	* change these later.
1113	*
1114	* @param a_fn The name of the function.
1115	* @param a0 The name of the 1st argument.
1116	* @param a1 The name of the 2nd argument.
1117	* @param a2 The name of the 3rd argument.
1118	* @param a3 The name of the 4th argument.
1119	* @param a4 The name of the 5th argument.
1120	*/
1121	# define IEM_CIMPL_CALL_5(a_fn, a0, a1, a2, a3, a4) a_fn(pIemCpu, cbInstr, (a0), (a1), (a2), (a3), (a4))
1122
1123	/** @} */
1124
1125
1126	/** @} */
1127
1128	RT_C_DECLS_END
1129
1130	#endif
1131

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source: vbox/trunk/src/VBox/VMM/include/IEMInternal.h@ 40209

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