VirtualBox

source: vbox/trunk/src/VBox/VMM/include/PDMInternal.h@ 83263

Last change on this file since 83263 was 83263, checked in by vboxsync, 5 years ago

AMD IOMMU: bugref:9654 Skeletal bits.
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1/* $Id: PDMInternal.h 83263 2020-03-11 16:34:33Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.215389.xyz. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VMM_INCLUDED_SRC_include_PDMInternal_h
19#define VMM_INCLUDED_SRC_include_PDMInternal_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#include <VBox/types.h>
25#include <VBox/param.h>
26#include <VBox/vmm/cfgm.h>
27#include <VBox/vmm/stam.h>
28#include <VBox/vusb.h>
29#include <VBox/vmm/pdmasynccompletion.h>
30#ifdef VBOX_WITH_NETSHAPER
31# include <VBox/vmm/pdmnetshaper.h>
32#endif
33#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
34# include <VBox/vmm/pdmasynccompletion.h>
35#endif
36#include <VBox/vmm/pdmblkcache.h>
37#include <VBox/vmm/pdmcommon.h>
38#include <VBox/vmm/pdmtask.h>
39#include <VBox/sup.h>
40#include <iprt/assert.h>
41#include <iprt/critsect.h>
42#ifdef IN_RING3
43# include <iprt/thread.h>
44#endif
45
46RT_C_DECLS_BEGIN
47
48
49/** @defgroup grp_pdm_int Internal
50 * @ingroup grp_pdm
51 * @internal
52 * @{
53 */
54
55/** @def PDM_WITH_R3R0_CRIT_SECT
56 * Enables or disabled ring-3/ring-0 critical sections. */
57#if defined(DOXYGEN_RUNNING) || 1
58# define PDM_WITH_R3R0_CRIT_SECT
59#endif
60
61/** @def PDMCRITSECT_STRICT
62 * Enables/disables PDM critsect strictness like deadlock detection. */
63#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(PDMCRITSECT_STRICT)) \
64 || defined(DOXYGEN_RUNNING)
65# define PDMCRITSECT_STRICT
66#endif
67
68/** @def PDMCRITSECT_STRICT
69 * Enables/disables PDM read/write critsect strictness like deadlock
70 * detection. */
71#if (defined(RT_LOCK_STRICT) && defined(IN_RING3) && !defined(PDMCRITSECTRW_STRICT)) \
72 || defined(DOXYGEN_RUNNING)
73# define PDMCRITSECTRW_STRICT
74#endif
75
76/** The maximum device instance (total) size, ring-0/raw-mode capable devices. */
77#define PDM_MAX_DEVICE_INSTANCE_SIZE _4M
78/** The maximum device instance (total) size, ring-3 only devices. */
79#define PDM_MAX_DEVICE_INSTANCE_SIZE_R3 _8M
80
81
82
83/*******************************************************************************
84* Structures and Typedefs *
85*******************************************************************************/
86
87/** Pointer to a PDM Device. */
88typedef struct PDMDEV *PPDMDEV;
89/** Pointer to a pointer to a PDM Device. */
90typedef PPDMDEV *PPPDMDEV;
91
92/** Pointer to a PDM USB Device. */
93typedef struct PDMUSB *PPDMUSB;
94/** Pointer to a pointer to a PDM USB Device. */
95typedef PPDMUSB *PPPDMUSB;
96
97/** Pointer to a PDM Driver. */
98typedef struct PDMDRV *PPDMDRV;
99/** Pointer to a pointer to a PDM Driver. */
100typedef PPDMDRV *PPPDMDRV;
101
102/** Pointer to a PDM Logical Unit. */
103typedef struct PDMLUN *PPDMLUN;
104/** Pointer to a pointer to a PDM Logical Unit. */
105typedef PPDMLUN *PPPDMLUN;
106
107/** Pointer to a PDM PCI Bus instance. */
108typedef struct PDMPCIBUS *PPDMPCIBUS;
109/** Pointer to a PDM IOMMU instance. */
110typedef struct PDMIOMMU *PPDMIOMMU;
111/** Pointer to a DMAC instance. */
112typedef struct PDMDMAC *PPDMDMAC;
113/** Pointer to a RTC instance. */
114typedef struct PDMRTC *PPDMRTC;
115
116/** Pointer to an USB HUB registration record. */
117typedef struct PDMUSBHUB *PPDMUSBHUB;
118
119/**
120 * Supported asynchronous completion endpoint classes.
121 */
122typedef enum PDMASYNCCOMPLETIONEPCLASSTYPE
123{
124 /** File class. */
125 PDMASYNCCOMPLETIONEPCLASSTYPE_FILE = 0,
126 /** Number of supported classes. */
127 PDMASYNCCOMPLETIONEPCLASSTYPE_MAX,
128 /** 32bit hack. */
129 PDMASYNCCOMPLETIONEPCLASSTYPE_32BIT_HACK = 0x7fffffff
130} PDMASYNCCOMPLETIONEPCLASSTYPE;
131
132/**
133 * Private device instance data, ring-3.
134 */
135typedef struct PDMDEVINSINTR3
136{
137 /** Pointer to the next instance.
138 * (Head is pointed to by PDM::pDevInstances.) */
139 R3PTRTYPE(PPDMDEVINS) pNextR3;
140 /** Pointer to the next per device instance.
141 * (Head is pointed to by PDMDEV::pInstances.) */
142 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
143 /** Pointer to device structure. */
144 R3PTRTYPE(PPDMDEV) pDevR3;
145 /** Pointer to the list of logical units associated with the device. (FIFO) */
146 R3PTRTYPE(PPDMLUN) pLunsR3;
147 /** Pointer to the asynchronous notification callback set while in
148 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
149 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
150 /** Configuration handle to the instance node. */
151 R3PTRTYPE(PCFGMNODE) pCfgHandle;
152
153 /** R3 pointer to the VM this instance was created for. */
154 PVMR3 pVMR3;
155
156 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
157 uint32_t fIntFlags;
158 /** The last IRQ tag (for tracing it thru clearing). */
159 uint32_t uLastIrqTag;
160 /** The ring-0 device index (for making ring-0 calls). */
161 uint32_t idxR0Device;
162} PDMDEVINSINTR3;
163
164
165/**
166 * Private device instance data, ring-0.
167 */
168typedef struct PDMDEVINSINTR0
169{
170 /** Pointer to the VM this instance was created for. */
171 R0PTRTYPE(PGVM) pGVM;
172 /** Pointer to device structure. */
173 R0PTRTYPE(struct PDMDEVREGR0 const *) pRegR0;
174 /** The ring-0 module reference. */
175 RTR0PTR hMod;
176 /** Pointer to the ring-0 mapping of the ring-3 internal data (for uLastIrqTag). */
177 R0PTRTYPE(PDMDEVINSINTR3 *) pIntR3R0;
178 /** Pointer to the ring-0 mapping of the ring-3 instance (for idTracing). */
179 R0PTRTYPE(struct PDMDEVINSR3 *) pInsR3R0;
180 /** The device instance memory. */
181 RTR0MEMOBJ hMemObj;
182 /** The ring-3 mapping object. */
183 RTR0MEMOBJ hMapObj;
184 /** Index into PDMR0PERVM::apDevInstances. */
185 uint32_t idxR0Device;
186} PDMDEVINSINTR0;
187
188
189/**
190 * Private device instance data, raw-mode
191 */
192typedef struct PDMDEVINSINTRC
193{
194 /** Pointer to the VM this instance was created for. */
195 RGPTRTYPE(PVM) pVMRC;
196} PDMDEVINSINTRC;
197
198
199/**
200 * Private device instance data.
201 */
202typedef struct PDMDEVINSINT
203{
204 /** Pointer to the next instance (HC Ptr).
205 * (Head is pointed to by PDM::pDevInstances.) */
206 R3PTRTYPE(PPDMDEVINS) pNextR3;
207 /** Pointer to the next per device instance (HC Ptr).
208 * (Head is pointed to by PDMDEV::pInstances.) */
209 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
210 /** Pointer to device structure - HC Ptr. */
211 R3PTRTYPE(PPDMDEV) pDevR3;
212 /** Pointer to the list of logical units associated with the device. (FIFO) */
213 R3PTRTYPE(PPDMLUN) pLunsR3;
214 /** Pointer to the asynchronous notification callback set while in
215 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
216 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
217 /** Configuration handle to the instance node. */
218 R3PTRTYPE(PCFGMNODE) pCfgHandle;
219
220 /** R3 pointer to the VM this instance was created for. */
221 PVMR3 pVMR3;
222
223 /** R0 pointer to the VM this instance was created for. */
224 R0PTRTYPE(PVMCC) pVMR0;
225
226 /** RC pointer to the VM this instance was created for. */
227 PVMRC pVMRC;
228
229 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
230 uint32_t fIntFlags;
231 /** The last IRQ tag (for tracing it thru clearing). */
232 uint32_t uLastIrqTag;
233} PDMDEVINSINT;
234
235/** @name PDMDEVINSINT::fIntFlags
236 * @{ */
237/** Used by pdmR3Load to mark device instances it found in the saved state. */
238#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
239/** Indicates that the device hasn't been powered on or resumed.
240 * This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
241 * to make sure each device gets exactly one notification for each of those
242 * events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
243 * a failure (already resumed/powered-on devices are suspended).
244 * PDMR3PowerOff resets this flag once before going through the devices to make sure
245 * every device gets the power off notification even if it was suspended before with
246 * PDMR3Suspend.
247 */
248#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
249/** Indicates that the device has been reset already. Used by PDMR3Reset. */
250#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
251#define PDMDEVINSINT_FLAGS_R0_ENABLED RT_BIT_32(3)
252#define PDMDEVINSINT_FLAGS_RC_ENABLED RT_BIT_32(4)
253/** Set if we've called the ring-0 constructor. */
254#define PDMDEVINSINT_FLAGS_R0_CONTRUCT RT_BIT_32(5)
255/** Set if using non-default critical section. */
256#define PDMDEVINSINT_FLAGS_CHANGED_CRITSECT RT_BIT_32(6)
257/** @} */
258
259
260/**
261 * Private USB device instance data.
262 */
263typedef struct PDMUSBINSINT
264{
265 /** The UUID of this instance. */
266 RTUUID Uuid;
267 /** Pointer to the next instance.
268 * (Head is pointed to by PDM::pUsbInstances.) */
269 R3PTRTYPE(PPDMUSBINS) pNext;
270 /** Pointer to the next per USB device instance.
271 * (Head is pointed to by PDMUSB::pInstances.) */
272 R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
273
274 /** Pointer to device structure. */
275 R3PTRTYPE(PPDMUSB) pUsbDev;
276
277 /** Pointer to the VM this instance was created for. */
278 PVMR3 pVM;
279 /** Pointer to the list of logical units associated with the device. (FIFO) */
280 R3PTRTYPE(PPDMLUN) pLuns;
281 /** The per instance device configuration. */
282 R3PTRTYPE(PCFGMNODE) pCfg;
283 /** Same as pCfg if the configuration should be deleted when detaching the device. */
284 R3PTRTYPE(PCFGMNODE) pCfgDelete;
285 /** The global device configuration. */
286 R3PTRTYPE(PCFGMNODE) pCfgGlobal;
287
288 /** Pointer to the USB hub this device is attached to.
289 * This is NULL if the device isn't connected to any HUB. */
290 R3PTRTYPE(PPDMUSBHUB) pHub;
291 /** The port number that we're connected to. */
292 uint32_t iPort;
293 /** Indicates that the USB device hasn't been powered on or resumed.
294 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
295 bool fVMSuspended;
296 /** Indicates that the USB device has been reset. */
297 bool fVMReset;
298 /** Pointer to the asynchronous notification callback set while in
299 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
300 R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
301} PDMUSBINSINT;
302
303
304/**
305 * Private driver instance data.
306 */
307typedef struct PDMDRVINSINT
308{
309 /** Pointer to the driver instance above.
310 * This is NULL for the topmost drive. */
311 R3PTRTYPE(PPDMDRVINS) pUp;
312 /** Pointer to the driver instance below.
313 * This is NULL for the bottommost driver. */
314 R3PTRTYPE(PPDMDRVINS) pDown;
315 /** Pointer to the logical unit this driver chained on. */
316 R3PTRTYPE(PPDMLUN) pLun;
317 /** Pointer to driver structure from which this was instantiated. */
318 R3PTRTYPE(PPDMDRV) pDrv;
319 /** Pointer to the VM this instance was created for, ring-3 context. */
320 PVMR3 pVMR3;
321 /** Pointer to the VM this instance was created for, ring-0 context. */
322 R0PTRTYPE(PVMCC) pVMR0;
323 /** Pointer to the VM this instance was created for, raw-mode context. */
324 PVMRC pVMRC;
325 /** Flag indicating that the driver is being detached and destroyed.
326 * (Helps detect potential recursive detaching.) */
327 bool fDetaching;
328 /** Indicates that the driver hasn't been powered on or resumed.
329 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
330 bool fVMSuspended;
331 /** Indicates that the driver has been reset already. */
332 bool fVMReset;
333 /** Set if allocated on the hyper heap, false if on the ring-3 heap. */
334 bool fHyperHeap;
335 /** Pointer to the asynchronous notification callback set while in
336 * PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
337 R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
338 /** Configuration handle to the instance node. */
339 R3PTRTYPE(PCFGMNODE) pCfgHandle;
340 /** Pointer to the ring-0 request handler function. */
341 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
342} PDMDRVINSINT;
343
344
345/**
346 * Private critical section data.
347 */
348typedef struct PDMCRITSECTINT
349{
350 /** The critical section core which is shared with IPRT.
351 * @note The semaphore is a SUPSEMEVENT. */
352 RTCRITSECT Core;
353 /** Pointer to the next critical section.
354 * This chain is used for relocating pVMRC and device cleanup. */
355 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
356 /** Owner identifier.
357 * This is pDevIns if the owner is a device. Similarly for a driver or service.
358 * PDMR3CritSectInit() sets this to point to the critsect itself. */
359 RTR3PTR pvKey;
360 /** Pointer to the VM - R3Ptr. */
361 PVMR3 pVMR3;
362 /** Pointer to the VM - R0Ptr. */
363 R0PTRTYPE(PVMCC) pVMR0;
364 /** Pointer to the VM - GCPtr. */
365 PVMRC pVMRC;
366 /** Set if this critical section is the automatically created default
367 * section of a device. */
368 bool fAutomaticDefaultCritsect;
369 /** Set if the critical section is used by a timer or similar.
370 * See PDMR3DevGetCritSect. */
371 bool fUsedByTimerOrSimilar;
372 /** Alignment padding. */
373 bool afPadding[2];
374 /** Support driver event semaphore that is scheduled to be signaled upon leaving
375 * the critical section. This is only for Ring-3 and Ring-0. */
376 SUPSEMEVENT hEventToSignal;
377 /** The lock name. */
378 R3PTRTYPE(const char *) pszName;
379 /** R0/RC lock contention. */
380 STAMCOUNTER StatContentionRZLock;
381 /** R0/RC unlock contention. */
382 STAMCOUNTER StatContentionRZUnlock;
383 /** R3 lock contention. */
384 STAMCOUNTER StatContentionR3;
385 /** Profiling the time the section is locked. */
386 STAMPROFILEADV StatLocked;
387} PDMCRITSECTINT;
388AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
389/** Pointer to private critical section data. */
390typedef PDMCRITSECTINT *PPDMCRITSECTINT;
391
392/** Indicates that the critical section is queued for unlock.
393 * PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
394#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
395
396
397/**
398 * Private critical section data.
399 */
400typedef struct PDMCRITSECTRWINT
401{
402 /** The read/write critical section core which is shared with IPRT.
403 * @note The semaphores are SUPSEMEVENT and SUPSEMEVENTMULTI. */
404 RTCRITSECTRW Core;
405
406 /** Pointer to the next critical section.
407 * This chain is used for relocating pVMRC and device cleanup. */
408 R3PTRTYPE(struct PDMCRITSECTRWINT *) pNext;
409 /** Owner identifier.
410 * This is pDevIns if the owner is a device. Similarly for a driver or service.
411 * PDMR3CritSectInit() sets this to point to the critsect itself. */
412 RTR3PTR pvKey;
413 /** Pointer to the VM - R3Ptr. */
414 PVMR3 pVMR3;
415 /** Pointer to the VM - R0Ptr. */
416 R0PTRTYPE(PVMCC) pVMR0;
417 /** Pointer to the VM - GCPtr. */
418 PVMRC pVMRC;
419#if HC_ARCH_BITS == 64
420 /** Alignment padding. */
421 RTRCPTR RCPtrPadding;
422#endif
423 /** The lock name. */
424 R3PTRTYPE(const char *) pszName;
425 /** R0/RC write lock contention. */
426 STAMCOUNTER StatContentionRZEnterExcl;
427 /** R0/RC write unlock contention. */
428 STAMCOUNTER StatContentionRZLeaveExcl;
429 /** R0/RC read lock contention. */
430 STAMCOUNTER StatContentionRZEnterShared;
431 /** R0/RC read unlock contention. */
432 STAMCOUNTER StatContentionRZLeaveShared;
433 /** R0/RC writes. */
434 STAMCOUNTER StatRZEnterExcl;
435 /** R0/RC reads. */
436 STAMCOUNTER StatRZEnterShared;
437 /** R3 write lock contention. */
438 STAMCOUNTER StatContentionR3EnterExcl;
439 /** R3 read lock contention. */
440 STAMCOUNTER StatContentionR3EnterShared;
441 /** R3 writes. */
442 STAMCOUNTER StatR3EnterExcl;
443 /** R3 reads. */
444 STAMCOUNTER StatR3EnterShared;
445 /** Profiling the time the section is write locked. */
446 STAMPROFILEADV StatWriteLocked;
447} PDMCRITSECTRWINT;
448AssertCompileMemberAlignment(PDMCRITSECTRWINT, StatContentionRZEnterExcl, 8);
449AssertCompileMemberAlignment(PDMCRITSECTRWINT, Core.u64State, 8);
450/** Pointer to private critical section data. */
451typedef PDMCRITSECTRWINT *PPDMCRITSECTRWINT;
452
453
454
455/**
456 * The usual device/driver/internal/external stuff.
457 */
458typedef enum
459{
460 /** The usual invalid entry. */
461 PDMTHREADTYPE_INVALID = 0,
462 /** Device type. */
463 PDMTHREADTYPE_DEVICE,
464 /** USB Device type. */
465 PDMTHREADTYPE_USB,
466 /** Driver type. */
467 PDMTHREADTYPE_DRIVER,
468 /** Internal type. */
469 PDMTHREADTYPE_INTERNAL,
470 /** External type. */
471 PDMTHREADTYPE_EXTERNAL,
472 /** The usual 32-bit hack. */
473 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
474} PDMTHREADTYPE;
475
476
477/**
478 * The internal structure for the thread.
479 */
480typedef struct PDMTHREADINT
481{
482 /** The VM pointer. */
483 PVMR3 pVM;
484 /** The event semaphore the thread blocks on when not running. */
485 RTSEMEVENTMULTI BlockEvent;
486 /** The event semaphore the thread sleeps on while running. */
487 RTSEMEVENTMULTI SleepEvent;
488 /** Pointer to the next thread. */
489 R3PTRTYPE(struct PDMTHREAD *) pNext;
490 /** The thread type. */
491 PDMTHREADTYPE enmType;
492} PDMTHREADINT;
493
494
495
496/* Must be included after PDMDEVINSINT is defined. */
497#define PDMDEVINSINT_DECLARED
498#define PDMUSBINSINT_DECLARED
499#define PDMDRVINSINT_DECLARED
500#define PDMCRITSECTINT_DECLARED
501#define PDMCRITSECTRWINT_DECLARED
502#define PDMTHREADINT_DECLARED
503#ifdef ___VBox_pdm_h
504# error "Invalid header PDM order. Include PDMInternal.h before VBox/vmm/pdm.h!"
505#endif
506RT_C_DECLS_END
507#include <VBox/vmm/pdm.h>
508RT_C_DECLS_BEGIN
509
510/**
511 * PDM Logical Unit.
512 *
513 * This typically the representation of a physical port on a
514 * device, like for instance the PS/2 keyboard port on the
515 * keyboard controller device. The LUNs are chained on the
516 * device they belong to (PDMDEVINSINT::pLunsR3).
517 */
518typedef struct PDMLUN
519{
520 /** The LUN - The Logical Unit Number. */
521 RTUINT iLun;
522 /** Pointer to the next LUN. */
523 PPDMLUN pNext;
524 /** Pointer to the top driver in the driver chain. */
525 PPDMDRVINS pTop;
526 /** Pointer to the bottom driver in the driver chain. */
527 PPDMDRVINS pBottom;
528 /** Pointer to the device instance which the LUN belongs to.
529 * Either this is set or pUsbIns is set. Both is never set at the same time. */
530 PPDMDEVINS pDevIns;
531 /** Pointer to the USB device instance which the LUN belongs to. */
532 PPDMUSBINS pUsbIns;
533 /** Pointer to the device base interface. */
534 PPDMIBASE pBase;
535 /** Description of this LUN. */
536 const char *pszDesc;
537} PDMLUN;
538
539
540/**
541 * PDM Device, ring-3.
542 */
543typedef struct PDMDEV
544{
545 /** Pointer to the next device (R3 Ptr). */
546 R3PTRTYPE(PPDMDEV) pNext;
547 /** Device name length. (search optimization) */
548 uint32_t cchName;
549 /** Registration structure. */
550 R3PTRTYPE(const struct PDMDEVREGR3 *) pReg;
551 /** Number of instances. */
552 uint32_t cInstances;
553 /** Pointer to chain of instances (R3 Ptr). */
554 PPDMDEVINSR3 pInstances;
555 /** The search path for raw-mode context modules (';' as separator). */
556 char *pszRCSearchPath;
557 /** The search path for ring-0 context modules (';' as separator). */
558 char *pszR0SearchPath;
559} PDMDEV;
560
561
562#if 0
563/**
564 * PDM Device, ring-0.
565 */
566typedef struct PDMDEVR0
567{
568 /** Pointer to the next device. */
569 R0PTRTYPE(PPDMDEVR0) pNext;
570 /** Device name length. (search optimization) */
571 uint32_t cchName;
572 /** Registration structure. */
573 R3PTRTYPE(const struct PDMDEVREGR0 *) pReg;
574 /** Number of instances. */
575 uint32_t cInstances;
576 /** Pointer to chain of instances. */
577 PPDMDEVINSR0 pInstances;
578} PDMDEVR0;
579#endif
580
581
582/**
583 * PDM USB Device.
584 */
585typedef struct PDMUSB
586{
587 /** Pointer to the next device (R3 Ptr). */
588 R3PTRTYPE(PPDMUSB) pNext;
589 /** Device name length. (search optimization) */
590 RTUINT cchName;
591 /** Registration structure. */
592 R3PTRTYPE(const struct PDMUSBREG *) pReg;
593 /** Next instance number. */
594 uint32_t iNextInstance;
595 /** Pointer to chain of instances (R3 Ptr). */
596 R3PTRTYPE(PPDMUSBINS) pInstances;
597} PDMUSB;
598
599
600/**
601 * PDM Driver.
602 */
603typedef struct PDMDRV
604{
605 /** Pointer to the next device. */
606 PPDMDRV pNext;
607 /** Registration structure. */
608 const struct PDMDRVREG * pReg;
609 /** Current number of instances. */
610 uint32_t cInstances;
611 /** The next instance number. */
612 uint32_t iNextInstance;
613 /** The search path for raw-mode context modules (';' as separator). */
614 char *pszRCSearchPath;
615 /** The search path for ring-0 context modules (';' as separator). */
616 char *pszR0SearchPath;
617} PDMDRV;
618
619
620/**
621 * PDM registered IOMMU device.
622 */
623typedef struct PDMIOMMU
624{
625 /** IOMMU index. */
626 uint32_t idxIommu;
627 uint32_t uPadding0; /**< Alignment padding.*/
628
629 /** Pointer to the IOMMU device instance - R3. */
630 PPDMDEVINSR3 pDevInsR3;
631
632 /** Pointer to the IOMMU device instance - R0. */
633 PPDMDEVINSR0 pDevInsR0;
634
635 /** Pointer to the IOMMU device instance - RC. */
636 PPDMDEVINSRC pDevInsRC;
637 RTRCPTR RCPtrPadding;
638} PDMIOMMU;
639
640
641/**
642 * PDM registered PIC device.
643 */
644typedef struct PDMPIC
645{
646 /** Pointer to the PIC device instance - R3. */
647 PPDMDEVINSR3 pDevInsR3;
648 /** @copydoc PDMPICREG::pfnSetIrq */
649 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
650 /** @copydoc PDMPICREG::pfnGetInterrupt */
651 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
652
653 /** Pointer to the PIC device instance - R0. */
654 PPDMDEVINSR0 pDevInsR0;
655 /** @copydoc PDMPICREG::pfnSetIrq */
656 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
657 /** @copydoc PDMPICREG::pfnGetInterrupt */
658 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
659
660 /** Pointer to the PIC device instance - RC. */
661 PPDMDEVINSRC pDevInsRC;
662 /** @copydoc PDMPICREG::pfnSetIrq */
663 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
664 /** @copydoc PDMPICREG::pfnGetInterrupt */
665 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
666 /** Alignment padding. */
667 RTRCPTR RCPtrPadding;
668} PDMPIC;
669
670
671/**
672 * PDM registered APIC device.
673 */
674typedef struct PDMAPIC
675{
676 /** Pointer to the APIC device instance - R3 Ptr. */
677 PPDMDEVINSR3 pDevInsR3;
678 /** Pointer to the APIC device instance - R0 Ptr. */
679 PPDMDEVINSR0 pDevInsR0;
680 /** Pointer to the APIC device instance - RC Ptr. */
681 PPDMDEVINSRC pDevInsRC;
682 uint8_t Alignment[4];
683} PDMAPIC;
684
685
686/**
687 * PDM registered I/O APIC device.
688 */
689typedef struct PDMIOAPIC
690{
691 /** Pointer to the APIC device instance - R3 Ptr. */
692 PPDMDEVINSR3 pDevInsR3;
693 /** @copydoc PDMIOAPICREG::pfnSetIrq */
694 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
695 /** @copydoc PDMIOAPICREG::pfnSendMsi */
696 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
697 /** @copydoc PDMIOAPICREG::pfnSetEoi */
698 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnSetEoiR3,(PPDMDEVINS pDevIns, uint8_t u8Vector));
699
700 /** Pointer to the PIC device instance - R0. */
701 PPDMDEVINSR0 pDevInsR0;
702 /** @copydoc PDMIOAPICREG::pfnSetIrq */
703 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
704 /** @copydoc PDMIOAPICREG::pfnSendMsi */
705 DECLR0CALLBACKMEMBER(void, pfnSendMsiR0,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
706 /** @copydoc PDMIOAPICREG::pfnSetEoi */
707 DECLR0CALLBACKMEMBER(VBOXSTRICTRC, pfnSetEoiR0,(PPDMDEVINS pDevIns, uint8_t u8Vector));
708
709 /** Pointer to the APIC device instance - RC Ptr. */
710 PPDMDEVINSRC pDevInsRC;
711 /** @copydoc PDMIOAPICREG::pfnSetIrq */
712 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
713 /** @copydoc PDMIOAPICREG::pfnSendMsi */
714 DECLRCCALLBACKMEMBER(void, pfnSendMsiRC,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue, uint32_t uTagSrc));
715 /** @copydoc PDMIOAPICREG::pfnSendMsi */
716 DECLRCCALLBACKMEMBER(VBOXSTRICTRC, pfnSetEoiRC,(PPDMDEVINS pDevIns, uint8_t u8Vector));
717} PDMIOAPIC;
718
719/** Maximum number of PCI busses for a VM. */
720#define PDM_PCI_BUSSES_MAX 8
721/** Maximum number of IOMMUs (at most one per PCI bus). */
722#define PDM_IOMMUS_MAX PDM_PCI_BUSSES_MAX
723
724
725#ifdef IN_RING3
726/**
727 * PDM registered firmware device.
728 */
729typedef struct PDMFW
730{
731 /** Pointer to the firmware device instance. */
732 PPDMDEVINSR3 pDevIns;
733 /** Copy of the registration structure. */
734 PDMFWREG Reg;
735} PDMFW;
736/** Pointer to a firmware instance. */
737typedef PDMFW *PPDMFW;
738#endif
739
740
741/**
742 * PDM PCI bus instance.
743 */
744typedef struct PDMPCIBUS
745{
746 /** PCI bus number. */
747 uint32_t iBus;
748 uint32_t uPadding0; /**< Alignment padding.*/
749
750 /** Pointer to PCI bus device instance. */
751 PPDMDEVINSR3 pDevInsR3;
752 /** @copydoc PDMPCIBUSREGR3::pfnSetIrqR3 */
753 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
754
755 /** @copydoc PDMPCIBUSREGR3::pfnRegisterR3 */
756 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t fFlags,
757 uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName));
758 /** @copydoc PDMPCIBUSREGR3::pfnRegisterMsiR3 */
759 DECLR3CALLBACKMEMBER(int, pfnRegisterMsi,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg));
760 /** @copydoc PDMPCIBUSREGR3::pfnIORegionRegisterR3 */
761 DECLR3CALLBACKMEMBER(int, pfnIORegionRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
762 RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, uint32_t fFlags,
763 uint64_t hHandle, PFNPCIIOREGIONMAP pfnCallback));
764 /** @copydoc PDMPCIBUSREGR3::pfnInterceptConfigAccesses */
765 DECLR3CALLBACKMEMBER(void, pfnInterceptConfigAccesses,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
766 PFNPCICONFIGREAD pfnRead, PFNPCICONFIGWRITE pfnWrite));
767 /** @copydoc PDMPCIBUSREGR3::pfnConfigWrite */
768 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnConfigWrite,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
769 uint32_t uAddress, unsigned cb, uint32_t u32Value));
770 /** @copydoc PDMPCIBUSREGR3::pfnConfigRead */
771 DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnConfigRead,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
772 uint32_t uAddress, unsigned cb, uint32_t *pu32Value));
773} PDMPCIBUS;
774
775
776/**
777 * Ring-0 PDM PCI bus instance data.
778 */
779typedef struct PDMPCIBUSR0
780{
781 /** PCI bus number. */
782 uint32_t iBus;
783 uint32_t uPadding0; /**< Alignment padding.*/
784 /** Pointer to PCI bus device instance. */
785 PPDMDEVINSR0 pDevInsR0;
786 /** @copydoc PDMPCIBUSREGR0::pfnSetIrq */
787 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
788} PDMPCIBUSR0;
789/** Pointer to the ring-0 PCI bus data. */
790typedef PDMPCIBUSR0 *PPDMPCIBUSR0;
791
792#ifdef IN_RING3
793/**
794 * PDM registered DMAC (DMA Controller) device.
795 */
796typedef struct PDMDMAC
797{
798 /** Pointer to the DMAC device instance. */
799 PPDMDEVINSR3 pDevIns;
800 /** Copy of the registration structure. */
801 PDMDMACREG Reg;
802} PDMDMAC;
803
804
805/**
806 * PDM registered RTC (Real Time Clock) device.
807 */
808typedef struct PDMRTC
809{
810 /** Pointer to the RTC device instance. */
811 PPDMDEVINSR3 pDevIns;
812 /** Copy of the registration structure. */
813 PDMRTCREG Reg;
814} PDMRTC;
815
816#endif /* IN_RING3 */
817
818/**
819 * Module type.
820 */
821typedef enum PDMMODTYPE
822{
823 /** Raw-mode (RC) context module. */
824 PDMMOD_TYPE_RC,
825 /** Ring-0 (host) context module. */
826 PDMMOD_TYPE_R0,
827 /** Ring-3 (host) context module. */
828 PDMMOD_TYPE_R3
829} PDMMODTYPE;
830
831
832/** The module name length including the terminator. */
833#define PDMMOD_NAME_LEN 32
834
835/**
836 * Loaded module instance.
837 */
838typedef struct PDMMOD
839{
840 /** Module name. This is used for referring to
841 * the module internally, sort of like a handle. */
842 char szName[PDMMOD_NAME_LEN];
843 /** Module type. */
844 PDMMODTYPE eType;
845 /** Loader module handle. Not used for R0 modules. */
846 RTLDRMOD hLdrMod;
847 /** Loaded address.
848 * This is the 'handle' for R0 modules. */
849 RTUINTPTR ImageBase;
850 /** Old loaded address.
851 * This is used during relocation of GC modules. Not used for R0 modules. */
852 RTUINTPTR OldImageBase;
853 /** Where the R3 HC bits are stored.
854 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
855 void *pvBits;
856
857 /** Pointer to next module. */
858 struct PDMMOD *pNext;
859 /** Module filename. */
860 char szFilename[1];
861} PDMMOD;
862/** Pointer to loaded module instance. */
863typedef PDMMOD *PPDMMOD;
864
865
866
867/** Extra space in the free array. */
868#define PDMQUEUE_FREE_SLACK 16
869
870/**
871 * Queue type.
872 */
873typedef enum PDMQUEUETYPE
874{
875 /** Device consumer. */
876 PDMQUEUETYPE_DEV = 1,
877 /** Driver consumer. */
878 PDMQUEUETYPE_DRV,
879 /** Internal consumer. */
880 PDMQUEUETYPE_INTERNAL,
881 /** External consumer. */
882 PDMQUEUETYPE_EXTERNAL
883} PDMQUEUETYPE;
884
885/** Pointer to a PDM Queue. */
886typedef struct PDMQUEUE *PPDMQUEUE;
887
888/**
889 * PDM Queue.
890 */
891typedef struct PDMQUEUE
892{
893 /** Pointer to the next queue in the list. */
894 R3PTRTYPE(PPDMQUEUE) pNext;
895 /** Type specific data. */
896 union
897 {
898 /** PDMQUEUETYPE_DEV */
899 struct
900 {
901 /** Pointer to consumer function. */
902 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
903 /** Pointer to the device instance owning the queue. */
904 R3PTRTYPE(PPDMDEVINS) pDevIns;
905 } Dev;
906 /** PDMQUEUETYPE_DRV */
907 struct
908 {
909 /** Pointer to consumer function. */
910 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
911 /** Pointer to the driver instance owning the queue. */
912 R3PTRTYPE(PPDMDRVINS) pDrvIns;
913 } Drv;
914 /** PDMQUEUETYPE_INTERNAL */
915 struct
916 {
917 /** Pointer to consumer function. */
918 R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
919 } Int;
920 /** PDMQUEUETYPE_EXTERNAL */
921 struct
922 {
923 /** Pointer to consumer function. */
924 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
925 /** Pointer to user argument. */
926 R3PTRTYPE(void *) pvUser;
927 } Ext;
928 } u;
929 /** Queue type. */
930 PDMQUEUETYPE enmType;
931 /** The interval between checking the queue for events.
932 * The realtime timer below is used to do the waiting.
933 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
934 uint32_t cMilliesInterval;
935 /** Interval timer. Only used if cMilliesInterval is non-zero. */
936 PTMTIMERR3 pTimer;
937 /** Pointer to the VM - R3. */
938 PVMR3 pVMR3;
939 /** LIFO of pending items - R3. */
940 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
941 /** Pointer to the VM - R0. */
942 PVMR0 pVMR0;
943 /** LIFO of pending items - R0. */
944 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
945 /** Pointer to the GC VM and indicator for GC enabled queue.
946 * If this is NULL, the queue cannot be used in GC.
947 */
948 PVMRC pVMRC;
949 /** LIFO of pending items - GC. */
950 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
951
952 /** Item size (bytes). */
953 uint32_t cbItem;
954 /** Number of items in the queue. */
955 uint32_t cItems;
956 /** Index to the free head (where we insert). */
957 uint32_t volatile iFreeHead;
958 /** Index to the free tail (where we remove). */
959 uint32_t volatile iFreeTail;
960
961 /** Unique queue name. */
962 R3PTRTYPE(const char *) pszName;
963#if HC_ARCH_BITS == 32
964 RTR3PTR Alignment1;
965#endif
966 /** Stat: Times PDMQueueAlloc fails. */
967 STAMCOUNTER StatAllocFailures;
968 /** Stat: PDMQueueInsert calls. */
969 STAMCOUNTER StatInsert;
970 /** Stat: Queue flushes. */
971 STAMCOUNTER StatFlush;
972 /** Stat: Queue flushes with pending items left over. */
973 STAMCOUNTER StatFlushLeftovers;
974#ifdef VBOX_WITH_STATISTICS
975 /** State: Profiling the flushing. */
976 STAMPROFILE StatFlushPrf;
977 /** State: Pending items. */
978 uint32_t volatile cStatPending;
979 uint32_t volatile cAlignment;
980#endif
981
982 /** Array of pointers to free items. Variable size. */
983 struct PDMQUEUEFREEITEM
984 {
985 /** Pointer to the free item - HC Ptr. */
986 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
987 /** Pointer to the free item - HC Ptr. */
988 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
989 /** Pointer to the free item - GC Ptr. */
990 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
991#if HC_ARCH_BITS == 64
992 RTRCPTR Alignment0;
993#endif
994 } aFreeItems[1];
995} PDMQUEUE;
996
997/** @name PDM::fQueueFlushing
998 * @{ */
999/** Used to make sure only one EMT will flush the queues.
1000 * Set when an EMT is flushing queues, clear otherwise. */
1001#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
1002/** Indicating there are queues with items pending.
1003 * This is make sure we don't miss inserts happening during flushing. The FF
1004 * cannot be used for this since it has to be cleared immediately to prevent
1005 * other EMTs from spinning. */
1006#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
1007/** @} */
1008
1009
1010/** @name PDM task structures.
1011 * @{ */
1012
1013/**
1014 * A asynchronous user mode task.
1015 */
1016typedef struct PDMTASK
1017{
1018 /** Task owner type. */
1019 PDMTASKTYPE volatile enmType;
1020 /** Queue flags. */
1021 uint32_t volatile fFlags;
1022 /** User argument for the callback. */
1023 R3PTRTYPE(void *) volatile pvUser;
1024 /** The callback (will be cast according to enmType before callout). */
1025 R3PTRTYPE(PFNRT) volatile pfnCallback;
1026 /** The owner identifier. */
1027 R3PTRTYPE(void *) volatile pvOwner;
1028 /** Task name. */
1029 R3PTRTYPE(const char *) pszName;
1030 /** Number of times already triggered when PDMTaskTrigger was called. */
1031 uint32_t volatile cAlreadyTrigged;
1032 /** Number of runs. */
1033 uint32_t cRuns;
1034} PDMTASK;
1035/** Pointer to a PDM task. */
1036typedef PDMTASK *PPDMTASK;
1037
1038/**
1039 * A task set.
1040 *
1041 * This is served by one task executor thread.
1042 */
1043typedef struct PDMTASKSET
1044{
1045 /** Magic value (PDMTASKSET_MAGIC). */
1046 uint32_t u32Magic;
1047 /** Set if this task set works for ring-0 and raw-mode. */
1048 bool fRZEnabled;
1049 /** Number of allocated taks. */
1050 uint8_t volatile cAllocated;
1051 /** Base handle value for this set. */
1052 uint16_t uHandleBase;
1053 /** The task executor thread. */
1054 R3PTRTYPE(RTTHREAD) hThread;
1055 /** Event semaphore for waking up the thread when fRZEnabled is set. */
1056 SUPSEMEVENT hEventR0;
1057 /** Event semaphore for waking up the thread when fRZEnabled is clear. */
1058 R3PTRTYPE(RTSEMEVENT) hEventR3;
1059 /** The VM pointer. */
1060 PVM pVM;
1061 /** Padding so fTriggered is in its own cacheline. */
1062 uint64_t au64Padding2[3];
1063
1064 /** Bitmask of triggered tasks. */
1065 uint64_t volatile fTriggered;
1066 /** Shutdown thread indicator. */
1067 bool volatile fShutdown;
1068 /** Padding. */
1069 bool volatile afPadding3[3];
1070 /** Task currently running, UINT32_MAX if idle. */
1071 uint32_t volatile idxRunning;
1072 /** Padding so fTriggered and fShutdown are in their own cacheline. */
1073 uint64_t volatile au64Padding3[6];
1074
1075 /** The individual tasks. (Unallocated tasks have NULL pvOwner.) */
1076 PDMTASK aTasks[64];
1077} PDMTASKSET;
1078AssertCompileMemberAlignment(PDMTASKSET, fTriggered, 64);
1079AssertCompileMemberAlignment(PDMTASKSET, aTasks, 64);
1080/** Magic value for PDMTASKSET::u32Magic. */
1081#define PDMTASKSET_MAGIC UINT32_C(0x19320314)
1082/** Pointer to a task set. */
1083typedef PDMTASKSET *PPDMTASKSET;
1084
1085/** @} */
1086
1087
1088/**
1089 * Queue device helper task operation.
1090 */
1091typedef enum PDMDEVHLPTASKOP
1092{
1093 /** The usual invalid 0 entry. */
1094 PDMDEVHLPTASKOP_INVALID = 0,
1095 /** ISASetIrq */
1096 PDMDEVHLPTASKOP_ISA_SET_IRQ,
1097 /** PCISetIrq */
1098 PDMDEVHLPTASKOP_PCI_SET_IRQ,
1099 /** PCISetIrq */
1100 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
1101 /** The usual 32-bit hack. */
1102 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
1103} PDMDEVHLPTASKOP;
1104
1105/**
1106 * Queued Device Helper Task.
1107 */
1108typedef struct PDMDEVHLPTASK
1109{
1110 /** The queue item core (don't touch). */
1111 PDMQUEUEITEMCORE Core;
1112 /** Pointer to the device instance (R3 Ptr). */
1113 PPDMDEVINSR3 pDevInsR3;
1114 /** This operation to perform. */
1115 PDMDEVHLPTASKOP enmOp;
1116#if HC_ARCH_BITS == 64
1117 uint32_t Alignment0;
1118#endif
1119 /** Parameters to the operation. */
1120 union PDMDEVHLPTASKPARAMS
1121 {
1122 /**
1123 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_IOAPIC_SET_IRQ.
1124 */
1125 struct PDMDEVHLPTASKISASETIRQ
1126 {
1127 /** The IRQ */
1128 int iIrq;
1129 /** The new level. */
1130 int iLevel;
1131 /** The IRQ tag and source. */
1132 uint32_t uTagSrc;
1133 } IsaSetIRQ, IoApicSetIRQ;
1134
1135 /**
1136 * PDMDEVHLPTASKOP_PCI_SET_IRQ
1137 */
1138 struct PDMDEVHLPTASKPCISETIRQ
1139 {
1140 /** Pointer to the PCI device (R3 Ptr). */
1141 R3PTRTYPE(PPDMPCIDEV) pPciDevR3;
1142 /** The IRQ */
1143 int iIrq;
1144 /** The new level. */
1145 int iLevel;
1146 /** The IRQ tag and source. */
1147 uint32_t uTagSrc;
1148 } PciSetIRQ;
1149
1150 /** Expanding the structure. */
1151 uint64_t au64[3];
1152 } u;
1153} PDMDEVHLPTASK;
1154/** Pointer to a queued Device Helper Task. */
1155typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
1156/** Pointer to a const queued Device Helper Task. */
1157typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
1158
1159
1160
1161/**
1162 * An USB hub registration record.
1163 */
1164typedef struct PDMUSBHUB
1165{
1166 /** The USB versions this hub support.
1167 * Note that 1.1 hubs can take on 2.0 devices. */
1168 uint32_t fVersions;
1169 /** The number of ports on the hub. */
1170 uint32_t cPorts;
1171 /** The number of available ports (0..cPorts). */
1172 uint32_t cAvailablePorts;
1173 /** The driver instance of the hub. */
1174 PPDMDRVINS pDrvIns;
1175 /** Copy of the to the registration structure. */
1176 PDMUSBHUBREG Reg;
1177
1178 /** Pointer to the next hub in the list. */
1179 struct PDMUSBHUB *pNext;
1180} PDMUSBHUB;
1181
1182/** Pointer to a const USB HUB registration record. */
1183typedef const PDMUSBHUB *PCPDMUSBHUB;
1184
1185/** Pointer to a PDM Async I/O template. */
1186typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
1187
1188/** Pointer to the main PDM Async completion endpoint class. */
1189typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
1190
1191/** Pointer to the global block cache structure. */
1192typedef struct PDMBLKCACHEGLOBAL *PPDMBLKCACHEGLOBAL;
1193
1194/**
1195 * PDM VMCPU Instance data.
1196 * Changes to this must checked against the padding of the pdm union in VMCPU!
1197 */
1198typedef struct PDMCPU
1199{
1200 /** The number of entries in the apQueuedCritSectsLeaves table that's currently
1201 * in use. */
1202 uint32_t cQueuedCritSectLeaves;
1203 uint32_t uPadding0; /**< Alignment padding.*/
1204 /** Critical sections queued in RC/R0 because of contention preventing leave to
1205 * complete. (R3 Ptrs)
1206 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1207 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectLeaves[8];
1208
1209 /** The number of entries in the apQueuedCritSectRwExclLeaves table that's
1210 * currently in use. */
1211 uint32_t cQueuedCritSectRwExclLeaves;
1212 uint32_t uPadding1; /**< Alignment padding.*/
1213 /** Read/write critical sections queued in RC/R0 because of contention
1214 * preventing exclusive leave to complete. (R3 Ptrs)
1215 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1216 R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwExclLeaves[8];
1217
1218 /** The number of entries in the apQueuedCritSectsRwShrdLeaves table that's
1219 * currently in use. */
1220 uint32_t cQueuedCritSectRwShrdLeaves;
1221 uint32_t uPadding2; /**< Alignment padding.*/
1222 /** Read/write critical sections queued in RC/R0 because of contention
1223 * preventing shared leave to complete. (R3 Ptrs)
1224 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
1225 R3PTRTYPE(PPDMCRITSECTRW) apQueuedCritSectRwShrdLeaves[8];
1226} PDMCPU;
1227
1228
1229/**
1230 * PDM VM Instance data.
1231 * Changes to this must checked against the padding of the cfgm union in VM!
1232 */
1233typedef struct PDM
1234{
1235 /** The PDM lock.
1236 * This is used to protect everything that deals with interrupts, i.e.
1237 * the PIC, APIC, IOAPIC and PCI devices plus some PDM functions. */
1238 PDMCRITSECT CritSect;
1239 /** The NOP critical section.
1240 * This is a dummy critical section that will not do any thread
1241 * serialization but instead let all threads enter immediately and
1242 * concurrently. */
1243 PDMCRITSECT NopCritSect;
1244
1245 /** The ring-0 capable task sets (max 128). */
1246 PDMTASKSET aTaskSets[2];
1247 /** Pointer to task sets (max 512). */
1248 R3PTRTYPE(PPDMTASKSET) apTaskSets[8];
1249
1250 /** PCI Buses. */
1251 PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
1252 /** IOMMU devices. */
1253 PDMIOMMU aIommus[PDM_IOMMUS_MAX];
1254 /** The register PIC device. */
1255 PDMPIC Pic;
1256 /** The registered APIC device. */
1257 PDMAPIC Apic;
1258 /** The registered I/O APIC device. */
1259 PDMIOAPIC IoApic;
1260 /** The registered HPET device. */
1261 PPDMDEVINSR3 pHpet;
1262
1263 /** List of registered devices. (FIFO) */
1264 R3PTRTYPE(PPDMDEV) pDevs;
1265 /** List of devices instances. (FIFO) */
1266 R3PTRTYPE(PPDMDEVINS) pDevInstances;
1267 /** List of registered USB devices. (FIFO) */
1268 R3PTRTYPE(PPDMUSB) pUsbDevs;
1269 /** List of USB devices instances. (FIFO) */
1270 R3PTRTYPE(PPDMUSBINS) pUsbInstances;
1271 /** List of registered drivers. (FIFO) */
1272 R3PTRTYPE(PPDMDRV) pDrvs;
1273 /** The registered firmware device (can be NULL). */
1274 R3PTRTYPE(PPDMFW) pFirmware;
1275 /** The registered DMAC device. */
1276 R3PTRTYPE(PPDMDMAC) pDmac;
1277 /** The registered RTC device. */
1278 R3PTRTYPE(PPDMRTC) pRtc;
1279 /** The registered USB HUBs. (FIFO) */
1280 R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
1281
1282 /** @name Queues
1283 * @{ */
1284 /** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
1285 R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
1286 /** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
1287 R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
1288 /** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
1289 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
1290 /** Pointer to the queue which should be manually flushed - RC Ptr.
1291 * Only touched by EMT. */
1292 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
1293 /** Pointer to the queue which should be manually flushed - R0 Ptr.
1294 * Only touched by EMT. */
1295 R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
1296 /** Bitmask controlling the queue flushing.
1297 * See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
1298 uint32_t volatile fQueueFlushing;
1299 /** @} */
1300
1301 /** The current IRQ tag (tracing purposes). */
1302 uint32_t volatile uIrqTag;
1303
1304 /** Pending reset flags (PDMVMRESET_F_XXX). */
1305 uint32_t volatile fResetFlags;
1306
1307 /** Set by pdmR3LoadExec for use in assertions. */
1308 bool fStateLoaded;
1309 /** Alignment padding. */
1310 bool afPadding[3];
1311
1312 /** The tracing ID of the next device instance.
1313 *
1314 * @remarks We keep the device tracing ID seperate from the rest as these are
1315 * then more likely to end up with the same ID from one run to
1316 * another, making analysis somewhat easier. Drivers and USB devices
1317 * are more volatile and can be changed at runtime, thus these are much
1318 * less likely to remain stable, so just heap them all together. */
1319 uint32_t idTracingDev;
1320 /** The tracing ID of the next driver instance, USB device instance or other
1321 * PDM entity requiring an ID. */
1322 uint32_t idTracingOther;
1323
1324 /** @name VMM device heap
1325 * @{ */
1326 /** The heap size. */
1327 uint32_t cbVMMDevHeap;
1328 /** Free space. */
1329 uint32_t cbVMMDevHeapLeft;
1330 /** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
1331 RTR3PTR pvVMMDevHeap;
1332 /** Ring-3 mapping/unmapping notification callback for the user. */
1333 PFNPDMVMMDEVHEAPNOTIFY pfnVMMDevHeapNotify;
1334 /** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
1335 RTGCPHYS GCPhysVMMDevHeap;
1336 /** @} */
1337
1338 /** Number of times a critical section leave request needed to be queued for ring-3 execution. */
1339 STAMCOUNTER StatQueuedCritSectLeaves;
1340} PDM;
1341AssertCompileMemberAlignment(PDM, CritSect, 8);
1342AssertCompileMemberAlignment(PDM, aTaskSets, 64);
1343AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1344AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1345/** Pointer to PDM VM instance data. */
1346typedef PDM *PPDM;
1347
1348
1349/**
1350 * PDM data kept in the ring-0 GVM.
1351 */
1352typedef struct PDMR0PERVM
1353{
1354 /** PCI Buses, ring-0 data. */
1355 PDMPCIBUSR0 aPciBuses[PDM_PCI_BUSSES_MAX];
1356 /** Number of valid ring-0 device instances (apDevInstances). */
1357 uint32_t cDevInstances;
1358 uint32_t u32Padding;
1359 /** Pointer to ring-0 device instances. */
1360 R0PTRTYPE(struct PDMDEVINSR0 *) apDevInstances[190];
1361} PDMR0PERVM;
1362
1363
1364/**
1365 * PDM data kept in the UVM.
1366 */
1367typedef struct PDMUSERPERVM
1368{
1369 /** @todo move more stuff over here. */
1370
1371 /** Linked list of timer driven PDM queues.
1372 * Currently serialized by PDM::CritSect. */
1373 R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
1374 /** Linked list of force action driven PDM queues.
1375 * Currently serialized by PDM::CritSect. */
1376 R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
1377
1378 /** Lock protecting the lists below it. */
1379 RTCRITSECT ListCritSect;
1380 /** Pointer to list of loaded modules. */
1381 PPDMMOD pModules;
1382 /** List of initialized critical sections. (LIFO) */
1383 R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
1384 /** List of initialized read/write critical sections. (LIFO) */
1385 R3PTRTYPE(PPDMCRITSECTRWINT) pRwCritSects;
1386 /** Head of the PDM Thread list. (singly linked) */
1387 R3PTRTYPE(PPDMTHREAD) pThreads;
1388 /** Tail of the PDM Thread list. (singly linked) */
1389 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
1390
1391 /** @name PDM Async Completion
1392 * @{ */
1393 /** Pointer to the array of supported endpoint classes. */
1394 PPDMASYNCCOMPLETIONEPCLASS apAsyncCompletionEndpointClass[PDMASYNCCOMPLETIONEPCLASSTYPE_MAX];
1395 /** Head of the templates. Singly linked, protected by ListCritSect. */
1396 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
1397 /** @} */
1398
1399 /** Global block cache data. */
1400 R3PTRTYPE(PPDMBLKCACHEGLOBAL) pBlkCacheGlobal;
1401#ifdef VBOX_WITH_NETSHAPER
1402 /** Pointer to network shaper instance. */
1403 R3PTRTYPE(PPDMNETSHAPER) pNetShaper;
1404#endif /* VBOX_WITH_NETSHAPER */
1405
1406} PDMUSERPERVM;
1407/** Pointer to the PDM data kept in the UVM. */
1408typedef PDMUSERPERVM *PPDMUSERPERVM;
1409
1410
1411
1412/*******************************************************************************
1413* Global Variables *
1414*******************************************************************************/
1415#ifdef IN_RING3
1416extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1417extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1418extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1419extern const PDMPICHLP g_pdmR3DevPicHlp;
1420extern const PDMIOAPICHLP g_pdmR3DevIoApicHlp;
1421extern const PDMFWHLPR3 g_pdmR3DevFirmwareHlp;
1422extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1423extern const PDMIOMMUHLPR3 g_pdmR3DevIommuHlp;
1424extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1425extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1426extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1427extern const PDMPCIRAWHLPR3 g_pdmR3DevPciRawHlp;
1428#endif
1429
1430
1431/*******************************************************************************
1432* Defined Constants And Macros *
1433*******************************************************************************/
1434/** @def PDMDEV_ASSERT_DEVINS
1435 * Asserts the validity of the device instance.
1436 */
1437#ifdef VBOX_STRICT
1438# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1439 do { \
1440 AssertPtr(pDevIns); \
1441 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1442 Assert(pDevIns->CTX_SUFF(pvInstanceDataFor) == (void *)&pDevIns->achInstanceData[0]); \
1443 } while (0)
1444#else
1445# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1446#endif
1447
1448/** @def PDMDRV_ASSERT_DRVINS
1449 * Asserts the validity of the driver instance.
1450 */
1451#ifdef VBOX_STRICT
1452# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1453 do { \
1454 AssertPtr(pDrvIns); \
1455 Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1456 Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1457 } while (0)
1458#else
1459# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1460#endif
1461
1462
1463/*******************************************************************************
1464* Internal Functions *
1465*******************************************************************************/
1466#ifdef IN_RING3
1467bool pdmR3IsValidName(const char *pszName);
1468
1469int pdmR3CritSectBothInitStats(PVM pVM);
1470void pdmR3CritSectBothRelocate(PVM pVM);
1471int pdmR3CritSectBothDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1472int pdmR3CritSectBothDeleteDriver(PVM pVM, PPDMDRVINS pDrvIns);
1473int pdmR3CritSectInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1474 const char *pszNameFmt, va_list va);
1475int pdmR3CritSectInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1476 const char *pszNameFmt, ...);
1477int pdmR3CritSectInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1478 const char *pszNameFmt, ...);
1479int pdmR3CritSectRwInitDevice( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1480 const char *pszNameFmt, va_list va);
1481int pdmR3CritSectRwInitDeviceAuto( PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1482 const char *pszNameFmt, ...);
1483int pdmR3CritSectRwInitDriver( PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECTRW pCritSect, RT_SRC_POS_DECL,
1484 const char *pszNameFmt, ...);
1485
1486int pdmR3DevInit(PVM pVM);
1487int pdmR3DevInitComplete(PVM pVM);
1488PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1489int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1490DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1491
1492int pdmR3UsbLoadModules(PVM pVM);
1493int pdmR3UsbInstantiateDevices(PVM pVM);
1494PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1495int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1496int pdmR3UsbVMInitComplete(PVM pVM);
1497
1498int pdmR3DrvInit(PVM pVM);
1499int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1500 PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1501int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1502void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1503PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1504
1505int pdmR3LdrInitU(PUVM pUVM);
1506void pdmR3LdrTermU(PUVM pUVM);
1507char *pdmR3FileR3(const char *pszFile, bool fShared);
1508int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);
1509
1510void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1511
1512int pdmR3TaskInit(PVM pVM);
1513void pdmR3TaskTerm(PVM pVM);
1514
1515int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1516 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1517int pdmR3ThreadCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1518 PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1519int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1520 PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1521int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1522int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1523int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1524void pdmR3ThreadDestroyAll(PVM pVM);
1525int pdmR3ThreadResumeAll(PVM pVM);
1526int pdmR3ThreadSuspendAll(PVM pVM);
1527
1528#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1529int pdmR3AsyncCompletionInit(PVM pVM);
1530int pdmR3AsyncCompletionTerm(PVM pVM);
1531void pdmR3AsyncCompletionResume(PVM pVM);
1532int pdmR3AsyncCompletionTemplateCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEDEV pfnCompleted, const char *pszDesc);
1533int pdmR3AsyncCompletionTemplateCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate,
1534 PFNPDMASYNCCOMPLETEDRV pfnCompleted, void *pvTemplateUser, const char *pszDesc);
1535int pdmR3AsyncCompletionTemplateCreateUsb(PVM pVM, PPDMUSBINS pUsbIns, PPPDMASYNCCOMPLETIONTEMPLATE ppTemplate, PFNPDMASYNCCOMPLETEUSB pfnCompleted, const char *pszDesc);
1536int pdmR3AsyncCompletionTemplateDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1537int pdmR3AsyncCompletionTemplateDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1538int pdmR3AsyncCompletionTemplateDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1539#endif
1540
1541#ifdef VBOX_WITH_NETSHAPER
1542int pdmR3NetShaperInit(PVM pVM);
1543int pdmR3NetShaperTerm(PVM pVM);
1544#endif
1545
1546int pdmR3BlkCacheInit(PVM pVM);
1547void pdmR3BlkCacheTerm(PVM pVM);
1548int pdmR3BlkCacheResume(PVM pVM);
1549
1550#endif /* IN_RING3 */
1551
1552void pdmLock(PVMCC pVM);
1553int pdmLockEx(PVMCC pVM, int rc);
1554void pdmUnlock(PVMCC pVM);
1555
1556#if defined(IN_RING3) || defined(IN_RING0)
1557void pdmCritSectRwLeaveSharedQueued(PPDMCRITSECTRW pThis);
1558void pdmCritSectRwLeaveExclQueued(PPDMCRITSECTRW pThis);
1559#endif
1560
1561/** @} */
1562
1563RT_C_DECLS_END
1564
1565#endif /* !VMM_INCLUDED_SRC_include_PDMInternal_h */
1566
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