1 | /* $Id: bs3-cpu-instr-2.h 103602 2024-02-29 02:10:17Z vboxsync $ */
|
---|
2 | /** @file
|
---|
3 | * BS3Kit - bs3-cpu-instr-2, common header file.
|
---|
4 | */
|
---|
5 |
|
---|
6 | /*
|
---|
7 | * Copyright (C) 2024 Oracle and/or its affiliates.
|
---|
8 | *
|
---|
9 | * This file is part of VirtualBox base platform packages, as
|
---|
10 | * available from https://www.215389.xyz.
|
---|
11 | *
|
---|
12 | * This program is free software; you can redistribute it and/or
|
---|
13 | * modify it under the terms of the GNU General Public License
|
---|
14 | * as published by the Free Software Foundation, in version 3 of the
|
---|
15 | * License.
|
---|
16 | *
|
---|
17 | * This program is distributed in the hope that it will be useful, but
|
---|
18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
|
---|
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
---|
20 | * General Public License for more details.
|
---|
21 | *
|
---|
22 | * You should have received a copy of the GNU General Public License
|
---|
23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
|
---|
24 | *
|
---|
25 | * The contents of this file may alternatively be used under the terms
|
---|
26 | * of the Common Development and Distribution License Version 1.0
|
---|
27 | * (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
|
---|
28 | * in the VirtualBox distribution, in which case the provisions of the
|
---|
29 | * CDDL are applicable instead of those of the GPL.
|
---|
30 | *
|
---|
31 | * You may elect to license modified versions of this file under the
|
---|
32 | * terms and conditions of either the GPL or the CDDL or both.
|
---|
33 | *
|
---|
34 | * SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
|
---|
35 | */
|
---|
36 |
|
---|
37 | #ifndef VBOX_INCLUDED_SRC_bootsectors_bs3_cpu_instr_2_h
|
---|
38 | #define VBOX_INCLUDED_SRC_bootsectors_bs3_cpu_instr_2_h
|
---|
39 | #ifndef RT_WITHOUT_PRAGMA_ONCE
|
---|
40 | # pragma once
|
---|
41 | #endif
|
---|
42 |
|
---|
43 | #pragma pack(1)
|
---|
44 |
|
---|
45 | typedef struct BS3CPUINSTR2BIN8
|
---|
46 | {
|
---|
47 | uint8_t uSrc1, uSrc2, uResult;
|
---|
48 | uint16_t fEflOut;
|
---|
49 | } BS3CPUINSTR2BIN8;
|
---|
50 | typedef BS3CPUINSTR2BIN8 const RT_FAR *PCBS3CPUINSTR2BIN8;
|
---|
51 |
|
---|
52 | typedef struct BS3CPUINSTR2BIN16
|
---|
53 | {
|
---|
54 | uint16_t uSrc1, uSrc2, uResult;
|
---|
55 | uint16_t fEflOut;
|
---|
56 | } BS3CPUINSTR2BIN16;
|
---|
57 | typedef BS3CPUINSTR2BIN16 const RT_FAR *PCBS3CPUINSTR2BIN16;
|
---|
58 |
|
---|
59 | typedef struct BS3CPUINSTR2BIN32
|
---|
60 | {
|
---|
61 | uint32_t uSrc1, uSrc2, uResult;
|
---|
62 | uint16_t fEflOut;
|
---|
63 | } BS3CPUINSTR2BIN32;
|
---|
64 | typedef BS3CPUINSTR2BIN32 const RT_FAR *PCBS3CPUINSTR2BIN32;
|
---|
65 |
|
---|
66 | typedef struct BS3CPUINSTR2BIN64
|
---|
67 | {
|
---|
68 | uint64_t uSrc1, uSrc2, uResult;
|
---|
69 | uint16_t fEflOut;
|
---|
70 | } BS3CPUINSTR2BIN64;
|
---|
71 | typedef BS3CPUINSTR2BIN64 const RT_FAR *PCBS3CPUINSTR2BIN64;
|
---|
72 |
|
---|
73 | #pragma pack()
|
---|
74 |
|
---|
75 | /** Using unused EFLAGS bit 3 for CF input value for ADC, SBB and such. */
|
---|
76 | #define BS3CPUINSTR2BIN_EFL_CARRY_IN_BIT 3
|
---|
77 |
|
---|
78 | #endif /* !VBOX_INCLUDED_SRC_bootsectors_bs3_cpu_instr_2_h */
|
---|
79 |
|
---|