Changeset 47660 in vbox for trunk/src/VBox/VMM/include/CPUMInternal.h

Timestamp:

Aug 12, 2013 12:37:34 AM (12 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

87863

Message:

VMM: Debug register handling redo. (only partly tested on AMD-V so far.)

File:

• trunk/src/VBox/VMM/include/CPUMInternal.h (modified) (2 diffs)

trunk/src/VBox/VMM/include/CPUMInternal.h

@@ -57 +57 @@
 
 /** Use flags (CPUM::fUseFlags).
- * (Don't forget to sync this with CPUMInternal.mac!)
+ * (Don't forget to sync this with CPUMInternal.mac !)
  * @{ */
 /** Used the FPU, SSE or such stuff. */
@@ -64 +64 @@
  * REM syncing is clearing this, lazy FPU is setting it. */
 #define CPUM_USED_FPU_SINCE_REM         RT_BIT(1)
+/** The XMM state was manually restored. (AMD only) */
+#define CPUM_USED_MANUAL_XMM_RESTORE    RT_BIT(2)
+
 /** Host OS is using SYSENTER and we must NULL the CS. */
-#define CPUM_USE_SYSENTER               RT_BIT(2)
+#define CPUM_USE_SYSENTER               RT_BIT(3)
 /** Host OS is using SYSENTER and we must NULL the CS. */
-#define CPUM_USE_SYSCALL                RT_BIT(3)
-/** Debug registers are used by host and must be disabled. */
-#define CPUM_USE_DEBUG_REGS_HOST        RT_BIT(4)
-/** Enabled use of debug registers in guest context. */
-#define CPUM_USE_DEBUG_REGS             RT_BIT(5)
-/** The XMM state was manually restored. (AMD only) */
-#define CPUM_MANUAL_XMM_RESTORE         RT_BIT(6)
-/** Sync the FPU state on entry (32->64 switcher only). */
-#define CPUM_SYNC_FPU_STATE             RT_BIT(7)
-/** Sync the debug state on entry (32->64 switcher only). */
-#define CPUM_SYNC_DEBUG_STATE           RT_BIT(8)
-/** Enabled use of hypervisor debug registers in guest context. */
-#define CPUM_USE_DEBUG_REGS_HYPER       RT_BIT(9)
+#define CPUM_USE_SYSCALL                RT_BIT(4)
+
+/** Debug registers are used by host and that DR7 and DR6 must be saved and
+ *  disabled when switching to raw-mode. */
+#define CPUM_USE_DEBUG_REGS_HOST        RT_BIT(5)
+/** Records that we've saved the host DRx registers.
+ * In ring-0 this means all (DR0-7), while in raw-mode context this means DR0-3
+ * since DR6 and DR7 are covered by CPUM_USE_DEBUG_REGS_HOST. */
+#define CPUM_USED_DEBUG_REGS_HOST       RT_BIT(6)
+/** Set to indicate that we should save host DR0-7 and load the hypervisor debug
+ * registers in the raw-mode world switchers. (See CPUMRecalcHyperDRx.) */
+#define CPUM_USE_DEBUG_REGS_HYPER       RT_BIT(7)
+/** Used in ring-0 to indicate that we have loaded the hypervisor debug
+ * registers. */
+#define CPUM_USED_DEBUG_REGS_HYPER      RT_BIT(8)
+/** Used in ring-0 to indicate that we have loaded the guest debug
+ * registers (DR0-3 and maybe DR6) for direct use by the guest.
+ * DR7 (and AMD-V DR6) are handled via the VMCB. */
+#define CPUM_USED_DEBUG_REGS_GUEST      RT_BIT(9)
+
+
+/** Sync the FPU state on next entry (32->64 switcher only). */
+#define CPUM_SYNC_FPU_STATE             RT_BIT(16)
+/** Sync the debug state on next entry (32->64 switcher only). */
+#define CPUM_SYNC_DEBUG_REGS_GUEST      RT_BIT(17)
+/** Sync the debug state on next entry (32->64 switcher only).
+ * Almost the same as CPUM_USE_DEBUG_REGS_HYPER in the raw-mode switchers.  */
+#define CPUM_SYNC_DEBUG_REGS_HYPER      RT_BIT(18)
 /** @} */