Changeset 55229 in vbox for trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h

Timestamp:

Apr 14, 2015 6:35:43 AM (10 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

99536

Message:

CPUM,IEM: Expose GuestFeatures and HostFeatures (exploded CPUID), making IEM use it. Early XSAVE/AVX guest support preps.

File:

• trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h (modified) (11 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAllInstructions.cpp.h

@@ -1308 +1308 @@
 {
     /* AMD prefetch group, Intel implements this as NOP Ev (and so do we). */
-    if (!IEM_IS_AMD_CPUID_FEATURES_ANY_PRESENT(X86_CPUID_EXT_FEATURE_EDX_LONG_MODE | X86_CPUID_AMD_FEATURE_EDX_3DNOW,
-                                               X86_CPUID_AMD_FEATURE_ECX_3DNOWPRF))
+    if (!IEM_GET_GUEST_CPU_FEATURES(pIemCpu)->f3DNowPrefetch)
     {
         IEMOP_MNEMONIC("GrpP");
@@ -1426 +1425 @@
 FNIEMOP_DEF(iemOp_3Dnow)
 {
-    if (!IEM_IS_AMD_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_AMD_FEATURE_EDX_3DNOW))
+    if (!IEM_GET_GUEST_CPU_FEATURES(pIemCpu)->f3DNow)
     {
         IEMOP_MNEMONIC("3Dnow");
@@ -1556 +1555 @@
     {
         /* The lock prefix can be used to encode CR8 accesses on some CPUs. */
-        if (!IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(X86_CPUID_AMD_FEATURE_ECX_CR8L))
+        if (!IEM_GET_GUEST_CPU_FEATURES(pIemCpu)->fMovCr8In32Bit)
             return IEMOP_RAISE_INVALID_OPCODE(); /* #UD takes precedence over #GP(), see test. */
         iCrReg |= 8;
@@ -1602 +1601 @@
     {
         /* The lock prefix can be used to encode CR8 accesses on some CPUs. */
-        if (!IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(X86_CPUID_AMD_FEATURE_ECX_CR8L))
+        if (!IEM_GET_GUEST_CPU_FEATURES(pIemCpu)->fMovCr8In32Bit)
             return IEMOP_RAISE_INVALID_OPCODE(); /* #UD takes precedence over #GP(), see test. */
         iCrReg |= 8;
@@ -4924 +4923 @@
 {
     IEMOP_MNEMONIC("fxsave m512");
-    if (!IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_FEATURE_EDX_FXSR))
+    if (!IEM_GET_GUEST_CPU_FEATURES(pIemCpu)->fFxSaveRstor)
         return IEMOP_RAISE_INVALID_OPCODE();
 
@@ -4944 +4943 @@
 {
     IEMOP_MNEMONIC("fxrstor m512");
-    if (!IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_FEATURE_EDX_FXSR))
+    if (!IEM_GET_GUEST_CPU_FEATURES(pIemCpu)->fFxSaveRstor)
         return IEMOP_RAISE_INVALID_OPCODE();
 
@@ -4984 +4983 @@
     IEMOP_MNEMONIC("lfence");
     IEMOP_HLP_NO_LOCK_PREFIX();
-    if (!IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_FEATURE_EDX_SSE2))
+    if (!IEM_GET_GUEST_CPU_FEATURES(pIemCpu)->fSse2)
         return IEMOP_RAISE_INVALID_OPCODE();
 
     IEM_MC_BEGIN(0, 0);
-    if (IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX_ON_HOST(X86_CPUID_FEATURE_EDX_SSE2))
+    if (IEM_GET_HOST_CPU_FEATURES(pIemCpu)->fSse2)
         IEM_MC_CALL_VOID_AIMPL_0(iemAImpl_lfence);
     else
@@ -5003 +5002 @@
     IEMOP_MNEMONIC("mfence");
     IEMOP_HLP_NO_LOCK_PREFIX();
-    if (!IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_FEATURE_EDX_SSE2))
+    if (!IEM_GET_GUEST_CPU_FEATURES(pIemCpu)->fSse2)
         return IEMOP_RAISE_INVALID_OPCODE();
 
     IEM_MC_BEGIN(0, 0);
-    if (IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX_ON_HOST(X86_CPUID_FEATURE_EDX_SSE2))
+    if (IEM_GET_HOST_CPU_FEATURES(pIemCpu)->fSse2)
         IEM_MC_CALL_VOID_AIMPL_0(iemAImpl_mfence);
     else
@@ -5022 +5021 @@
     IEMOP_MNEMONIC("sfence");
     IEMOP_HLP_NO_LOCK_PREFIX();
-    if (!IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX(X86_CPUID_FEATURE_EDX_SSE2))
+    if (!IEM_GET_GUEST_CPU_FEATURES(pIemCpu)->fSse2)
         return IEMOP_RAISE_INVALID_OPCODE();
 
     IEM_MC_BEGIN(0, 0);
-    if (IEM_IS_INTEL_CPUID_FEATURE_PRESENT_EDX_ON_HOST(X86_CPUID_FEATURE_EDX_SSE2))
+    if (IEM_GET_HOST_CPU_FEATURES(pIemCpu)->fSse2)
         IEM_MC_CALL_VOID_AIMPL_0(iemAImpl_sfence);
     else
@@ -10551 +10550 @@
     IEMOP_HLP_NO_LOCK_PREFIX();
     if (   pIemCpu->enmCpuMode == IEMMODE_64BIT
-        && !IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(X86_CPUID_EXT_FEATURE_ECX_LAHF_SAHF))
+        && !IEM_GET_GUEST_CPU_FEATURES(pIemCpu)->fLahfSahf)
         return IEMOP_RAISE_INVALID_OPCODE();
     IEM_MC_BEGIN(0, 2);
@@ -10575 +10574 @@
     IEMOP_HLP_NO_LOCK_PREFIX();
     if (   pIemCpu->enmCpuMode == IEMMODE_64BIT
-        && !IEM_IS_AMD_CPUID_FEATURE_PRESENT_ECX(X86_CPUID_EXT_FEATURE_ECX_LAHF_SAHF))
+        && !IEM_GET_GUEST_CPU_FEATURES(pIemCpu)->fLahfSahf)
         return IEMOP_RAISE_INVALID_OPCODE();
     IEM_MC_BEGIN(0, 1);